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@inproceedings{DBLP:conf/iscas/AbaskharounHR01,
  author       = {Nazmy Abaskharoun and
                  Mohamed M. Hafed and
                  Gordon W. Roberts},
  title        = {Strategies for on-chip sub-nanosecond signal capture and timing measurements},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {174--177},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922200},
  doi          = {10.1109/ISCAS.2001.922200},
  timestamp    = {Fri, 07 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AbaskharounHR01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Abd-El-BarrSA01,
  author       = {Mostafa I. H. Abd{-}El{-}Barr and
                  C. Sundarram and
                  A. S. Almulhem},
  title        = {{VLSI} considerations in the design of k-ary n-cube interconnection
                  networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {278--281},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922226},
  doi          = {10.1109/ISCAS.2001.922226},
  timestamp    = {Tue, 11 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Abd-El-BarrSA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AdisenoIO01,
  author       = {Adiseno and
                  Mohammed Ismail and
                  H{\aa}kan K. Olsson},
  title        = {Dual-loop cross-coupled feedback amplifier for low-IF integrated receiver
                  architecture},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {470--473},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922275},
  doi          = {10.1109/ISCAS.2001.922275},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AdisenoIO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AguiarS01,
  author       = {Rui L. Aguiar and
                  Dinis M. Santos},
  title        = {Oscillatorless clock multiplication},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {630--633},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922316},
  doi          = {10.1109/ISCAS.2001.922316},
  timestamp    = {Thu, 19 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AguiarS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlbuquerqueS01,
  author       = {Edgar F. M. Albuquerque and
                  Manuel M. Silva},
  title        = {Evaluation of substrate noise in {CMOS} and low-noise logic cells},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {750--753},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922346},
  doi          = {10.1109/ISCAS.2001.922346},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AlbuquerqueS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AliotoCP01,
  author       = {Massimo Alioto and
                  Giuseppe Di Cataldo and
                  Gaetano Palumbo},
  title        = {{CML} ring oscillators: oscillation frequency},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {112--115},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922183},
  doi          = {10.1109/ISCAS.2001.922183},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AliotoCP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Andreani01,
  author       = {Pietro Andreani},
  title        = {A 1.8-GHz monolithic {CMOS} {VCO} tuned by an inductive varactor},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {714--717},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922337},
  doi          = {10.1109/ISCAS.2001.922337},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Andreani01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AngC01,
  author       = {Li{-}Minn Ang and
                  Hon Nin Cheung},
  title        = {Hardware implementation of the depth first search bit stream {SPIHT}
                  system},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {518--521},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922288},
  doi          = {10.1109/ISCAS.2001.922288},
  timestamp    = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/AngC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BadawyB01,
  author       = {Wael M. Badawy and
                  Magdy A. Bayoumi},
  title        = {A mesh based motion tracking architecture},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {262--265},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922222},
  doi          = {10.1109/ISCAS.2001.922222},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BadawyB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BajotM01,
  author       = {Yann Bajot and
                  Habib Mehrez},
  title        = {Customizable {DSP} architecture for {ASIP} core design},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {302--305},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922232},
  doi          = {10.1109/ISCAS.2001.922232},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BajotM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BartlettD01,
  author       = {Viv A. Bartlett and
                  Andrew G. Dempster},
  title        = {Using carry-save adders in low-power multiplier blocks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {222--225},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922212},
  doi          = {10.1109/ISCAS.2001.922212},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BartlettD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Bashagha01,
  author       = {Akil E. Bashagha},
  title        = {Novel radix-2k division algorithm},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {318--321},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922236},
  doi          = {10.1109/ISCAS.2001.922236},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Bashagha01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Becker01,
  author       = {Rolf Becker},
  title        = {Control loop for optimization of power consumption in {VLSI} designs},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {602--605},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922309},
  doi          = {10.1109/ISCAS.2001.922309},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Becker01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BengtsonS01,
  author       = {H{\aa}kan Bengtson and
                  Christer Svensson},
  title        = {3V {CMOS} 0.35 {\(\mathrm{\mu}\)} transimpedance receiver for optical
                  applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {69--71},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922171},
  doi          = {10.1109/ISCAS.2001.922171},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BengtsonS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BergANH01a,
  author       = {Yngvar Berg and
                  Snorre Aunet and
                  {\O}ivind N{\ae}ss and
                  Mats H{\o}vin},
  title        = {Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance
                  amplifiers to reduce harmonic distortion},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {838--841},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922368},
  doi          = {10.1109/ISCAS.2001.922368},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BergANH01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BouchakourHCBM01,
  author       = {Rachid Bouchakour and
                  Nadia Harabech and
                  Pierre Canet and
                  Philippe Boivin and
                  Jean Michel Mirable},
  title        = {Modeling of a floating-gate {EEPROM} cell using a charge sheet approach
                  including variable tunneling capacitance and polysilicon gate depletion
                  effect},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {822--825},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922364},
  doi          = {10.1109/ISCAS.2001.922364},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BouchakourHCBM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BrynjolfsonZ01,
  author       = {Ian Brynjolfson and
                  Zeljko Zilic},
  title        = {A new {PLL} design for clock management applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {814--817},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922362},
  doi          = {10.1109/ISCAS.2001.922362},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BrynjolfsonZ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CanegalloDG01,
  author       = {Roberto Canegallo and
                  Davide Dozza and
                  Roberto Guerrieri},
  title        = {Low power techniques for flash memories},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {494--497},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922282},
  doi          = {10.1109/ISCAS.2001.922282},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/CanegalloDG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CanerBHBM01,
  author       = {Pierre Canet and
                  Rachid Bouchakour and
                  Nadia Harabech and
                  Philippe Boivin and
                  Jean{-}Michel Mirabel},
  title        = {{EEPROM} programming study-time and degradation aspects},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {846--849},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922370},
  doi          = {10.1109/ISCAS.2001.922370},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/CanerBHBM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CetinKM01,
  author       = {Ediz {\c{C}}etin and
                  Izzet Kale and
                  Richard C. S. Morling},
  title        = {Adaptive compensation of analog front-end {I/Q} mismatches in digital
                  receivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {370--373},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922250},
  doi          = {10.1109/ISCAS.2001.922250},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/CetinKM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChanGL01a,
  author       = {Alan N. L. Chan and
                  Chun Bing Guo and
                  Howard C. Luong},
  title        = {A 1-V 2.4-GHz {CMOS} {LNA} with source degeneration as image-rejection
                  notch filter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {890--893},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922381},
  doi          = {10.1109/ISCAS.2001.922381},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChanGL01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChanNWL01,
  author       = {Alan N. L. Chan and
                  Kenneth W. H. Ng and
                  Joseph M. C. Wong and
                  Howard C. Luong},
  title        = {A 1-V 2.4-GHz {CMOS} {RF} receiver front-end for Bluetooth application},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {454--457},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922271},
  doi          = {10.1109/ISCAS.2001.922271},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChanNWL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangLPL01,
  author       = {Wei{-}Hsin Chang and
                  Yew{-}San Lee and
                  Wen{-}Shiaw Peng and
                  Chen{-}Yi Lee},
  title        = {A line-based, memory efficient and programmable architecture for 2D
                  {DWT} using lifting scheme},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {330--333},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922239},
  doi          = {10.1109/ISCAS.2001.922239},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangLPL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangLSW01,
  author       = {Ching{-}Chi Chang and
                  Chien{-}Chih Lin and
                  Muh{-}Tian Shiue and
                  Chorng{-}Kuang Wang},
  title        = {A wide pull-in range fast acquisition hardware-sharing two-fold carrier
                  recovery loop},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {358--361},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922247},
  doi          = {10.1109/ISCAS.2001.922247},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangLSW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangWC01,
  author       = {Yuyu Chang and
                  Jack Wills and
                  John Choma Jr.},
  title        = {On-chip automatic direct tuning circuitry based on the synchronous
                  rectification scheme for {CMOS} gigahertz band front-end filters},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {246--249},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922218},
  doi          = {10.1109/ISCAS.2001.922218},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangWC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangWHHL01,
  author       = {Cheng{-}Chih Chang and
                  Ro{-}Min Weng and
                  J. C. Huang and
                  Kang Hsu and
                  Kun{-}Yi Lin},
  title        = {A 1.5 {V} high gain {CMOS} mixer for 2.4-GHz applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {782--785},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922354},
  doi          = {10.1109/ISCAS.2001.922354},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangWHHL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenC01,
  author       = {Li{-}Hsun Chen and
                  Oscal T.{-}C. Chen},
  title        = {A low-complexity and high-speed Booth-algorithm {FIR} architecture},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {338--341},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922242},
  doi          = {10.1109/ISCAS.2001.922242},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenCCLZ01,
  author       = {Kuan{-}Hung Chen and
                  Shi{-}Chung Chang and
                  Tzi{-}Dar Chiueh and
                  Peter B. Luh and
                  Xing Zhao},
  title        = {{SIMD} architecture for job shop scheduling problem solving},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {530--533},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922291},
  doi          = {10.1109/ISCAS.2001.922291},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenCCLZ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChengH01,
  author       = {Huo{-}Hsing Cheng and
                  Ven{-}Chieh Hsieh},
  title        = {A new logic synthesis and optimization procedure},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {182--185},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922202},
  doi          = {10.1109/ISCAS.2001.922202},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChengH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChengYC01,
  author       = {Kuo{-}Hsing Cheng and
                  Wei{-}Bin Yang and
                  Chun{-}Fu Chung},
  title        = {A low-power high driving ability voltage control oscillator used in
                  {PLL}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {614--617},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922312},
  doi          = {10.1109/ISCAS.2001.922312},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChengYC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Cheung01,
  author       = {K. Y. Cheung},
  title        = {{CRRDL:} a novel charge recovery-recycling differential logic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {152--153},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922194},
  doi          = {10.1109/ISCAS.2001.922194},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Cheung01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CheungCL01,
  author       = {Hung Yan Cheung and
                  King Sau Cheung and
                  Jack Lau},
  title        = {A low power monolithic {AGC} with automatic {DC} offset cancellation
                  for direct conversion hybrid {CDMA} transceiver used in telemetering},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {390--393},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922255},
  doi          = {10.1109/ISCAS.2001.922255},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/CheungCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChiSP01,
  author       = {Zhipei Chi and
                  Leilei Song and
                  Keshab K. Parhi},
  title        = {A study on the performance, complexity tradeoffs of block turbo decoder
                  design},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {65--68},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922170},
  doi          = {10.1109/ISCAS.2001.922170},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChiSP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Christensen01a,
  author       = {K{\aa}re Tais Christensen},
  title        = {Design and optimization of {CMOS} switches for switched tuning of
                  {LC} resonators},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {770--773},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922351},
  doi          = {10.1109/ISCAS.2001.922351},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Christensen01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChuB01,
  author       = {Liang C. Chu and
                  Martin A. Brooke},
  title        = {An enhancement study on the {SDSL} upstream receiver},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {442--445},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922268},
  doi          = {10.1109/ISCAS.2001.922268},
  timestamp    = {Tue, 18 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChuB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CuraA01,
  author       = {Jos{\'{e}} Luis Cura and
                  Rui L. Aguiar},
  title        = {Dynamic range boosting for wireless optical receivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {686--689},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922330},
  doi          = {10.1109/ISCAS.2001.922330},
  timestamp    = {Thu, 19 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/CuraA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DahmaneMS01,
  author       = {Adel{-}Omar Dahmane and
                  Daniel Massicotte and
                  Leszek Szczecinski},
  title        = {A {VLSI} architecture of a piecewise {RBF} decision feedback channel
                  equalizer},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {342--345},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922243},
  doi          = {10.1109/ISCAS.2001.922243},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DahmaneMS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DrososDBS01,
  author       = {Christos Drosos and
                  Chrissavgi Dre and
                  Spyros Blionas and
                  Dimitrios Soudris},
  title        = {On the implementation of a baseband processor for a portable dual
                  mode {DECT/GSM} terminal},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {334--337},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922240},
  doi          = {10.1109/ISCAS.2001.922240},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DrososDBS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DudekH01,
  author       = {Piotr Dudek and
                  Peter J. Hicks},
  title        = {An analogue {SIMD} focal-plane processor array},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {490--493},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922281},
  doi          = {10.1109/ISCAS.2001.922281},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DudekH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DumonteixBM01,
  author       = {Yannick Dumonteix and
                  Yann Bajot and
                  Habib Mehrez},
  title        = {A fast and low-power distance computation unit dedicated to neural
                  networks, based on redundant arithmetic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {878--881},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922378},
  doi          = {10.1109/ISCAS.2001.922378},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DumonteixBM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/El-MalehO01,
  author       = {Aiman H. El{-}Maleh and
                  Yahya E. Osais},
  title        = {A retiming-based test pattern generator design for built-in self test
                  of data path architectures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {550--553},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922296},
  doi          = {10.1109/ISCAS.2001.922296},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/El-MalehO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ElgamelSXB01,
  author       = {Mohamed A. Elgamel and
                  Ahmed M. Shams and
                  Xi Xueling and
                  Magdy A. Bayoumi},
  title        = {Enhanced low power motion estimation {VLSI} architectures for video
                  compression},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {474--477},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922277},
  doi          = {10.1109/ISCAS.2001.922277},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ElgamelSXB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ElrabaaE01,
  author       = {Muhammad E. S. Elrabaa and
                  Mohamed I. Elmasry},
  title        = {Split-Gate Logic circuits for multi-threshold technologies},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {798--801},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922358},
  doi          = {10.1109/ISCAS.2001.922358},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ElrabaaE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ErikssonLA01,
  author       = {Henrik Eriksson and
                  Per Larsson{-}Edefors and
                  Atila Alvandpour},
  title        = {A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {84--87},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922175},
  doi          = {10.1109/ISCAS.2001.922175},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ErikssonLA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ErikssonLM01,
  author       = {Henrik Eriksson and
                  Per Larsson{-}Edefors and
                  William P. Marnane},
  title        = {A regular parallel multiplier which utilizes multiple carry-propagate
                  adders},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {166--169},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922198},
  doi          = {10.1109/ISCAS.2001.922198},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ErikssonLM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FanucciDMPN01,
  author       = {Luca Fanucci and
                  Giorgio D'Angelo and
                  Andrea Monterastelli and
                  Mario Paparo and
                  Bruno Neri},
  title        = {Fully integrated low-noise-amplifier with high quality factor {L-C}
                  filter for 1.8 GHz wireless applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {462--465},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922273},
  doi          = {10.1109/ISCAS.2001.922273},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/FanucciDMPN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FanucciRS01,
  author       = {Luca Fanucci and
                  Roberto Roncella and
                  Roberto Saletti},
  title        = {Non-linearity reduction technique for delay-locked delay-lines},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {430--433},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922265},
  doi          = {10.1109/ISCAS.2001.922265},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FanucciRS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FayedB01,
  author       = {Ayman A. Fayed and
                  Magdy A. Bayoumi},
  title        = {A low power 10-transistor full adder cell for embedded architectures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {226--229},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922213},
  doi          = {10.1109/ISCAS.2001.922213},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FayedB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FornaciariSSZ01,
  author       = {William Fornaciari and
                  Donatella Sciuto and
                  Cristina Silvano and
                  Vittorio Zaccaria},
  title        = {Fast system-level exploration of memory architectures driven by energy-delay
                  metrics},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {502--505},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922284},
  doi          = {10.1109/ISCAS.2001.922284},
  timestamp    = {Wed, 14 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/FornaciariSSZ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FouzarSS01,
  author       = {Youcef Fouzar and
                  Yvon Savaria and
                  Mohamad Sawan},
  title        = {A new controlled gain phase-locked loop technique},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {810--813},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922361},
  doi          = {10.1109/ISCAS.2001.922361},
  timestamp    = {Mon, 18 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/FouzarSS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FuDJ01,
  author       = {Minyi Fu and
                  Vassil S. Dimitrov and
                  Graham A. Jullien},
  title        = {An efficient technique for error-free algebraic-integer encoding for
                  high performance implementation of the {DCT} and {IDCT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {906--909},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922385},
  doi          = {10.1109/ISCAS.2001.922385},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FuDJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GaoP01,
  author       = {Lijun Gao and
                  Keshab K. Parhi},
  title        = {Custom {VLSI} design of efficient low latency and low power finite
                  field multiplier for Reed-Solomon codec},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {574--577},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922302},
  doi          = {10.1109/ISCAS.2001.922302},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GaoP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GarrettS01,
  author       = {David Garrett and
                  Mircea R. Stan},
  title        = {A 2.5 Mb/s, 23 mW {SOVA} traceback chip for turbo decoding applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {61--64},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922169},
  doi          = {10.1109/ISCAS.2001.922169},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/GarrettS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GarrettS01a,
  author       = {Joshua L. Garrett and
                  Mircea R. Stan},
  title        = {Active threshold compensation circuit for improved performance in
                  cooled {CMOS} systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {410--413},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922260},
  doi          = {10.1109/ISCAS.2001.922260},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/GarrettS01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GetzlaffSGS01,
  author       = {Stefan Getzlaff and
                  J{\"{o}}rg Schreiter and
                  Achim Graupner and
                  Ren{\'{e}} Sch{\"{u}}ffny},
  title        = {A system-on-chip realization of a {CMOS} image sensor with programmable
                  analog image preprocessing},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {486--489},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922280},
  doi          = {10.1109/ISCAS.2001.922280},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GetzlaffSGS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GloriaO01,
  author       = {Alessandro De Gloria and
                  Mauro Olivieri},
  title        = {An application specific multi-port {RAM} cell circuit for register
                  renaming units in high speed microprocessors},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {934--937},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922392},
  doi          = {10.1109/ISCAS.2001.922392},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GloriaO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GrassertT01,
  author       = {Frank Grassert and
                  Dirk Timmermann},
  title        = {Dynamic single phase logic with self-timed stages for power reduction
                  in pipeline circuit designs},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {144--147},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922191},
  doi          = {10.1109/ISCAS.2001.922191},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GrassertT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Grossschadl01,
  author       = {Johann Gro{\ss}sch{\"{a}}dl},
  title        = {A low-power bit-serial multiplier for finite fields GF(2m)},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {37--40},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922163},
  doi          = {10.1109/ISCAS.2001.922163},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Grossschadl01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Guo01,
  author       = {Jiun{-}In Guo},
  title        = {A low cost 2-D inverse discrete cosine transform design for image
                  compression},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {658--661},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922323},
  doi          = {10.1109/ISCAS.2001.922323},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Guo01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Guo01a,
  author       = {Jiun{-}In Guo},
  title        = {A new DA-based array for one dimensional discrete Hartley transform},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {662--665},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922324},
  doi          = {10.1109/ISCAS.2001.922324},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Guo01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GyodaKOHO01,
  author       = {Koichi Gyoda and
                  Youiti Kado and
                  Yuichiro Ohno and
                  Kazuo Hasuike and
                  Takashi Ohira},
  title        = {WACNet - Wireless Ad-hoc Community Network},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {862--865},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922374},
  doi          = {10.1109/ISCAS.2001.922374},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GyodaKOHO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HamalainenHHCS01,
  author       = {Panu H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Marko H{\"{a}}nnik{\"{a}}inen and
                  Timo H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Henk Corporaal and
                  Jukka Saarinen},
  title        = {Implementation of encryption algorithms on transport triggered architectures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {726--729},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922340},
  doi          = {10.1109/ISCAS.2001.922340},
  timestamp    = {Sat, 11 Nov 2017 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/HamalainenHHCS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HamamotoWA01,
  author       = {Takayuki Hamamoto and
                  Takeshi Wakamatsu and
                  Kiyoharu Aizawa},
  title        = {New method of on-sensor {A/D} conversion},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {818--821},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922363},
  doi          = {10.1109/ISCAS.2001.922363},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/HamamotoWA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HanEKC01,
  author       = {Kyungtae Han and
                  Iksu Eo and
                  Kyungsu Kim and
                  Hanjin Cho},
  title        = {Numerical word-length optimization for {CDMA} demodulator},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {290--293},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922229},
  doi          = {10.1109/ISCAS.2001.922229},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HanEKC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HarveyH01,
  author       = {Jackson Harvey and
                  Ramesh Harjani},
  title        = {Analysis and gain design of an integrated quadrature mixer with improved
                  noise and image rejection},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {786--789},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922355},
  doi          = {10.1109/ISCAS.2001.922355},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HarveyH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HeHJZH01,
  author       = {Di He and
                  Chen He and
                  Ling{-}ge Jiang and
                  Hong{-}Wen Zhu and
                  Guang{-}Rui Hu},
  title        = {Phase tracking of {CDMA} spreading sequences using dynamic chaotic
                  synchronization},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {282--285},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922227},
  doi          = {10.1109/ISCAS.2001.922227},
  timestamp    = {Mon, 13 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/HeHJZH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HeS01,
  author       = {Yigang He and
                  Yichuang Sun},
  title        = {Fault isolation in nonlinear analog circuits with tolerance using
                  the neural network-based L1-norm},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {854--857},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922372},
  doi          = {10.1109/ISCAS.2001.922372},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HeS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HeiskanenMR01,
  author       = {Antti Heiskanen and
                  Antti M{\"{a}}ntyniemi and
                  Timo Rahkonen},
  title        = {A 30 MHz {DDS} clock generator with sub-ns time domain interpolator
                  and -50 dBc spurious level},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {626--629},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922315},
  doi          = {10.1109/ISCAS.2001.922315},
  timestamp    = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/HeiskanenMR01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HowlandB01,
  author       = {Chris J. Howland and
                  Andrew J. Blanksby},
  title        = {Parallel decoding architectures for low density parity check codes},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {742--745},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922344},
  doi          = {10.1109/ISCAS.2001.922344},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HowlandB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiaoHYC01,
  author       = {Ming{-}Jun Hsiao and
                  Jing{-}Reng Huang and
                  Shao{-}Shen Yang and
                  Tsin{-}Yuan Chang},
  title        = {A low-cost {CMOS} time interval measurement core},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {190--193},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922204},
  doi          = {10.1109/ISCAS.2001.922204},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoHYC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiaoWJ01,
  author       = {Ilion Yi{-}Liang Hsiao and
                  Ding{-}Hao Wang and
                  Chein{-}Wei Jen},
  title        = {Power modeling and low-power design of content addressable memories},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {926--929},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922390},
  doi          = {10.1109/ISCAS.2001.922390},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoWJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiehHH01,
  author       = {Ming{-}Ta Hsieh and
                  Jackson Harvey and
                  Ramesh Harjani},
  title        = {Power optimization of {CMOS} {LC} VCOs},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {718--721},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922338},
  doi          = {10.1109/ISCAS.2001.922338},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiehHH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsuHC01,
  author       = {Chien{-}Fang Hsu and
                  Yuan{-}Hao Huang and
                  Tzi{-}Dar Chiueh},
  title        = {Design of an {OFDM} receiver for high-speed wireless {LAN}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {558--561},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922298},
  doi          = {10.1109/ISCAS.2001.922298},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsuHC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangW01,
  author       = {Hong{-}Yi Huang and
                  Teng{-}Neng Wang},
  title        = {High-speed {CMOS} logic circuits in capacitor coupling technique},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {634--637},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922317},
  doi          = {10.1109/ISCAS.2001.922317},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangWCHL01,
  author       = {J. C. Huang and
                  Ro{-}Min Weng and
                  Cheng{-}Chih Chang and
                  Kang Hsu and
                  Kun{-}Yi Lin},
  title        = {A 2 {V} 2.4 GHz fully integrated {CMOS} {LNA}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {466--469},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922274},
  doi          = {10.1109/ISCAS.2001.922274},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangWCHL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangWH01,
  author       = {Chung{-}Hsun Huang and
                  Jinn{-}Shyan Wang and
                  Yan{-}Chao Huang},
  title        = {A high-speed {CMOS} incrementer/decrementer},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {88--91},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922177},
  doi          = {10.1109/ISCAS.2001.922177},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangWH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangYL01,
  author       = {Chun{-}Yueh Huang and
                  Gwo{-}Jeng Yu and
                  Bin{-}Da Liu},
  title        = {A hardware design approach for merge-sorting network},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {534--537},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922292},
  doi          = {10.1109/ISCAS.2001.922292},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangYL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HussB01,
  author       = {Scott D. Huss and
                  John Bennett},
  title        = {An efficient model for twisted-pair cables with discontinuities and
                  stubs for discrete time simulations},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {254--257},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922220},
  doi          = {10.1109/ISCAS.2001.922220},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HussB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HussainB01a,
  author       = {Zahir M. Hussain and
                  Boualem Boashash},
  title        = {Statistical analysis of the time-delay digital tanlock loop in the
                  presence of Gaussian noise},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {21--24},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922158},
  doi          = {10.1109/ISCAS.2001.922158},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HussainB01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HwangHL01,
  author       = {Yin{-}Tsung Hwang and
                  Jih{-}Cheng Han and
                  Jing{-}Yi Liu},
  title        = {Design and implementation of channel equalizers for block transmission
                  systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {354--357},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922246},
  doi          = {10.1109/ISCAS.2001.922246},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HwangHL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IbrahimA01,
  author       = {Mohammad K. Ibrahim and
                  Abulaziz Almulhem},
  title        = {Bit-level pipelined digit serial GF(2m) multiplier},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {586--589},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922305},
  doi          = {10.1109/ISCAS.2001.922305},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/IbrahimA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JagasivamaniH01,
  author       = {Meenatchi Jagasivamani and
                  Dong Sam Ha},
  title        = {Development of a low-power {SRAM} compiler},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {498--501},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922283},
  doi          = {10.1109/ISCAS.2001.922283},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JagasivamaniH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Jain01,
  author       = {Vijay K. Jain},
  title        = {Hybrid wavelet/spread-spectrum system for broadband wireless LANs},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {554--557},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922297},
  doi          = {10.1109/ISCAS.2001.922297},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Jain01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JainFTPLSL01,
  author       = {Raj K. Jain and
                  R. Frenzel and
                  M. Terschluse and
                  Pramod K. Pandey and
                  Seo H. Low and
                  Biju Sukumaran and
                  Lup M. Lam},
  title        = {System-on-chip design of a four-port ADSL-lite Data {DSP}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {242--245},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922217},
  doi          = {10.1109/ISCAS.2001.922217},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JainFTPLSL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JarvinenTAS01,
  author       = {Tuomas J{\"{a}}rvinen and
                  Jarmo Takala and
                  David Akopian and
                  Jukka Saarinen},
  title        = {Register-based multi-port perfect shuffle networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {306--309},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922233},
  doi          = {10.1109/ISCAS.2001.922233},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JarvinenTAS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JayalathT01,
  author       = {A. Dhammika S. Jayalath and
                  Chintha Tellambura},
  title        = {Peak-to-average power ratio reduction of an {OFDM} signal using data
                  permutation with embedded side information},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {562--565},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922299},
  doi          = {10.1109/ISCAS.2001.922299},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JayalathT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JoKS01,
  author       = {Byung G. Jo and
                  Jin Y. Kang and
                  Myung Hoon Sunwoo},
  title        = {A low power and area efficient {FIR} filter chip for {PRML} read channels},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {606--609},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922310},
  doi          = {10.1109/ISCAS.2001.922310},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JoKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouKCKLL01,
  author       = {Shyh{-}Jye Jou and
                  Shu{-}Hua Kuo and
                  Jui{-}Ta Chiu and
                  Chu King and
                  Chien{-}Hsiung Lee and
                  Tim Liu},
  title        = {A serial link transceiver for {USB2} high-speed mode},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {72--75},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922172},
  doi          = {10.1109/ISCAS.2001.922172},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JouKCKLL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JungCL01,
  author       = {Tang Jing Jung and
                  King Sau Cheung and
                  Jack Lau},
  title        = {A 2.4 GHz four port mixer for direct conversion used in telemetering},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {378--381},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922252},
  doi          = {10.1109/ISCAS.2001.922252},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JungCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JungKK01,
  author       = {Seong{-}Ook Jung and
                  Ki{-}Wook Kim and
                  Sung{-}Mo Kang},
  title        = {Noise constrained power optimization for dual {VT} domino logic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {158--161},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922196},
  doi          = {10.1109/ISCAS.2001.922196},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JungKK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JungYKK01,
  author       = {Seong{-}Ook Jung and
                  Seung{-}Moon Yoo and
                  Ki{-}Wook Kim and
                  Sung{-}Mo Kang},
  title        = {Skew-tolerant high-speed {(STHS)} domino logic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {154--157},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922195},
  doi          = {10.1109/ISCAS.2001.922195},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JungYKK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KangK01,
  author       = {Jin{-}Ku Kang and
                  Dong{-}Hee Kim},
  title        = {A {CMOS} clock and data recovery with two-XOR phase-frequency detector
                  circuit},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {266--269},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922223},
  doi          = {10.1109/ISCAS.2001.922223},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KangK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KaragianniS01,
  author       = {Konstantina Karagianni and
                  Thanos Stouraitis},
  title        = {A vector processor for 3-D geometrical transformations},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {482--485},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922279},
  doi          = {10.1109/ISCAS.2001.922279},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KaragianniS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KarvonenRK01,
  author       = {Sami Karvonen and
                  Tom A. D. Riley and
                  Juha Kostamovaara},
  title        = {A low noise quadrature subsampling mixer},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {790--793},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922356},
  doi          = {10.1109/ISCAS.2001.922356},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KarvonenRK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KaunistoKKH01,
  author       = {Risto Kaunisto and
                  Petri Korpi and
                  Jiri Kiraly and
                  Kari Halonen},
  title        = {A linear-control wide-band {CMOS} attenuator},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {458--461},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922272},
  doi          = {10.1109/ISCAS.2001.922272},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KaunistoKKH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KawaguchiZLS01,
  author       = {Hiroshi Kawaguchi and
                  Gang Zhang and
                  Seongsoo Lee and
                  Takayasu Sakurai},
  title        = {An {LSI} for VDD-hopping and {MPEG4} system based on the chip},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {918--921},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922388},
  doi          = {10.1109/ISCAS.2001.922388},
  timestamp    = {Mon, 11 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/KawaguchiZLS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KawahitioET01,
  author       = {Shoji Kawahito and
                  Tatsuya Eki and
                  Yoshiaki Tadokoro},
  title        = {A bit-serial column parallel processing architecture for on-sensor
                  discrete Fourier transform},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {738--741},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922343},
  doi          = {10.1109/ISCAS.2001.922343},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KawahitioET01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KayedRES01,
  author       = {Somaya Ismail Kayed and
                  Hani Fikry Ragaie and
                  Mohamed Abou El{-}Ela and
                  Fouad Abd Monem Soliman},
  title        = {{VLSI} design and implementation of analog {CMOS} 2nd generation current
                  conveyors},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {850--853},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922371},
  doi          = {10.1109/ISCAS.2001.922371},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KayedRES01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KazakovaSDML01,
  author       = {Natalia Kazakova and
                  Raymond J. Sung and
                  Nelson G. Durdle and
                  Martin Margala and
                  Julien Lamoureux},
  title        = {Fast and low-power inner product processor},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {646--649},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922320},
  doi          = {10.1109/ISCAS.2001.922320},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KazakovaSDML01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KerC01,
  author       = {Ming{-}Dou Ker and
                  Tung{-}Yang Chen},
  title        = {Design on the turn-on efficient power-rail {ESD} clamp circuit with
                  stacked polysilicon diodes},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {758--761},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922348},
  doi          = {10.1109/ISCAS.2001.922348},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KerC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KerCW01,
  author       = {Ming{-}Dou Ker and
                  Tung{-}Yang Chen and
                  Chung{-}Yu Win},
  title        = {{ESD} protection design in a 0.18-um salicide {CMOS} technology by
                  using substrate-triggered technique},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {754--757},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922347},
  doi          = {10.1109/ISCAS.2001.922347},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KerCW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KhouasD01,
  author       = {Abdelhakim Khouas and
                  Anne Derieux},
  title        = {{FDP:} fault detection probability function for analog circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {17--20},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922157},
  doi          = {10.1109/ISCAS.2001.922157},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KhouasD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KilicZ01,
  author       = {Yavuz Kili{\c{c}} and
                  Mark Zwolinski},
  title        = {Process variation independent built-in current sensor for analogue
                  built-in self-test},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {398--401},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922257},
  doi          = {10.1109/ISCAS.2001.922257},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KilicZ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimH01,
  author       = {Jonghae Kim and
                  Ramesh Harjani},
  title        = {An {ISM} band {CMOS} integrated transceiver design for wireless telemetry
                  system},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {694--697},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922332},
  doi          = {10.1109/ISCAS.2001.922332},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimK01,
  author       = {Youngjoon Kim and
                  Lee{-}Sup Kim},
  title        = {A low power carry select adder with reduced area},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {218--221},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922211},
  doi          = {10.1109/ISCAS.2001.922211},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimK01a,
  author       = {Chulwoo Kim and
                  Sung{-}Mo Kang},
  title        = {A low-power reduced swing single clock flip-flop},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {806--809},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922360},
  doi          = {10.1109/ISCAS.2001.922360},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimK01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimKK01,
  author       = {Chulwoo Kim and
                  Ki{-}Wook Kim and
                  Sung{-}Mo Kang},
  title        = {Energy-efficient skewed static logic design with dual Vt},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {882--885},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922379},
  doi          = {10.1109/ISCAS.2001.922379},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimKK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimLL01,
  author       = {Ju Byoung Kim and
                  Young Jin Lim and
                  Moon Ho Lee},
  title        = {A low complexity {FEC} design for {DAB}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {522--525},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922289},
  doi          = {10.1109/ISCAS.2001.922289},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimLL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KivekasPJRH01,
  author       = {Kalle Kivek{\"{a}}s and
                  Aarno P{\"{a}}rssinen and
                  Jarkko Jussila and
                  Jussi Ryyn{\"{a}}nen and
                  Kari Halonen},
  title        = {Design of low-voltage active mixer for direct conversion receivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {382--385},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922253},
  doi          = {10.1109/ISCAS.2001.922253},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KivekasPJRH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KlaukeG01,
  author       = {Stephan Klauke and
                  J{\"{u}}rgen G{\"{o}}tze},
  title        = {Low power enhancements for parallel algorithms},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {234--237},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922215},
  doi          = {10.1109/ISCAS.2001.922215},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KlaukeG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KwonL01,
  author       = {Chang{-}Ki Kwon and
                  Kwyro Lee},
  title        = {Reconfigurable and programmable minimum distance search engine for
                  portable video compression systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {542--545},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922294},
  doi          = {10.1109/ISCAS.2001.922294},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KwonL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KwonYHKC01,
  author       = {Taek Won Kwon and
                  Chang{-}Seok You and
                  Won{-}Seok Heo and
                  Yong{-}Kyu Kang and
                  Jun Rim Choi},
  title        = {Two implementation methods of a 1024-bit {RSA} cryptoprocessor based
                  on modified Montgomery algorithm},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {650--653},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922321},
  doi          = {10.1109/ISCAS.2001.922321},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KwonYHKC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LaiS01,
  author       = {Yeong{-}Kang Lai and
                  Yu{-}Chuan Shu},
  title        = {{VLSI} architecture design and implementation for {BLOWFISH} block
                  cipher with secure modes of operation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {57--60},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922168},
  doi          = {10.1109/ISCAS.2001.922168},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LaiS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LaiW01,
  author       = {Sheng{-}Yeh Lai and
                  Jinn{-}Shyan Wang},
  title        = {A high-efficiency {CMOS} charge pump circuit},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {406--409},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922259},
  doi          = {10.1109/ISCAS.2001.922259},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LaiW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LampinenV01,
  author       = {Harri Lampinen and
                  Olli Vainio},
  title        = {Dynamically biased current sensor for current-sensing completion detection},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {394--397},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922256},
  doi          = {10.1109/ISCAS.2001.922256},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LampinenV01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeCBC01,
  author       = {Chi{-}Wai Lee and
                  Chiu{-}sing Choy and
                  Jan Butas and
                  Cheong{-}Fat Chan},
  title        = {A pipelined dataflow small micro-coded asynchronous processor and
                  its application to {DCT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {910--913},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922386},
  doi          = {10.1109/ISCAS.2001.922386},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeCBC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeHBK01,
  author       = {Jaesik Lee and
                  Yoonjong Huh and
                  Peter Bendix and
                  Sung{-}Mo Kang},
  title        = {Design-for-ESD-reliability for high-frequency {I/O} interface circuits
                  in deep-submicron {CMOS} technology},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {746--749},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922345},
  doi          = {10.1109/ISCAS.2001.922345},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeHBK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeJ01a,
  author       = {Inseop Lee and
                  W. Kenneth Jenkins},
  title        = {Pipelined implementation of the adaptive canceller-equalizer},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {76--80},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922173},
  doi          = {10.1109/ISCAS.2001.922173},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeJ01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeLL01,
  author       = {Chiou{-}Yng Lee and
                  Erl{-}Huei Lu and
                  Jau{-}Yien Lee},
  title        = {New bit-parallel systolic multipliers for a class of GF(2m)},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {578--581},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922303},
  doi          = {10.1109/ISCAS.2001.922303},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeLL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeLSSLY01,
  author       = {Jaeseo Lee and
                  Jae{-}Won Lim and
                  Sung{-}Jun Song and
                  Sung{-}Sik Song and
                  Wang{-}joo Lee and
                  Hoi{-}Jun Yoo},
  title        = {Design and implementation of {CMOS} {LVDS} 2.5 Gb/s transmitter and
                  1.3 Gb/s receiver for optical interconnections},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {702--705},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922334},
  doi          = {10.1109/ISCAS.2001.922334},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeLSSLY01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeP01a,
  author       = {Sung{-}Won Lee and
                  In{-}Cheol Park},
  title        = {A low-power variable length decoder based on successive decoding of
                  shoft codewords},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {582--585},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922304},
  doi          = {10.1109/ISCAS.2001.922304},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeP01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeYL01,
  author       = {Yew{-}San Lee and
                  Cheng{-}Mou Yu and
                  Chen{-}Yi Lee},
  title        = {Error resilient hybrid variable length codec with tough error synchronization
                  for wireless image transmission},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {326--329},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922238},
  doi          = {10.1109/ISCAS.2001.922238},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeYL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeiN01,
  author       = {Jing Lei and
                  Tung{-}Sang Ng},
  title        = {New {AFC} algorithm for a fully-digital {MDPSK} {DS/CDMA} receiver},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {294--297},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922230},
  doi          = {10.1109/ISCAS.2001.922230},
  timestamp    = {Thu, 19 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeiN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeonBHP01,
  author       = {Daniel Leon and
                  Sina Balkir and
                  Michael W. Hoffman and
                  Lance C. P{\'{e}}rez},
  title        = {Robust chaotic {PN} sequence generation techniques},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {53--56},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922167},
  doi          = {10.1109/ISCAS.2001.922167},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeonBHP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeungCC01,
  author       = {Lai{-}Kan Leung and
                  Cheong{-}Fat Chan and
                  Oliver Chiu{-}sing Choy},
  title        = {A giga-hertz {CMOS} digital controlled oscillator},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {610--613},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922311},
  doi          = {10.1109/ISCAS.2001.922311},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeungCC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiGC01,
  author       = {Huiyun Li and
                  Bah{-}Hwee Gwee and
                  Joseph Sylvester Chang},
  title        = {A digital Class {D} amplifier design embodying a novel sampling process
                  and pulse generator},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {826--829},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922365},
  doi          = {10.1109/ISCAS.2001.922365},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiGC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiI01,
  author       = {Xiaopeng Li and
                  Mohammed Ismail},
  title        = {A single-chip {CMOS} front-end receiver architecture for multi-standard
                  wireless applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {374--377},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922251},
  doi          = {10.1109/ISCAS.2001.922251},
  timestamp    = {Tue, 24 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/LiI01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiljebergPI01,
  author       = {Pasi Liljeberg and
                  Juha Plosila and
                  Jouni Isoaho},
  title        = {Asynchronous interface for locally clocked modules in {ULSI} systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {170--173},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922199},
  doi          = {10.1109/ISCAS.2001.922199},
  timestamp    = {Sat, 16 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiljebergPI01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LimL01,
  author       = {Jee G. Lim and
                  Cheng{-}Chew Lim},
  title        = {A parallel architecture for estimating 4th-order cumulants},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {322--325},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922237},
  doi          = {10.1109/ISCAS.2001.922237},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LimL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinCS01,
  author       = {Hongchin Lin and
                  Yi{-}Fan Chen and
                  Hsien{-}Chih She},
  title        = {A low-power 3-phase half rail pass-gate differential logic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {148--151},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922192},
  doi          = {10.1109/ISCAS.2001.922192},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinCS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinJ01a,
  author       = {Tay{-}Jyi Lin and
                  Chein{-}Wei Jen},
  title        = {An efficient 2-D {DWT} architecture via resource cycling},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {914--917},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922387},
  doi          = {10.1109/ISCAS.2001.922387},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinJ01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinW01,
  author       = {Shou{-}Sheu Lin and
                  Wen{-}Rong Wu},
  title        = {A low complexity adaptive interpolated {FIR} echo canceller},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {438--441},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922267},
  doi          = {10.1109/ISCAS.2001.922267},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuCSLJ01,
  author       = {Maw{-}Ching Lin and
                  Chien{-}Lung Chen and
                  Ding{-}Yu Shin and
                  Chin{-}Hung Lin and
                  Shyh{-}Jye Jou},
  title        = {Low-power multiplierless {FIR} filter synthesizer based on {CSD} code},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {666--669},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922325},
  doi          = {10.1109/ISCAS.2001.922325},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiuCSLJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuMK01,
  author       = {San Lin and
                  Samiha Mourad and
                  Shoba Krishnan},
  title        = {At-speed testing of data communications transceivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {9--12},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922155},
  doi          = {10.1109/ISCAS.2001.922155},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiuMK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuWHL01,
  author       = {Yi{-}Chuan Liu and
                  Chung{-}Cheng Wang and
                  Terng{-}Yin Hsu and
                  Chen{-}Yi Lee},
  title        = {A wideband digital frequency synthesizer},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {710--713},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922336},
  doi          = {10.1109/ISCAS.2001.922336},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiuWHL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LoSW01,
  author       = {Hsin{-}Fu Lo and
                  Ming{-}Der Shieh and
                  Chien{-}Ming Wu},
  title        = {Design of an efficient {FFT} processor for {DAB} system},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {654--657},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922322},
  doi          = {10.1109/ISCAS.2001.922322},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LoSW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lopez-ValcarceD01,
  author       = {Roberto L{\'{o}}pez{-}Valcarce and
                  Soura Dasgupta},
  title        = {Second order statistics based blind channel equalization with correlated
                  sources},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {366--369},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922249},
  doi          = {10.1109/ISCAS.2001.922249},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Lopez-ValcarceD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuE01,
  author       = {Ye Lu and
                  Mourad N. El{-}Gamal},
  title        = {A 2.3 {V} low noise, low power, 10 GHz bandwidth Si-bipolar transimpedance
                  preamplifier for optical receiver front-ends},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {834--837},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922367},
  doi          = {10.1109/ISCAS.2001.922367},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LuE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuH01,
  author       = {Shyue{-}Kung Lu and
                  Chih{-}Hsien Hsu},
  title        = {Built-In self-repair for divided word line memory},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {13--16},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922156},
  doi          = {10.1109/ISCAS.2001.922156},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LuH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuijtenEM01,
  author       = {Ronald P. Luijten and
                  Antonius P. J. Engbersen and
                  Cyriel Minkenberg},
  title        = {Shared memory switching + virtual output queuing: {A} robust and scalable
                  switch},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {274--277},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922225},
  doi          = {10.1109/ISCAS.2001.922225},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LuijtenEM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LustenbergerL01,
  author       = {Felix Lustenberger and
                  Hans{-}Andrea Loeliger},
  title        = {On mismatch errors in analog-VLSI error correcting decoders},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {198--201},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922206},
  doi          = {10.1109/ISCAS.2001.922206},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LustenbergerL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MagesacherONLIB01,
  author       = {Thomas Magesacher and
                  Per {\"{O}}dling and
                  Tomas Nordstr{\"{o}}m and
                  T. Lunberg and
                  Mikael Isaksson and
                  Per Ola B{\"{o}}rjesson},
  title        = {An adaptive mixed-signal narrowband interference canceller for wireline
                  transmission systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {450--453},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922270},
  doi          = {10.1109/ISCAS.2001.922270},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MagesacherONLIB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Mahmoodi-MeimandA01,
  author       = {Hamid Mahmoodi{-}Meimand and
                  Ali Afzali{-}Kusha},
  title        = {Efficient power clock generation for adiabatic logic},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {642--645},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922319},
  doi          = {10.1109/ISCAS.2001.922319},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Mahmoodi-MeimandA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MakidoYOKO01,
  author       = {Satoshi Makido and
                  Takaya Yamazato and
                  Hiraku Okada and
                  Masaaki Katayama and
                  Akira Ogawa},
  title        = {A design of source matched {MAP} receiver for image transmission},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {136--139},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922189},
  doi          = {10.1109/ISCAS.2001.922189},
  timestamp    = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/MakidoYOKO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MakundiVL01,
  author       = {Martin Makundi and
                  Vesa V{\"{a}}lim{\"{a}}ki and
                  Timo I. Laakso},
  title        = {Closed-form design of tunable fractional-delay allpass filter structures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {434--437},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922266},
  doi          = {10.1109/ISCAS.2001.922266},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MakundiVL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MaseNNKSS01,
  author       = {Kenichi Mase and
                  Ritsuko Noto and
                  Keisuke Nakano and
                  Naoyuki Karasawa and
                  Masakazu Sengoku and
                  Shoji Shinoda},
  title        = {A circuit-connection-based multihop wireless infrastructure for local
                  communities},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {898--901},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922383},
  doi          = {10.1109/ISCAS.2001.922383},
  timestamp    = {Thu, 26 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/MaseNNKSS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MaximSSHCS01,
  author       = {Adrian Maxim and
                  Baker Scott and
                  Ed Schneider and
                  Melvin Hagge and
                  Steve Chacko and
                  Dan Stiurca},
  title        = {Sample-reset loop filter architecture for process independent and
                  ripple-pole-less low jitter {CMOS} charge-pump PLLs},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {766--769},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922350},
  doi          = {10.1109/ISCAS.2001.922350},
  timestamp    = {Tue, 18 Dec 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/MaximSSHCS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/McCormickGTAE01,
  author       = {Andrew C. McCormick and
                  Peter M. Grant and
                  John S. Thompson and
                  Tughrul Arslan and
                  Ahmet T. Erdogan},
  title        = {A low power {MMSE} receiver architecture for multi-carrier {CDMA}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {41--44},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922164},
  doi          = {10.1109/ISCAS.2001.922164},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/McCormickGTAE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/McEachenCT01,
  author       = {John C. McEachen and
                  Ow Kong Chung and
                  Lim Chin Thong},
  title        = {A system level description and model of Signaling System No 7},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {258--261},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922221},
  doi          = {10.1109/ISCAS.2001.922221},
  timestamp    = {Wed, 06 Jun 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/McEachenCT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeerS01,
  author       = {Paul R. van der Meer and
                  Arie van Staveren},
  title        = {Effectivity of standby-energy reduction techniques for deep sub-micron
                  {CMOS}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {594--597},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922307},
  doi          = {10.1109/ISCAS.2001.922307},
  timestamp    = {Fri, 26 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/MeerS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MichaelP01,
  author       = {Sherif Michael and
                  Ronald J. Pieper},
  title        = {A {VLSI} implementation of a universal programmable low sensitivity
                  sampled data filter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {674--677},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922327},
  doi          = {10.1109/ISCAS.2001.922327},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MichaelP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MitsuyamaAOS01,
  author       = {Yukio Mitsuyama and
                  Zaldy Andales and
                  Takao Onoye and
                  Isao Shirakawa},
  title        = {{VLSI} architecture of dynamically reconfigurable hardware-based cipher},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {734--737},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922342},
  doi          = {10.1109/ISCAS.2001.922342},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MitsuyamaAOS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MiyashitaINSO01,
  author       = {Kiyoshi Miyashita and
                  Susumu Ichikawa and
                  Yoshihiro Nakao and
                  Naoto Shimataka and
                  Takuji Otuki},
  title        = {110 MHz IF-baseband {CMOS} receiver for {J-CDMA/AMPS} application},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {690--693},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922331},
  doi          = {10.1109/ISCAS.2001.922331},
  timestamp    = {Wed, 18 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MiyashitaINSO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MoisiadisBA01,
  author       = {Yiannis Moisiadis and
                  Ilias Bouras and
                  Angela Arapoyanni},
  title        = {A {CMOS} differential logic for low-power and high-speed applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {140--143},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922190},
  doi          = {10.1109/ISCAS.2001.922190},
  timestamp    = {Sat, 21 Oct 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MoisiadisBA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MoisiadisBAD01,
  author       = {Yiannis Moisiadis and
                  Ilias Bouras and
                  Angela Arapoyanni and
                  Lampros Dermentzoglou},
  title        = {A high-performance low-power static differential double edge-triggered
                  flip-flop},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {802--805},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922359},
  doi          = {10.1109/ISCAS.2001.922359},
  timestamp    = {Tue, 16 Apr 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MoisiadisBAD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Moncunil-GenizMP01,
  author       = {F. Xavier Moncunill{-}Geniz and
                  Orestes Mas{-}Casals and
                  Pere Pal{\`{a}}{-}Sch{\"{o}}nw{\"{a}}lder},
  title        = {A comparative analysis of direct-sequence spread-spectrum super-regenerative
                  architectures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {120--123},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922185},
  doi          = {10.1109/ISCAS.2001.922185},
  timestamp    = {Wed, 11 Apr 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Moncunil-GenizMP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Montiel-NelsonASNN01,
  author       = {Juan A. Montiel{-}Nelson and
                  De de Armas and
                  Roberto Sarmiento and
                  Antonio N{\'{u}}{\~{n}}ez and
                  Saeid Nooshabadi},
  title        = {A compact layout technique to minimize high frequency switching effects
                  in high speed circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {96--99},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922179},
  doi          = {10.1109/ISCAS.2001.922179},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Montiel-NelsonASNN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MortezapourL01,
  author       = {Siamak Mortezapour and
                  Edward K. F. Lee},
  title        = {A reconfigurable pipelined data converter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {314--317},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922235},
  doi          = {10.1109/ISCAS.2001.922235},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MortezapourL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MoshnyagaT01,
  author       = {Vasily G. Moshnyaga and
                  Hiroshi Tsuji},
  title        = {Cache energy reduction by dual voltage supply},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {922--925},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922389},
  doi          = {10.1109/ISCAS.2001.922389},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/MoshnyagaT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NakadaIKNOSI01,
  author       = {Hiroshi Nakada and
                  Hideyuki Ito and
                  Ryusuke Konishi and
                  Akira Nagoya and
                  Kiyoshi Oguri and
                  Tsunemichi Shiozawa and
                  Norbert Imlig},
  title        = {Self-reorganising systems on {VLSI} circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {310--313},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922234},
  doi          = {10.1109/ISCAS.2001.922234},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NakadaIKNOSI01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NekiliSB01,
  author       = {Mohamed Nekili and
                  Yvon Savaria and
                  Guy Bois},
  title        = {Minimizing process-induced skew using delay tuning},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {426--429},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922264},
  doi          = {10.1109/ISCAS.2001.922264},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NekiliSB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NgYC01,
  author       = {Tung{-}Sang Ng and
                  Kun{-}Wah Yip and
                  Chin{-}Long Cheng},
  title        = {An all-lag rotating-reference correlator and its efficient implementation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {25--28},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922160},
  doi          = {10.1109/ISCAS.2001.922160},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NgYC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NikaraTAS01,
  author       = {Jari Nikara and
                  Jarmo Takala and
                  David Akopian and
                  Jukka Saarinen},
  title        = {Pipeline architecture for {DCT/IDCT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {902--905},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922384},
  doi          = {10.1109/ISCAS.2001.922384},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NikaraTAS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OgawaKS01,
  author       = {Tomoaki Ogawa and
                  Eisuke Kudoh and
                  Hirohito Suda},
  title        = {Multi-routing schemes for ad-hoc wireless networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {866--869},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922375},
  doi          = {10.1109/ISCAS.2001.922375},
  timestamp    = {Tue, 29 Oct 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/OgawaKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Ohira01,
  author       = {Takashi Ohira},
  title        = {Emerging adaptive antenna techniques for wireless ad-hoc networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {858--861},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922373},
  doi          = {10.1109/ISCAS.2001.922373},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Ohira01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OlivieriT01,
  author       = {Mauro Olivieri and
                  Alessandro Trifiletti},
  title        = {An all-digital clock generator firm-core based on differential fine-tuned
                  delay for reusable microprocessor cores},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {638--641},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922318},
  doi          = {10.1109/ISCAS.2001.922318},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/OlivieriT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OttaviCMPS01,
  author       = {Marco Ottavi and
                  Gian Carlo Cardarilli and
                  Panfilo Marinucci and
                  Salvatore Pontarelli and
                  Adelio Salsano},
  title        = {Development of a dynamic routing system for a fault tolerant solid
                  state mass memory},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {830--833},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922366},
  doi          = {10.1109/ISCAS.2001.922366},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/OttaviCMPS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PalumboPG01,
  author       = {Gaetano Palumbo and
                  Domenico Pappalardo and
                  Maurizio Gaibotti},
  title        = {Modeling and minimization of power consumption in charge pump circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {402--405},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922258},
  doi          = {10.1109/ISCAS.2001.922258},
  timestamp    = {Fri, 15 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/PalumboPG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/QuintanaA01,
  author       = {Jos{\'{e}} M. Quintana and
                  Maria J. Avedillo},
  title        = {Reed-Muller descriptions of symmetric functions},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {682--685},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922329},
  doi          = {10.1109/ISCAS.2001.922329},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/QuintanaA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RajagopalC01,
  author       = {Sridhar Rajagopal and
                  Joseph R. Cavallaro},
  title        = {A bit-streaming, pipelined multiuser detector for wireless communication
                  receivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {128--131},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922187},
  doi          = {10.1109/ISCAS.2001.922187},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/RajagopalC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RajagopalanS01,
  author       = {Kamal Rajagopalan and
                  Peter R. Sutton},
  title        = {A flexible multiplication unit for an {FPGA} logic block},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {546--549},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922295},
  doi          = {10.1109/ISCAS.2001.922295},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/RajagopalanS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RashidKA01,
  author       = {A. B. M. Harun{-}ur Rashid and
                  Mazuhidul Karim and
                  Syed Mahfuzul Aziz},
  title        = {Testing complementary pass-transistor logic circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {5--8},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922154},
  doi          = {10.1109/ISCAS.2001.922154},
  timestamp    = {Mon, 04 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/RashidKA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ReNCL01,
  author       = {Marco Re and
                  Alberto Nannarelli and
                  Gian Carlo Cardarilli and
                  Roberto Lojacono},
  title        = {{FPGA} realization of {RNS} to binary signed conversion architecture},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {350--353},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922245},
  doi          = {10.1109/ISCAS.2001.922245},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ReNCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RjoubAJK01,
  author       = {Abdoul Rjoub and
                  M. Alrousan and
                  Omar M. Al{-}Jarrah and
                  Odysseas G. Koufopavlou},
  title        = {Multi-level low swing voltage values for low power design applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {590--593},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922306},
  doi          = {10.1109/ISCAS.2001.922306},
  timestamp    = {Fri, 27 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/RjoubAJK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RosaPMRR01a,
  author       = {Jos{\'{e}} M. de la Rosa and
                  Maria Belen P{\'{e}}rez{-}Verd{\'{u}} and
                  Fernando Medeiro and
                  Roc{\'{\i}}o del R{\'{\i}}o and
                  {\'{A}}ngel Rodr{\'{\i}}guez{-}V{\'{a}}zquez},
  title        = {Analysis and experimental characterization of idle tones in 2nd-order
                  bandpass Sigma-Delta modulators-a 0.8 um {CMOS} switched-current case
                  study},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {774--777},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922352},
  doi          = {10.1109/ISCAS.2001.922352},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/RosaPMRR01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RoviraSRH01,
  author       = {Imma Rovira and
                  Pete Sivonen and
                  Sami Rintamaki and
                  Mauri Honkanen},
  title        = {Highly linear {TX} IF-chip for multicarrier {GSM} 900 and 1800 base
                  station},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {762--765},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922349},
  doi          = {10.1109/ISCAS.2001.922349},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/RoviraSRH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SalminenHKKS01,
  author       = {Erno Salminen and
                  Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Tero Kangas and
                  Kimmo Kuusilinna and
                  Jukka Saarinen},
  title        = {Interfacing multiple processors in a system-on-chip video encoder},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {478--481},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922278},
  doi          = {10.1109/ISCAS.2001.922278},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SalminenHKKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SanttiI01,
  author       = {Tero S{\"{a}}ntti and
                  Jouni Isoaho},
  title        = {Modified {SRCMOS} cell for high-throughput wave-pipelined arithmetic
                  units},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {194--197},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922205},
  doi          = {10.1109/ISCAS.2001.922205},
  timestamp    = {Fri, 02 Aug 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SanttiI01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SathananathanT01,
  author       = {Kanagaratnam Sathananthan and
                  Chintha Tellambura},
  title        = {Forward error correction codes to reduce intercarrier interference
                  in {OFDM}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {566--569},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922300},
  doi          = {10.1109/ISCAS.2001.922300},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SathananathanT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SheenC01,
  author       = {Robin R.{-}B. Sheen and
                  Oscal T.{-}C. Chen},
  title        = {A {CMOS} PLL-based frequency synthesizer for wireless communication
                  systems at 0.9, 1.8, 1.9 and 2.4 GHz},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {722--725},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922339},
  doi          = {10.1109/ISCAS.2001.922339},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SheenC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShentuA01,
  author       = {Jinwen Shentu and
                  Jean Armstrong},
  title        = {Blind frequency offset estimation for {PCC-OFDM} with symbols overlapped
                  in the time domain},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {570--573},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922301},
  doi          = {10.1109/ISCAS.2001.922301},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ShentuA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SheuLKS01,
  author       = {Ming{-}Hwa Sheu and
                  Ho{-}En Liao and
                  Shih Tsung Kan and
                  Ming{-}Der Shieh},
  title        = {A novel adaptive algorithm and {VLSI} design for frequency detection
                  in noisy environment based on adaptive {IIR} filter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {446--449},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922269},
  doi          = {10.1109/ISCAS.2001.922269},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SheuLKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Shimamura01,
  author       = {Tetsuya Shimamura},
  title        = {Nonuniform amplitude division for {ABLMS} equalisation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {49--52},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922166},
  doi          = {10.1109/ISCAS.2001.922166},
  timestamp    = {Tue, 28 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Shimamura01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShinCLNBL01,
  author       = {Jaeyoung Shin and
                  Joongho Choi and
                  Jinup Lim and
                  Sungwon Noh and
                  Namil Baek and
                  Jong{-}Hyeong Lee},
  title        = {A 3.3-V analog front-end chip for HomePNA applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {698--701},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922333},
  doi          = {10.1109/ISCAS.2001.922333},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ShinCLNBL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Shiue01a,
  author       = {Wen{-}Tsong Shiue},
  title        = {Leakage power estimation and minimization in {VLSI} circuits},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {178--181},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922201},
  doi          = {10.1109/ISCAS.2001.922201},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Shiue01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SinghG01,
  author       = {Ullas Singh and
                  Michael Green},
  title        = {New structures for very high-frequency {CMOS} clock dividers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {622--625},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922314},
  doi          = {10.1109/ISCAS.2001.922314},
  timestamp    = {Sat, 25 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SinghG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SiuCBC01,
  author       = {Pui{-}Lam Siu and
                  Chiu{-}sing Choy and
                  Jan Butas and
                  Cheong{-}Fat Chan},
  title        = {A low power asynchronous {DES}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {538--541},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922293},
  doi          = {10.1109/ISCAS.2001.922293},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SiuCBC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SoudrisDVT01,
  author       = {D. J. Soudris and
                  Minas Dasygenis and
                  Spyridoula K. Vasilopoulou and
                  Adonios Thanailakis},
  title        = {A {CAD} tool for architecture level exploration and automatic generation
                  of {RNS} converters},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {730--733},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922341},
  doi          = {10.1109/ISCAS.2001.922341},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SoudrisDVT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StadiusJPH01,
  author       = {Kari Stadius and
                  Petri J{\"{a}}rvi{\"{o}} and
                  Petteri Paatsila and
                  Kari Halonen},
  title        = {Image-reject receivers with image-selection functionality},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {124--127},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922186},
  doi          = {10.1109/ISCAS.2001.922186},
  timestamp    = {Mon, 18 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/StadiusJPH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StankovicSAE01,
  author       = {Milena Stankovic and
                  Radomir S. Stankovic and
                  Jaakko Astola and
                  Karen O. Egiazarian},
  title        = {Circuit realization of spectral transforms in Fibonacci interconnection
                  topologies},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {678--681},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922328},
  doi          = {10.1109/ISCAS.2001.922328},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/StankovicSAE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SunL01,
  author       = {Xiaohong Sun and
                  Kenneth R. Laker},
  title        = {A new design for cascaded sigma-delta modulators},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {104--107},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922181},
  doi          = {10.1109/ISCAS.2001.922181},
  timestamp    = {Fri, 15 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/SunL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuutariIT01,
  author       = {Teemu Suutari and
                  Jouni Isoaho and
                  Hannu Tenhunen},
  title        = {High-speed serial communication with error correction using 0.25 um
                  {CMOS} technology},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {618--621},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922313},
  doi          = {10.1109/ISCAS.2001.922313},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SuutariIT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TaeCK01,
  author       = {Ki{-}Cheol Tae and
                  Jin{-}Gyun Chung and
                  Dae{-}Ik Kim},
  title        = {Noise generation system using {DCT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {29--32},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922161},
  doi          = {10.1109/ISCAS.2001.922161},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TaeCK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TamuraMMSMS01,
  author       = {Hiroshi Tamura and
                  Toshiyuhi Moriyama and
                  Noriyoshi Matsumoto and
                  Masakazu Sengoku and
                  Kenichi Mase and
                  Shoji Shinoda},
  title        = {Routing algorithms on wireless multihop networks and their modifications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {874--877},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922377},
  doi          = {10.1109/ISCAS.2001.922377},
  timestamp    = {Wed, 04 Dec 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/TamuraMMSMS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TanFKSJ01,
  author       = {Kah{-}Howe Tan and
                  Wen Fung{-}Leong and
                  Sameer Kadam and
                  Michael A. Soderstrand and
                  Louis G. Johnson},
  title        = {Public-domain Matlab program to generate highly optimized {VHDL} for
                  {FPGA} implementation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {514--517},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922287},
  doi          = {10.1109/ISCAS.2001.922287},
  timestamp    = {Wed, 03 Apr 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TanFKSJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TangLVF01,
  author       = {Chih{-}Chun Tang and
                  Wen{-}Shih Lu and
                  Lan{-}Da Van and
                  Wu{-}Shiung Feng},
  title        = {A 2.4-GHz {CMOS} down-conversion doubly balanced mixer with low supply
                  voltage},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {794--797},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922357},
  doi          = {10.1109/ISCAS.2001.922357},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TangLVF01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ThoidisSFT01,
  author       = {Ioannis M. Thoidis and
                  Dimitrios Soudris and
                  Jean{-}Marc Fernandez and
                  Adonios Thanailakis},
  title        = {The circuit design of multiple-valued logic voltage-mode adders},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {162--165},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922197},
  doi          = {10.1109/ISCAS.2001.922197},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ThoidisSFT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TiewPC01,
  author       = {Kei{-}Tee Tiew and
                  Alison J. Payne and
                  Peter Y. K. Cheung},
  title        = {{MASH} delta-sigma modulators for wideband and multi-standard applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {778--781},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922353},
  doi          = {10.1109/ISCAS.2001.922353},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TiewPC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ToralQPF01,
  author       = {Sergio L. Toral Mar{\'{\i}}n and
                  Jos{\'{e}} M. Quero and
                  Mar M. Elena P{\'{e}}rez and
                  Leopoldo Garc{\'{\i}}a Franquelo},
  title        = {A microprocessor based system for {ECG} telemedicine and telecare},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {526--529},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922290},
  doi          = {10.1109/ISCAS.2001.922290},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ToralQPF01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Traber01,
  author       = {Mario Tr{\"{a}}ber},
  title        = {A novel ACS-feedback scheme for generic, sequential Viterbi-decoder
                  macros},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {210--213},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922209},
  doi          = {10.1109/ISCAS.2001.922209},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Traber01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Traber01a,
  author       = {Mario Tr{\"{a}}ber},
  title        = {A low power survivor memory unit for sequential Viterbi-Decoders},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {214--217},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922210},
  doi          = {10.1109/ISCAS.2001.922210},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Traber01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsaiL01,
  author       = {Frank S. Tsai and
                  Chen{-}Yi Lee},
  title        = {A novel single-bit input all digital synchronizer and demodulator
                  baseband processor for fast frequency hopping system},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {132--135},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922188},
  doi          = {10.1109/ISCAS.2001.922188},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TsaiL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsangE01,
  author       = {Tommy Kwong{-}Kin Tsang and
                  Mourad N. El{-}Gamal},
  title        = {A fully integrated 1 {V} 5.8 GHz bipolar {LNA}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {842--845},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922369},
  doi          = {10.1109/ISCAS.2001.922369},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TsangE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TurierAA01,
  author       = {Arnaud Turier and
                  Lotfi Ben Ammar and
                  Amara Amara},
  title        = {Static power consumption management in {CMOS} memories},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {506--509},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922285},
  doi          = {10.1109/ISCAS.2001.922285},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TurierAA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VelenisFP01,
  author       = {Dimitrios Velenis and
                  Eby G. Friedman and
                  Marios C. Papaefthymiou},
  title        = {A clock tree topology extraction algorithm for improving the tolerance
                  of clock distribution networks to delay uncertainty},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {422--425},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922263},
  doi          = {10.1109/ISCAS.2001.922263},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/VelenisFP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VichienchomCL01,
  author       = {Kasin Vichienchom and
                  Mark Clements and
                  Wentai Liu},
  title        = {A multi-gigabit {CMOS} data recovery circuit using an analog parallel
                  sampling technique},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {238--241},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922216},
  doi          = {10.1109/ISCAS.2001.922216},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/VichienchomCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VossG01,
  author       = {Burkart Voss and
                  Manfred Glesner},
  title        = {A low power sinusoidal clock},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {108--111},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922182},
  doi          = {10.1109/ISCAS.2001.922182},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/VossG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WaltherF01,
  author       = {Ulrich Walther and
                  Gerhard P. Fettweis},
  title        = {PN-generators embedded in high performance signal processors},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {45--48},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922165},
  doi          = {10.1109/ISCAS.2001.922165},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WaltherF01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangC01a,
  author       = {Chin{-}Liang Wang and
                  Ching{-}Hsien Chang},
  title        = {A new memory-based {FFT} processor for {VDSL} transceivers},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {670--673},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922326},
  doi          = {10.1109/ISCAS.2001.922326},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangC01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangLA01,
  author       = {Xianmin Wang and
                  Wu{-}Sheng Lu and
                  Andreas Antoniou},
  title        = {A near-optimal multiuser detector for {CDMA} channels using semidefinite
                  programming relaxation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {298--301},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922231},
  doi          = {10.1109/ISCAS.2001.922231},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangLA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangLLH01,
  author       = {Chua{-}Chin Wang and
                  Po{-}Ming Lee and
                  Rong{-}Chin Lee and
                  Chenn{-}Jung Huang},
  title        = {A 1.25 GHz 32-bit tree-structured carry lookahead adder},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {80--83},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922174},
  doi          = {10.1109/ISCAS.2001.922174},
  timestamp    = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/WangLLH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangLWH01,
  author       = {Chin{-}Liang Wang and
                  Ming{-}Hung Li and
                  Kuo{-}Ming Wu and
                  Kwei{-}Liang Hwang},
  title        = {Adaptive interference suppression with power control for {CDMA} systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {286--289},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922228},
  doi          = {10.1109/ISCAS.2001.922228},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangLWH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangRK01,
  author       = {Rui Wang and
                  Kaushik Roy and
                  Cheng{-}Kok Koh},
  title        = {Short-circuit power analysis of an inverter driving an {RLC} load},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {886--889},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922380},
  doi          = {10.1109/ISCAS.2001.922380},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangRK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WassatschT01,
  author       = {Andreas Wassatsch and
                  Dirk Timmermann},
  title        = {Scalable counter architecture for a pre-loadable 1 GHz@0.6 um/5V pre-scaler
                  in {TSPC}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {92--95},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922178},
  doi          = {10.1109/ISCAS.2001.922178},
  timestamp    = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WassatschT01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WatanabeSTNS01,
  author       = {Kaoru Watanabe and
                  Masakazu Sengoku and
                  Hiroshi Tamura and
                  Keisuke Nakano and
                  Shoji Shinoda},
  title        = {Graph problems in multi-hop networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {894--897},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922382},
  doi          = {10.1109/ISCAS.2001.922382},
  timestamp    = {Thu, 26 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/WatanabeSTNS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Wei01,
  author       = {Shyue{-}Win Wei},
  title        = {Cellular-array power-sum circuits over programmable finite field GF(2''')},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {346--349},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922244},
  doi          = {10.1109/ISCAS.2001.922244},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/Wei01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WroblewskiSSN01,
  author       = {Artur Wr{\'{o}}blewski and
                  Otto Schumacher and
                  Christian V. Schimpfle and
                  Josef A. Nossek},
  title        = {Minimizing gate capacitances with transistor sizing},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {186--189},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922203},
  doi          = {10.1109/ISCAS.2001.922203},
  timestamp    = {Thu, 28 Jun 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WroblewskiSSN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuH01,
  author       = {Ping Wu and
                  Kai He},
  title        = {A {CMOS} triple-band fractional-N frequency synthesizer for {GSM/GPRS/EDGE}
                  applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {706--709},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922335},
  doi          = {10.1109/ISCAS.2001.922335},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WuH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuSWS01,
  author       = {Chien{-}Ming Wu and
                  Ming{-}Der Shieh and
                  Chien{-}Hsing Wu and
                  Ming{-}Hwa Sheu},
  title        = {{VLSI} architecture of extended in-place path metric update for Viterbi
                  decoders},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {206--209},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922208},
  doi          = {10.1109/ISCAS.2001.922208},
  timestamp    = {Thu, 16 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WuSWS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuWSH01,
  author       = {Chien{-}Hsing Wu and
                  Chien{-}Ming Wu and
                  Ming{-}Der Shieh and
                  Yin{-}Tsung Hwang},
  title        = {Systolic {VLSI} realization of a novel iterative division algorithm
                  over GF(2m): a high-speed, low-complexity design},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {33--36},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922162},
  doi          = {10.1109/ISCAS.2001.922162},
  timestamp    = {Thu, 16 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WuWSH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuK01,
  author       = {Hongjun Xu and
                  Kyung Sup Kwak},
  title        = {Space-time block coding for wireless ad hoc networks},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {870--873},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922376},
  doi          = {10.1109/ISCAS.2001.922376},
  timestamp    = {Tue, 16 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/XuK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuY01,
  author       = {Gang Xu and
                  Jiren Yuan},
  title        = {An embedded low power {FIR} filter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {230--233},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922214},
  doi          = {10.1109/ISCAS.2001.922214},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/XuY01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YamasakiSKS01,
  author       = {Toshihiko Yamasaki and
                  Atsushi Suzuki and
                  Daisuke Kobayashi and
                  Tadashi Shibata},
  title        = {A fast self-convergent flash-memory programming scheme for {MV} and
                  analog data storage},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {930--933},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922391},
  doi          = {10.1109/ISCAS.2001.922391},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YamasakiSKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangK01,
  author       = {Byung{-}Do Yang and
                  Lee{-}Sup Kim},
  title        = {A low power charge-recycling {ROM} architecture},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {510--513},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922286},
  doi          = {10.1109/ISCAS.2001.922286},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YangK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YarmanA01,
  author       = {B. Siddik Yarman and
                  Ahmet Aksen},
  title        = {A reflectance-based computer aided modelling tool for high speed/high
                  frequency communication systems},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {270--273},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922224},
  doi          = {10.1109/ISCAS.2001.922224},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YarmanA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YasudaYN01,
  author       = {Takeo Yasuda and
                  Masaaki Yamamoto and
                  Takafumi Nishi},
  title        = {A power-on reset pulse generator for low voltage applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {599--601},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922308},
  doi          = {10.1109/ISCAS.2001.922308},
  timestamp    = {Tue, 28 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YasudaYN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YooJK01,
  author       = {Seung{-}Moon Yoo and
                  Seong{-}Ook Jung and
                  Sung{-}Mo Kang},
  title        = {Low cost and high efficiency {BIST} scheme with 2-level {LFSR} and
                  {ATPT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922153},
  doi          = {10.1109/ISCAS.2001.922153},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YooJK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YooKJBK01,
  author       = {Seung{-}Moon Yoo and
                  Chulwoo Kim and
                  Seong{-}Ook Jung and
                  Kwang{-}Hyun Baek and
                  Sung{-}Mo Kang},
  title        = {New current-mode sense amplifiers for high density {DRAM} and {PIM}
                  architectures},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {938--941},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922393},
  doi          = {10.1109/ISCAS.2001.922393},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YooKJBK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YounisA01,
  author       = {Waleed M. Younis and
                  Naofal Al{-}Dhahir},
  title        = {{FIR} prefilter design for {MLSE} equalization of space-time-coded
                  transmission over multipath fading channels},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {362--365},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922248},
  doi          = {10.1109/ISCAS.2001.922248},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YounisA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YuW01a,
  author       = {Chi{-}Li Yu and
                  An{-}Yeu Wu},
  title        = {An improved time-recursive lattice structure for low-latency {IFFT}
                  architecture in {DMT} transmitter},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {250--253},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922219},
  doi          = {10.1109/ISCAS.2001.922219},
  timestamp    = {Mon, 16 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/YuW01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZareiSF01,
  author       = {Hossein Zarei and
                  Omid Shoaei and
                  Seid Mehdi Fakhraie},
  title        = {A low-power fully integrated Gaussian-MSK modulator based on the sigma-delta
                  fractional-N frequency synthesis},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {100--103},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922180},
  doi          = {10.1109/ISCAS.2001.922180},
  timestamp    = {Sun, 28 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ZareiSF01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangRKJ01,
  author       = {Rongtian Zhang and
                  Kaushik Roy and
                  Cheng{-}Kok Koh and
                  David B. Janes},
  title        = {Power trends and performance characterization of 3-dimensional integration},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {414--417},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922261},
  doi          = {10.1109/ISCAS.2001.922261},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhangRKJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangTCL01,
  author       = {Zhaofeng Zhang and
                  Louis Tsui and
                  Zhiheng Chen and
                  Jack Lau},
  title        = {A {CMOS} self-mixing-free front-end for direct conversion applications},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {386--389},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922254},
  doi          = {10.1109/ISCAS.2001.922254},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhangTCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangWP01,
  author       = {Tong Zhang and
                  Zhongfeng Wang and
                  Keshab K. Parhi},
  title        = {On finite precision implementation of low density parity check codes
                  decoder},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {202--205},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922207},
  doi          = {10.1109/ISCAS.2001.922207},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhangWP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouY01,
  author       = {Yijun Zhou and
                  Jiren Yuan},
  title        = {An 8-Bit, 100-MHz low glitch interpolation {DAC}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {116--119},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922184},
  doi          = {10.1109/ISCAS.2001.922184},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhouY01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhuZ01,
  author       = {Qing K. Zhu and
                  Michael Zhang},
  title        = {Low-voltage swing clock distribution schemes},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {418--421},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922262},
  doi          = {10.1109/ISCAS.2001.922262},
  timestamp    = {Fri, 04 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhuZ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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