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@inproceedings{DBLP:conf/isca/AbeBYKK87,
author = {Shigeo Abe and
Tadaaki Bandoh and
S. Yamaguchi and
Ken{-}ichi Kurosawa and
Kaori Kiriyama},
editor = {Daniel C. St. Clair},
title = {High Performance Integrated Prolog Processor {IPP}},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {100--107},
year = {1987},
url = {https://doi.org/10.1145/30350.30362},
doi = {10.1145/30350.30362},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/AbeBYKK87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BeivideHBL87,
author = {Ram{\'{o}}n Beivide and
Enrique Herrada and
Jos{\'{e}} L. Balc{\'{a}}zar and
Jes{\'{u}}s Labarta},
editor = {Daniel C. St. Clair},
title = {Optimized Mesh-Connected Networks for {SIMD} and {MIMD} Architectures},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {163--170},
year = {1987},
url = {https://doi.org/10.1145/30350.30369},
doi = {10.1145/30350.30369},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/BeivideHBL87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChangCS87,
author = {J. H. Chang and
H. Chao and
Kimming So},
editor = {Daniel C. St. Clair},
title = {Cache Design of a Sub-Micron {CMOS} System/370},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {208--213},
year = {1987},
url = {https://doi.org/10.1145/30350.30374},
doi = {10.1145/30350.30374},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChangCS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChengzhengY87,
author = {Chengzheng Sun and
Tzu Yungui},
editor = {Daniel C. St. Clair},
title = {The Sharing of Environment in AND-OR-Parallel Execution of Logic Programs},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {137--144},
year = {1987},
url = {https://doi.org/10.1145/30350.30366},
doi = {10.1145/30350.30366},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChengzhengY87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CheungSSP87,
author = {Kifung C. Cheung and
Gurindar S. Sohi and
Kewal K. Saluja and
Dhiraj K. Pradhan},
editor = {Daniel C. St. Clair},
title = {Organization and Analysis of a Gracefully-Degrading Interleaved Memory
System},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {224--231},
year = {1987},
url = {https://doi.org/10.1145/30350.30376},
doi = {10.1145/30350.30376},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/CheungSSP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChowH87,
author = {Paul Chow and
Mark Horowitz},
editor = {Daniel C. St. Clair},
title = {Architectural Tradeoffs in the Design of {MIPS-X}},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {300--308},
year = {1987},
url = {https://doi.org/10.1145/30350.30384},
doi = {10.1145/30350.30384},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChowH87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CiveraMPZ87,
author = {Pierluigi Civera and
F. Maddaleno and
Gianluca Piccinini and
Maurizio Zamboni},
editor = {Daniel C. St. Clair},
title = {An Experimental {VLSI} Prolog Interpreter: Preliminary Measurements
and Results},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {117--126},
year = {1987},
url = {https://doi.org/10.1145/30350.30364},
doi = {10.1145/30350.30364},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/CiveraMPZ87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DallyCCHHKSTW87,
author = {William J. Dally and
Linda Chao and
Andrew A. Chien and
Soha Hassoun and
Waldemar Horwat and
Jon Kaplan and
Paul Song and
Brian Totty and
D. Scott Wills},
editor = {Daniel C. St. Clair},
title = {Architecture of a Message-Driven Processor},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {189--196},
year = {1987},
url = {https://doi.org/10.1145/30350.30372},
doi = {10.1145/30350.30372},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DallyCCHHKSTW87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DeRosaL87,
author = {John A. DeRosa and
Henry M. Levy},
editor = {Daniel C. St. Clair},
title = {An Evaluation of Branch Architectures},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {10--16},
year = {1987},
url = {https://doi.org/10.1145/30350.30352},
doi = {10.1145/30350.30352},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DeRosaL87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DitzelM87,
author = {David R. Ditzel and
Hubert R. McLellan},
editor = {Daniel C. St. Clair},
title = {Branch Folding in the {CRISP} Microprocessor: Reducing Branch Delay
to Zero},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {2--9},
year = {1987},
url = {https://doi.org/10.1145/30350.30351},
doi = {10.1145/30350.30351},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DitzelM87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DitzelMB87,
author = {David R. Ditzel and
Hubert R. McLellan and
Alan D. Berenbaum},
editor = {Daniel C. St. Clair},
title = {The Hardware Architecture of the {CRISP} Microprocessor},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {309--319},
year = {1987},
url = {https://doi.org/10.1145/30350.30385},
doi = {10.1145/30350.30385},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DitzelMB87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DoshiV87,
author = {Kshitij A. Doshi and
Peter J. Varman},
editor = {Daniel C. St. Clair},
title = {A Modular Systolic Architecture for Image Convolutions},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {56--63},
year = {1987},
url = {https://doi.org/10.1145/30350.30357},
doi = {10.1145/30350.30357},
timestamp = {Sun, 29 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/DoshiV87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EickemeyerP87,
author = {Richard J. Eickemeyer and
Janak H. Patel},
editor = {Daniel C. St. Clair},
title = {Performance Evaluation of Multiple Register Sets},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {264--271},
year = {1987},
url = {https://doi.org/10.1145/30350.30380},
doi = {10.1145/30350.30380},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/EickemeyerP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FaginD87,
author = {Barry S. Fagin and
Alvin M. Despain},
editor = {Daniel C. St. Clair},
title = {Performance Studies of a Parallel Prolog Architecture},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {108--116},
year = {1987},
url = {https://doi.org/10.1145/30350.30363},
doi = {10.1145/30350.30363},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FaginD87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Freeman87,
author = {Martin Freeman},
editor = {Daniel C. St. Clair},
title = {An Architectural Perspective on a Memory Access Controller},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {214--223},
year = {1987},
url = {https://doi.org/10.1145/30350.30375},
doi = {10.1145/30350.30375},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Freeman87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FujitaAYA87,
author = {Satoshi Fujita and
Reiji Aibara and
Masafumi Yamashita and
Tadashi Ae},
editor = {Daniel C. St. Clair},
title = {A Template Matching Algorithm Using Optically-Connected 3-D {VLSI}
Architecture},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {64--70},
year = {1987},
url = {https://doi.org/10.1145/30350.30358},
doi = {10.1145/30350.30358},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FujitaAYA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GhosalB87,
author = {Dipak Ghosal and
Laxmi N. Bhuyan},
editor = {Daniel C. St. Clair},
title = {Analytical Modeling and Architectural Modifications of a Dataflow
Computer},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {81--89},
year = {1987},
url = {https://doi.org/10.1145/30350.30360},
doi = {10.1145/30350.30360},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/GhosalB87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GuhaRD87,
author = {Aloke Guha and
Raja Ramnarayan and
Matthew Derstine},
editor = {Daniel C. St. Clair},
title = {Architectural Issues in Designing Symbolic Processors in Optics},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {145--151},
year = {1987},
url = {https://doi.org/10.1145/30350.30367},
doi = {10.1145/30350.30367},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/GuhaRD87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HarperJ87,
author = {David T. Harper III and
J. Robert Jump},
editor = {Daniel C. St. Clair},
title = {Performance Evaluation of Reduced Bandwidth Multistage Interconnection
Networks},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {171--175},
year = {1987},
url = {https://doi.org/10.1145/30350.30370},
doi = {10.1145/30350.30370},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HarperJ87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HwuP87,
author = {Wen{-}mei W. Hwu and
Yale N. Patt},
editor = {Daniel C. St. Clair},
title = {Checkpoint Repair for Out-of-order Execution Machines},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {18--26},
year = {1987},
url = {https://doi.org/10.1145/30350.30353},
doi = {10.1145/30350.30353},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HwuP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Kumar87,
author = {Manoj Kumar},
editor = {Daniel C. St. Clair},
title = {Effect of Storage Allocation/Reclamation Methods on Parallelism and
Storage Requirements},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {197--205},
year = {1987},
url = {https://doi.org/10.1145/30350.30373},
doi = {10.1145/30350.30373},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Kumar87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LeeYL87,
author = {Roland L. Lee and
Pen{-}Chung Yew and
Duncan H. Lawrie},
editor = {Daniel C. St. Clair},
title = {Multiprocessor Cache Design Considerations},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {253--262},
year = {1987},
url = {https://doi.org/10.1145/30350.30379},
doi = {10.1145/30350.30379},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/LeeYL87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MendelsonS87,
author = {Bilha Mendelson and
Gabriel M. Silberman},
editor = {Daniel C. St. Clair},
title = {Mapping Data Flow Programs on a {VLSI} Array of Processors},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {72--80},
year = {1987},
url = {https://doi.org/10.1145/30350.30359},
doi = {10.1145/30350.30359},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/MendelsonS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MoorePB87,
author = {Brian B. Moore and
Andris Padegs and
Ronald M. Smith and
Werner Buchholz},
editor = {Daniel C. St. Clair},
title = {Concepts of the System/370 Vector Architecture},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {282--288},
year = {1987},
url = {https://doi.org/10.1145/30350.30382},
doi = {10.1145/30350.30382},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/MoorePB87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PleszkunGHJBWS87,
author = {Andrew R. Pleszkun and
James R. Goodman and
Wei{-}Chung Hsu and
R. T. Joersz and
George E. Bier and
Philip J. Woest and
P. B. Schechter},
editor = {Daniel C. St. Clair},
title = {{WISQ:} {A} Restartable Architecture Using Queues},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {290--299},
year = {1987},
url = {https://doi.org/10.1145/30350.30383},
doi = {10.1145/30350.30383},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PleszkunGHJBWS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RamachandranSV87,
author = {Umakishore Ramachandran and
Marvin H. Solomon and
Mary K. Vernon},
editor = {Daniel C. St. Clair},
title = {Hardware Support for Interprocess Communication},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {178--188},
year = {1987},
url = {https://doi.org/10.1145/30350.30371},
doi = {10.1145/30350.30371},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/RamachandranSV87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Ridoux87,
author = {Olivier Ridoux},
editor = {Daniel C. St. Clair},
title = {Deterministic and Stochastic Modeling of Parallel Garbage Collection
- Towards Real-Time Criteria},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {128--136},
year = {1987},
url = {https://doi.org/10.1145/30350.30365},
doi = {10.1145/30350.30365},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Ridoux87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ScheurichD87,
author = {Christoph Scheurich and
Michel Dubois},
editor = {Daniel C. St. Clair},
title = {Correct Memory Operation of Cache-Based Multiprocessors},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {234--243},
year = {1987},
url = {https://doi.org/10.1145/30350.30377},
doi = {10.1145/30350.30377},
timestamp = {Sat, 04 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ScheurichD87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SohiV87,
author = {Gurindar S. Sohi and
Sriram Vajapeyam},
editor = {Daniel C. St. Clair},
title = {Instruction Issue Logic for High-Performance, Interruptable Pipelined
Processors},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {27--34},
year = {1987},
url = {https://doi.org/10.1145/30350.30354},
doi = {10.1145/30350.30354},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SohiV87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StanleyW87,
author = {Timothy J. Stanley and
Robert G. Wedig},
editor = {Daniel C. St. Clair},
title = {A Performance Analysis of Automatically Managed Top of Stack Buffers},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {272--281},
year = {1987},
url = {https://doi.org/10.1145/30350.30381},
doi = {10.1145/30350.30381},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/StanleyW87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SwensenP87,
author = {John A. Swensen and
Yale N. Patt},
editor = {Daniel C. St. Clair},
title = {Fast Temporary Storage for Serial and Parallel Execution},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {35--43},
year = {1987},
url = {https://doi.org/10.1145/30350.30355},
doi = {10.1145/30350.30355},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SwensenP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Takesue87,
author = {Masaru Takesue},
editor = {Daniel C. St. Clair},
title = {A Unified Resource Management and Execution Control Mechanism for
Data Flow Machines},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {90--97},
year = {1987},
url = {https://doi.org/10.1145/30350.30361},
doi = {10.1145/30350.30361},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Takesue87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/VarmaR87,
author = {Anujan Varma and
Cauligi S. Raghavendra},
editor = {Daniel C. St. Clair},
title = {Rearrangeability of Multistage Shuffle/Exchange Networks},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {154--162},
year = {1987},
url = {https://doi.org/10.1145/30350.30368},
doi = {10.1145/30350.30368},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/VarmaR87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Wilson87,
author = {Andrew W. Wilson Jr.},
editor = {Daniel C. St. Clair},
title = {Hierarchical Cache/Bus Architecture for Shared Memory Multiprocessors},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {244--252},
year = {1987},
url = {https://doi.org/10.1145/30350.30378},
doi = {10.1145/30350.30378},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Wilson87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WongF87,
author = {Kenneth F. Wong and
Mark A. Franklin},
editor = {Daniel C. St. Clair},
title = {Performance Analysis and Design of a Logic Simulation Machine},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {46--55},
year = {1987},
url = {https://doi.org/10.1145/30350.30356},
doi = {10.1145/30350.30356},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/WongF87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/1987,
editor = {Daniel C. St. Clair},
title = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
year = {1987},
url = {https://doi.org/10.1145/30350},
doi = {10.1145/30350},
isbn = {0-8186-0776-9},
timestamp = {Fri, 09 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/1987.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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