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@inproceedings{DBLP:conf/isca/ArvindM06,
author = {Arvind and
Jan{-}Willem Maessen},
title = {Memory Model = Instruction Reordering + Store Atomicity},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {29--40},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.26},
doi = {10.1109/ISCA.2006.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ArvindM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BalakrishnanS06,
author = {Saisanthosh Balakrishnan and
Gurindar S. Sohi},
title = {Program Demultiplexing: Data-flow based Speculative Parallelization
of Methods in Sequential Programs},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {302--313},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.31},
doi = {10.1109/ISCA.2006.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/BalakrishnanS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BrodieTC06,
author = {Benjamin C. Brodie and
David E. Taylor and
Ron K. Cytron},
title = {A Scalable Architecture For High-Throughput Regular-Expression Pattern
Matching},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {191--202},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.7},
doi = {10.1109/ISCA.2006.7},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/BrodieTC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CezeTTC06,
author = {Luis Ceze and
James Tuck and
Josep Torrellas and
Calin Cascaval},
title = {Bulk Disambiguation of Speculative Threads in Multiprocessors},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {227--238},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.13},
doi = {10.1109/ISCA.2006.13},
timestamp = {Tue, 23 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/CezeTTC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChangS06,
author = {Jichuan Chang and
Gurindar S. Sohi},
title = {Cooperative Caching for Chip Multiprocessors},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {264--276},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.17},
doi = {10.1109/ISCA.2006.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChangS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChengMRBC06,
author = {Liqun Cheng and
Naveen Muralimanohar and
Karthik Ramani and
Rajeev Balasubramonian and
John B. Carter},
title = {Interconnect-Aware Coherence Protocols for Chip Multiprocessors},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {339--351},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.23},
doi = {10.1109/ISCA.2006.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChengMRBC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChoiY06,
author = {Seungryul Choi and
Donald Yeung},
title = {Learning-Based {SMT} Processor Resource Distribution via Hill-Climbing},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {239--251},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.25},
doi = {10.1109/ISCA.2006.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChoiY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ColohanASM06,
author = {Christopher B. Colohan and
Anastassia Ailamaki and
J. Gregory Steffan and
Todd C. Mowry},
title = {Tolerating Dependences Between Large Speculative Threads Via Sub-Threads},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {216--226},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.43},
doi = {10.1109/ISCA.2006.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ColohanASM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DonaldM06,
author = {James Donald and
Margaret Martonosi},
title = {Techniques for Multicore Thermal Management: Classification and New
Exploration},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {78--88},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.39},
doi = {10.1109/ISCA.2006.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DonaldM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Emma06,
author = {Philip G. Emma},
title = {The End of Scaling? Revolutions in Technology and Microarchitecture
as We Pass the 90 Nanometer Node},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {128},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.41},
doi = {10.1109/ISCA.2006.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Emma06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GargRH06,
author = {Alok Garg and
M. Wasiur Rashid and
Michael C. Huang},
title = {Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding
with Decoupled Verification},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {142--154},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.36},
doi = {10.1109/ISCA.2006.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/GargRH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HankinsCCWRWS06,
author = {Richard A. Hankins and
Gautham N. Chinya and
Jamison D. Collins and
Perry H. Wang and
Ryan N. Rakvic and
Hong Wang and
John Paul Shen},
title = {Multiple Instruction Stream Processor},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {114--127},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.29},
doi = {10.1109/ISCA.2006.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HankinsCCWRWS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HasanCJC06,
author = {Jahangir Hasan and
Srihari Cadambi and
Venkata Jakkula and
Srimat T. Chakradhar},
title = {Chisel: {A} Storage-efficient, Collision-free Hash-based Network Processing
Architecture},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {203--215},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.14},
doi = {10.1109/ISCA.2006.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HasanCJC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Herrod06,
author = {Steve Herrod},
title = {The Future of Virtualization Technology},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {352},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.42},
doi = {10.1109/ISCA.2006.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Herrod06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HuS06,
author = {Shiliang Hu and
James E. Smith},
title = {Reducing Startup Time in Co-Designed Virtual Machines},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {277--288},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.33},
doi = {10.1109/ISCA.2006.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HuS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/IsailovicPWK06,
author = {Nemanja Isailovic and
Yatish Patel and
Mark Whitney and
John Kubiatowicz},
title = {Interconnection Networks for Scalable Quantum Computers},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {366--377},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.24},
doi = {10.1109/ISCA.2006.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/IsailovicPWK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KimNP06,
author = {Jongman Kim and
Chrysostomos Nicopoulos and
Dongkook Park and
Vijaykrishnan Narayanan and
Mazin S. Yousif and
Chita R. Das},
title = {A Gracefully Degrading and Energy-Efficient Modular Router Architecture
for On-Chip Networks},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {4--15},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.6},
doi = {10.1109/ISCA.2006.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/KimNP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiNRXVK06,
author = {Feihui Li and
Chrysostomos Nicopoulos and
Thomas D. Richardson and
Yuan Xie and
Narayanan Vijaykrishnan and
Mahmut T. Kandemir},
title = {Design and Management of 3D Chip Multiprocessors Using Network-in-Memory},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {130--141},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.18},
doi = {10.1109/ISCA.2006.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LiNRXVK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LinLWHMMCF06,
author = {Yuan Lin and
Hyunseok Lee and
Mark Woh and
Yoav Harel and
Scott A. Mahlke and
Trevor N. Mudge and
Chaitali Chakrabarti and
Kriszti{\'{a}}n Flautner},
title = {{SODA:} {A} Low-power Architecture For Software Radio},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {89--101},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.37},
doi = {10.1109/ISCA.2006.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LinLWHMMCF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/McDonaldCCMCKO06,
author = {Austen McDonald and
JaeWoong Chung and
Brian D. Carlstrom and
Chi Cao Minh and
Hassan Chafi and
Christos Kozyrakis and
Kunle Olukotun},
title = {Architectural Semantics for Practical Transactional Memory},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {53--65},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.9},
doi = {10.1109/ISCA.2006.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/McDonaldCCMCKO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MeterNMI06,
author = {Rodney Van Meter and
Kae Nemoto and
W. J. Munro and
Kohei M. Itoh},
title = {Distributed Arithmetic on a Quantum Multicomputer},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {354--365},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.19},
doi = {10.1109/ISCA.2006.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/MeterNMI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Patt06,
author = {Yale N. Patt},
title = {Computer Architecture Research and Future Microprocessors: Where Do
We Go from Here?},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.15},
doi = {10.1109/ISCA.2006.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Patt06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PraunCCR06,
author = {Christoph von Praun and
Harold W. Cain and
Jong{-}Deok Choi and
Kyung Dong Ryu},
title = {Conditional Memory Ordering},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {41--52},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.16},
doi = {10.1109/ISCA.2006.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PraunCCR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/QureshiLMP06,
author = {Moinuddin K. Qureshi and
Daniel N. Lynch and
Onur Mutlu and
Yale N. Patt},
title = {A Case for MLP-Aware Cache Replacement},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {167--178},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.5},
doi = {10.1109/ISCA.2006.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/QureshiLMP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RanganathanLIC06,
author = {Parthasarathy Ranganathan and
Phil Leech and
David E. Irwin and
Jeffrey S. Chase},
title = {Ensemble-level Power Management for Dense Blade Servers},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {66--77},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.20},
doi = {10.1109/ISCA.2006.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/RanganathanLIC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ScottAKD06,
author = {Steve Scott and
Dennis Abts and
John Kim and
William J. Dally},
title = {The BlackWidow High-Radix Clos Network},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {16--28},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.40},
doi = {10.1109/ISCA.2006.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ScottAKD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ShiLFG06,
author = {Weidong Shi and
Hsien{-}Hsin S. Lee and
Laura Falk and
Mrinmoy Ghosh},
title = {An Integrated Framework for Dependable and Revivable Architectures
Using Multicore Processors},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {102--113},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.8},
doi = {10.1109/ISCA.2006.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ShiLFG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SomogyiWAFM06,
author = {Stephen Somogyi and
Thomas F. Wenisch and
Anastassia Ailamaki and
Babak Falsafi and
Andreas Moshovos},
title = {Spatial Memory Streaming},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {252--263},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.38},
doi = {10.1109/ISCA.2006.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SomogyiWAFM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StraussST06,
author = {Karin Strauss and
Xiaowei Shen and
Josep Torrellas},
title = {Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in
Embedded-Ring Multiprocessors},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {327--338},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.21},
doi = {10.1109/ISCA.2006.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/StraussST06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SwansonPMMMPSOE06,
author = {Steven Swanson and
Andrew Putnam and
Martha Mercaldi and
Ken Michelson and
Andrew Petersen and
Andrew Schwerin and
Mark Oskin and
Susan J. Eggers},
title = {Area-Performance Trade-offs in Tiled Dataflow Architectures},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {314--326},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.10},
doi = {10.1109/ISCA.2006.10},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SwansonPMMMPSOE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ThakerMCCC06,
author = {Darshan D. Thaker and
Tzvetan S. Metodi and
Andrew W. Cross and
Isaac L. Chuang and
Frederic T. Chong},
title = {Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism
in Quantum Computing},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {378--390},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.32},
doi = {10.1109/ISCA.2006.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ThakerMCCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/X06,
title = {Message from the General Chair},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.27},
doi = {10.1109/ISCA.2006.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/X06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/X06a,
title = {Message from the Program Chair},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.28},
doi = {10.1109/ISCA.2006.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/X06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/X06b,
title = {Reviewers},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.34},
doi = {10.1109/ISCA.2006.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/X06b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/X06c,
title = {{SIGARCH} Guidelines},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.35},
doi = {10.1109/ISCA.2006.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/X06c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YanEPRS06,
author = {Chenyu Yan and
Daniel Englender and
Milos Prvulovic and
Brian Rogers and
Yan Solihin},
title = {Improving Cost, Performance, and Security of Memory Encryption and
Authentication},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {179--190},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.22},
doi = {10.1109/ISCA.2006.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/YanEPRS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YangXR06,
author = {Qing Yang and
Weijun Xiao and
Jin Ren},
title = {TRAP-Array: {A} Disk Array Architecture Providing Timely Recovery
to Any Point-in-time},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {289--301},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.44},
doi = {10.1109/ISCA.2006.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/YangXR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Zhang06,
author = {Chuanjun Zhang},
title = {Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {155--166},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.12},
doi = {10.1109/ISCA.2006.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Zhang06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2006,
title = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://ieeexplore.ieee.org/xpl/conhome/10899/proceeding},
isbn = {0-7695-2608-X},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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