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@inproceedings{DBLP:conf/hpca/AhnED05,
author = {Jung Ho Ahn and
Mattan Erez and
William J. Dally},
title = {Scatter-Add in Data Parallel Architectures},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {132--142},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.30},
doi = {10.1109/HPCA.2005.30},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AhnED05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AnanianAKLL05,
author = {C. Scott Ananian and
Krste Asanovic and
Bradley C. Kuszmaul and
Charles E. Leiserson and
Sean Lie},
title = {Unbounded Transactional Memory},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {316--327},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.41},
doi = {10.1109/HPCA.2005.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AnanianAKLL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BalasubramonianMRV05,
author = {Rajeev Balasubramonian and
Naveen Muralimanohar and
Karthik Ramani and
Venkatanand Venkatachalapathy},
title = {Microarchitectural Wire Management for Performance and Power in Partitioned
Architectures},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {28--39},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.21},
doi = {10.1109/HPCA.2005.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/BalasubramonianMRV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChandraGKS05,
author = {Dhruba Chandra and
Fei Guo and
Seongbeom Kim and
Yan Solihin},
title = {Predicting Inter-Thread Cache Contention on a Chip Multi-Processor
Architecture},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {340--351},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.27},
doi = {10.1109/HPCA.2005.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChandraGKS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChaparroMGG05,
author = {Pedro Chaparro and
Grigorios Magklis and
Jos{\'{e}} Gonz{\'{a}}lez and
Antonio Gonz{\'{a}}lez},
title = {Distributing the Frontend for Temperature Reduction},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {61--70},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.12},
doi = {10.1109/HPCA.2005.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChaparroMGG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChenPWHP05,
author = {Xuning Chen and
Li{-}Shiuan Peh and
Gu{-}Yeon Wei and
Yue{-}Kai Huang and
Paul R. Prucnal},
title = {Exploring the Design Space of Power-Aware Opto-Electronic Networked
Systems},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {120--131},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.15},
doi = {10.1109/HPCA.2005.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChenPWHP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/CorlissLR05,
author = {Marc L. Corliss and
E. Christopher Lewis and
Amir Roth},
title = {Low-Overhead Interactive Debugging via Dynamic Instrumentation with
{DISE}},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {303--314},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.18},
doi = {10.1109/HPCA.2005.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/CorlissLR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DuatoJFNGF05,
author = {Jos{\'{e}} Duato and
Ian Johnson and
Jos{\'{e}} Flich and
Finbar Naven and
Pedro Javier Garc{\'{\i}}a and
Teresa Nachiondo Frin{\'{o}}s},
title = {A New Scalable and Cost-Effective Congestion Management Strategy for
Lossless Multistage Interconnection Networks},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {108--119},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.1},
doi = {10.1109/HPCA.2005.1},
timestamp = {Mon, 18 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/DuatoJFNGF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HallnorR05,
author = {Erik G. Hallnor and
Steven K. Reinhardt},
title = {A Unified Compressed Memory Hierarchy},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {201--212},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.4},
doi = {10.1109/HPCA.2005.4},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HallnorR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HasanJVB05,
author = {Jahangir Hasan and
Ankit Jalote and
T. N. Vijaykumar and
Carla E. Brodley},
title = {Heat Stroke: Power-Density-Based Denial of Service in {SMT}},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {166--177},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.16},
doi = {10.1109/HPCA.2005.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HasanJVB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Hofstee05,
author = {H. Peter Hofstee},
title = {Power Efficient Processor Architecture and The Cell Processor},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {258--262},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.26},
doi = {10.1109/HPCA.2005.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Hofstee05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HwuP05,
author = {Wen{-}mei W. Hwu and
Sanjay J. Patel},
title = {The Future of Computer Architecture Research: An Industrial Perspective},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {264},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.36},
doi = {10.1109/HPCA.2005.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HwuP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JacobsonBHBZEEGLST05,
author = {Hans M. Jacobson and
Pradip Bose and
Zhigang Hu and
Alper Buyuktosunoglu and
Victor V. Zyuban and
Richard J. Eickemeyer and
Lee Eisen and
John Griswell and
Doug Logan and
Balaram Sinharoy and
Joel M. Tendler},
title = {Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {238--242},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.33},
doi = {10.1109/HPCA.2005.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/JacobsonBHBZEEGLST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JaleelJ05,
author = {Aamer Jaleel and
Bruce L. Jacob},
title = {Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects
of Reordered Memory Instructions},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {191--200},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.42},
doi = {10.1109/HPCA.2005.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/JaleelJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JonesOAG05,
author = {Timothy M. Jones and
Michael F. P. O'Boyle and
Jaume Abella and
Antonio Gonz{\'{a}}lez},
title = {Software Directed Issue Queue Power Reduction},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {144--153},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.32},
doi = {10.1109/HPCA.2005.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/JonesOAG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KirmanKCM05,
author = {Nevin Kirman and
Meyrem Kirman and
Mainak Chaudhuri and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {Checkpointed Early Load Retirement},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {16--27},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.9},
doi = {10.1109/HPCA.2005.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KirmanKCM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KondoN05,
author = {Masaaki Kondo and
Hiroshi Nakamura},
title = {A Small, Fast and Low-Power Register File by Bit-Partitioning},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {40--49},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.3},
doi = {10.1109/HPCA.2005.3},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KondoN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LauSC05,
author = {Jeremy Lau and
Stefan Schoenmackers and
Brad Calder},
title = {Transition Phase Classification and Prediction},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {278--289},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.39},
doi = {10.1109/HPCA.2005.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LauSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiBHS05,
author = {Yingmin Li and
David M. Brooks and
Zhigang Hu and
Kevin Skadron},
title = {Performance, Energy, and Thermal Considerations for {SMT} and {CMP}
Architectures},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {71--82},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.25},
doi = {10.1109/HPCA.2005.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiBHS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MartyBHHMW05,
author = {Michael R. Marty and
Jesse D. Bingham and
Mark D. Hill and
Alan J. Hu and
Milo M. K. Martin and
David A. Wood},
title = {Improving Multiple-CMP Systems Using Token Coherence},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {328--339},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.17},
doi = {10.1109/HPCA.2005.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/MartyBHHMW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MengSK05,
author = {Yan Meng and
Timothy Sherwood and
Ryan Kastner},
title = {On the Limits of Leakage Power Reduction in Caches},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {154--165},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.23},
doi = {10.1109/HPCA.2005.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/MengSK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MukherjeeER05,
author = {Shubhendu S. Mukherjee and
Joel S. Emer and
Steven K. Reinhardt},
title = {The Soft Error Problem: An Architectural Perspective},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {243--247},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.37},
doi = {10.1109/HPCA.2005.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/MukherjeeER05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/QinLZ05,
author = {Feng Qin and
Shan Lu and
Yuanyuan Zhou},
title = {SafeMem: Exploiting ECC-Memory for Detecting Memory Leaks and Memory
Corruption During Production Runs},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {291--302},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.29},
doi = {10.1109/HPCA.2005.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/QinLZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RanganathanJ05,
author = {Parthasarathy Ranganathan and
Norman P. Jouppi},
title = {Enterprise {IT} Trends and Implications for Architecture Research},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {253--256},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.14},
doi = {10.1109/HPCA.2005.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RanganathanJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SpracklenA05,
author = {Lawrence Spracklen and
Santosh G. Abraham},
title = {Chip Multithreading: Opportunities and Challenges},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {248--252},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.10},
doi = {10.1109/HPCA.2005.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SpracklenA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SpracklenCA05,
author = {Lawrence Spracklen and
Yuan Chou and
Santosh G. Abraham},
title = {Effective Instruction Prefetching in Chip Multiprocessors for Modern
Commercial Applications},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {225--236},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.13},
doi = {10.1109/HPCA.2005.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SpracklenCA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SundaresanM05,
author = {Krishnan Sundaresan and
Nihar R. Mahapatra},
title = {Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale
Buses},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {51--60},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.5},
doi = {10.1109/HPCA.2005.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SundaresanM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/TuckT05,
author = {Nathan Tuck and
Dean M. Tullsen},
title = {Multithreaded Value Prediction},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {5--15},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.22},
doi = {10.1109/HPCA.2005.22},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/TuckT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/VenkatesanAR05,
author = {Ravi K. Venkatesan and
Ahmed S. Al{-}Zawawi and
Eric Rotenberg},
title = {Tapping ZettaRAM\({}^{\mbox{TM}}\) for Low-Power Memory Systems},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {83--94},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.35},
doi = {10.1109/HPCA.2005.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/VenkatesanAR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Weber05,
author = {Fred Weber},
title = {Trends in High-Performance Processors},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.40},
doi = {10.1109/HPCA.2005.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Weber05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WillmannKRP05,
author = {Paul Willmann and
Hyong{-}youb Kim and
Scott Rixner and
Vijay S. Pai},
title = {An Efficient Programmable 10 Gigabit Ethernet Network Interface Card},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {96--107},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.6},
doi = {10.1109/HPCA.2005.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WillmannKRP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WuJMC05,
author = {Qiang Wu and
Philo Juang and
Margaret Martonosi and
Douglas W. Clark},
title = {Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain
Processors},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {178--189},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.43},
doi = {10.1109/HPCA.2005.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WuJMC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/YiKSLH05,
author = {Joshua J. Yi and
Sreekumar V. Kodakara and
Resit Sendag and
David J. Lilja and
Douglas M. Hawkins},
title = {Characterizing and Comparing Prevailing Simulation Techniques},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {266--277},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.8},
doi = {10.1109/HPCA.2005.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/YiKSLH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ZhangGYZG05,
author = {Youtao Zhang and
Lan Gao and
Jun Yang and
Xiangyu Zhang and
Rajiv Gupta},
title = {{SENSS:} Security Enhancement to Symmetric Shared Memory Multiprocessors},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {352--362},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.31},
doi = {10.1109/HPCA.2005.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ZhangGYZG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ZhuZ05,
author = {Zhichun Zhu and
Zhao Zhang},
title = {A Performance Comparison of {DRAM} Memory System Optimizations for
{SMT} Processors},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {213--224},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.2},
doi = {10.1109/HPCA.2005.2},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ZhuZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2005,
title = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://ieeexplore.ieee.org/xpl/conhome/9519/proceeding},
isbn = {0-7695-2275-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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