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@inproceedings{DBLP:conf/fpl/0001PPDG19,
author = {Grigorios Chrysos and
Odysseas Papapetrou and
Dionisios N. Pnevmatikatos and
Apostolos Dollas and
Minos N. Garofalakis},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Data Stream Statistics Over Sliding Windows: How to Summarize 150
Million Updates Per Second on a Single Node},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {278--285},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00052},
doi = {10.1109/FPL.2019.00052},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/0001PPDG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/0001SB19,
author = {Ibrahim Ahmed and
Linda L. Shen and
Vaughn Betz},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Becoming More Tolerant: Designing FPGAs for Variable Supply Voltage},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {1--8},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00011},
doi = {10.1109/FPL.2019.00011},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/0001SB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/0013ZJTLSXS19,
author = {Di Wu and
Yu Zhang and
Xijie Jia and
Lu Tian and
Tianping Li and
Lingzhi Sui and
Dongliang Xie and
Yi Shan},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A High-Performance {CNN} Processor Based on {FPGA} for MobileNets},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {136--143},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00030},
doi = {10.1109/FPL.2019.00030},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/0013ZJTLSXS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AgrawalBEK19,
author = {Rashmi S. Agrawal and
Lake Bu and
Alan Ehret and
Michel A. Kinsy},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Open-Source {FPGA} Implementation of Post-Quantum Cryptographic Hardware
Primitives},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {211--217},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00040},
doi = {10.1109/FPL.2019.00040},
timestamp = {Tue, 26 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AgrawalBEK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlhyariSAAG19,
author = {Abeer Alhyari and
Ahmed Shamli and
Ziad Abuwaimer and
Shawki Areibi and
Gary Gr{\'{e}}wal},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Deep Learning Framework to Predict Routability for {FPGA} Circuit
Placement},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {334--341},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00060},
doi = {10.1109/FPL.2019.00060},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AlhyariSAAG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Arribas19,
author = {Victor Arribas},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Beyond the Limits: {SHA-3} in Just 49 Slices},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {239--245},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00044},
doi = {10.1109/FPL.2019.00044},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Arribas19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AsiaticiI19,
author = {Mikhail Asiatici and
Paolo Ienne},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {DynaBurst: Dynamically Assemblying {DRAM} Bursts over a Multitude
of Random Accesses},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {254--262},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00049},
doi = {10.1109/FPL.2019.00049},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AsiaticiI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BaeHACK19,
author = {Younmin Bae and
Ramyad Hadidi and
Bahar Asgari and
Jiashen Cao and
Hyesoon Kim},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Capella: Customizing Perception for Edge Devices by Efficiently Allocating
FPGAs to DNNs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {421},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00076},
doi = {10.1109/FPL.2019.00076},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BaeHACK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChenBCHHWC19,
author = {Xinyu Chen and
Ronak Bajaj and
Yao Chen and
Jiong He and
Bingsheng He and
Weng{-}Fai Wong and
Deming Chen},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {On-The-Fly Parallel Data Shuffling for Graph Processing on OpenCL-Based
FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {67--73},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00020},
doi = {10.1109/FPL.2019.00020},
timestamp = {Tue, 19 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChenBCHHWC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Cretaro19,
author = {Paolo Cretaro},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Distributed Model of Computation for Reconfigurable Devices Based
on a Streaming Architecture},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {250--251},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00047},
doi = {10.1109/FPL.2019.00047},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Cretaro19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DharSIP19,
author = {Shounak Dhar and
Love Singhal and
Mahesh A. Iyer and
David Z. Pan},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {{FPGA} Accelerated {FPGA} Placement},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {404--410},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00070},
doi = {10.1109/FPL.2019.00070},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DharSIP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FarahmandNDFG19,
author = {Farnoud Farahmand and
Duc Tri Nguyen and
Viet Ba Dang and
Ahmed Ferozpuri and
Kris Gaj},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Software/Hardware Codesign of the Post Quantum Cryptography Algorithm
NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level
Design Methodologies},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {225--231},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00042},
doi = {10.1109/FPL.2019.00042},
timestamp = {Thu, 11 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FarahmandNDFG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GiamblancoA19,
author = {Nicholas V. Giamblanco and
Jason Helge Anderson},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Dynamic Memory Allocation Library for High-Level Synthesis},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {314--320},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00057},
doi = {10.1109/FPL.2019.00057},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/GiamblancoA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GiechaskielRS19,
author = {Ilias Giechaskiel and
Kasper Bonne Rasmussen and
Jakub Szefer},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {45--50},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00017},
doi = {10.1109/FPL.2019.00017},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GiechaskielRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HadjisO19,
author = {Stefan Hadjis and
Kunle Olukotun},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {TensorFlow to Cloud FPGAs: Tradeoffs for Accelerating Deep Neural
Networks},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {360--366},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00064},
doi = {10.1109/FPL.2019.00064},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HadjisO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HaleH19,
author = {Robert Hale and
Brad L. Hutchings},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Preallocating Resources for Distributed Memory Based {FPGA} Debug},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {384--390},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00067},
doi = {10.1109/FPL.2019.00067},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HaleH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HironakaIAUYSYH19,
author = {Kazuei Hironaka and
Kensuke Iizuka and
Akram Ben Ahmed and
M. M. Imdad Ullah and
Yugo Yamauchi and
Yuxi Sun and
Miho Yamakura and
Aoi Hiruma and
Hideharu Amano},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Demonstration of Flow-in-Cloud: {A} Multi-FPGA System},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {417--418},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00074},
doi = {10.1109/FPL.2019.00074},
timestamp = {Mon, 07 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HironakaIAUYSYH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IoannouF19,
author = {Lenos Ioannou and
Suhaib A. Fahmy},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Network Intrusion Detection Using Neural Networks on {FPGA} SoCs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {232--238},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00043},
doi = {10.1109/FPL.2019.00043},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/IoannouF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IoannouF19a,
author = {Lenos Ioannou and
Suhaib A. Fahmy},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Neural Network Overlay Using {FPGA} {DSP} Blocks},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {252--253},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00048},
doi = {10.1109/FPL.2019.00048},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/IoannouF19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JingujiSN19,
author = {Akira Jinguji and
Youki Sada and
Hiroki Nakahara},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Real-Time Multi-Pedestrian Detection in Surveillance Camera using
{FPGA}},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {424--425},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00078},
doi = {10.1109/FPL.2019.00078},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/JingujiSN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KalmsHG19,
author = {Lester Kalms and
Maximilian Hajduk and
Diana G{\"{o}}hringer},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint
{FPGA} Implementation},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {121--128},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00028},
doi = {10.1109/FPL.2019.00028},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KalmsHG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KoCR0W19,
author = {Glenn G. Ko and
Yuji Chai and
Rob A. Rutenbar and
David Brooks and
Gu{-}Yeon Wei},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Accelerating Bayesian Inference on Structured Graphs Using Parallel
Gibbs Sampling},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {159--165},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00033},
doi = {10.1109/FPL.2019.00033},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KoCR0W19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KojimaAMA19,
author = {Takuya Kojima and
Naoki Ando and
Yusuke Matsushita and
Hideharu Amano},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Demonstration of Low Power Stream Processing Using a Variable Pipelined
{CGRA}},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {411--412},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00071},
doi = {10.1109/FPL.2019.00071},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KojimaAMA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KoliogeorgiVFXG19,
author = {Konstantina Koliogeorgi and
Nils Voss and
Sotiria Fytraki and
Sotirios Xydis and
Georgi Gaydadjiev and
Dimitrios Soudris},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Dataflow Acceleration of Smith-Waterman with Traceback for High Throughput
Next Generation Sequencing},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {74--80},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00021},
doi = {10.1109/FPL.2019.00021},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KoliogeorgiVFXG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KuhringI19,
author = {Lucas Kuhring and
Zsolt Istv{\'{a}}n},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Storing Parquet Tile by Tile: Application-Aware Storage with Deduplication},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {415--416},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00073},
doi = {10.1109/FPL.2019.00073},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KuhringI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KyparissasD19,
author = {Nikolaos Kyparissas and
Apostolos Dollas},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {An FPGA-Based Architecture to Simulate Cellular Automata with Large
Neighborhoods in Real Time},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {95--99},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00024},
doi = {10.1109/FPL.2019.00024},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KyparissasD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LanghammerPBG19,
author = {Martin Langhammer and
Bogdan Pasca and
Gregg Baeckler and
Sergey Gribok},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Extracting {INT8} Multipliers from {INT18} Multipliers},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {114--120},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00027},
doi = {10.1109/FPL.2019.00027},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LanghammerPBG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiWFTC19,
author = {Qiang Li and
Erwei Wang and
Shane T. Fleming and
David B. Thomas and
Peter Y. K. Cheung},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Accelerating Position-Aware Top-k ListNet for Ranking Under Custom
Precision Regimes},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {81--87},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00022},
doi = {10.1109/FPL.2019.00022},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiWFTC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Liang0LL019,
author = {Shengwen Liang and
Ying Wang and
Cheng Liu and
Huawei Li and
Xiaowei Li},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {173--179},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00035},
doi = {10.1109/FPL.2019.00035},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Liang0LL019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuK19,
author = {Leo Liu and
Nachiket Kapre},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Timing-Aware Routing in the RapidWright Framework},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {24--30},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00014},
doi = {10.1109/FPL.2019.00014},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LiuK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuL19,
author = {Shuanglong Liu and
Wayne Luk},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Towards an Efficient Accelerator for DNN-Based Remote Sensing Image
Segmentation on FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {187--193},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00037},
doi = {10.1109/FPL.2019.00037},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LiuL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaCH0NSPLSD19,
author = {Rui Ma and
Derek Chiou and
Jia{-}Ching Hsu and
Tian Tan and
Eriko Nurvitadhi and
David Sheffield and
Rob Pelt and
Martin Langhammer and
Jaewoong Sim and
Aravind Dasu},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Specializing {FGPU} for Persistent Deep Learning},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {326--333},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00059},
doi = {10.1109/FPL.2019.00059},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MaCH0NSPLSD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaclellanMCS19,
author = {Andrew Maclellan and
Lewis D. McLaughlin and
Louise Crockett and
Robert W. Stewart},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {{FPGA} Accelerated Deep Learning Radio Modulation Classification Using
{MATLAB} System Objects {\&} {PYNQ}},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {246--247},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00045},
doi = {10.1109/FPL.2019.00045},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MaclellanMCS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MakraniFSBDHR19,
author = {Hosein Mohammadi Makrani and
Farnoud Farahmand and
Hossein Sayadi and
Sara Bondi and
Sai Manoj Pudukotai Dinakarrao and
Houman Homayoun and
Setareh Rafatirad},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Pyramid: Machine Learning Framework to Estimate the Optimal Timing
and Resource Usage of a High-Level Synthesis Design},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {397--403},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00069},
doi = {10.1109/FPL.2019.00069},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MakraniFSBDHR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaragosTLSS19,
author = {Konstantinos Maragos and
Endri Taka and
George Lentaris and
Ioannis Stratakos and
Dimitrios Soudris},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Analysis of Performance Variation in 16nm FinFET {FPGA} Devices},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {38--44},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00016},
doi = {10.1109/FPL.2019.00016},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MaragosTLSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MinHEXCH19,
author = {Seungwon Min and
Sitao Huang and
Mohamed El{-}Hadedy and
Jinjun Xiong and
Deming Chen and
Wen{-}Mei Hwu},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Analysis and Optimization of {I/O} Cache Coherency Strategies for
SoC-FPGA Device},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {301--306},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00055},
doi = {10.1109/FPL.2019.00055},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MinHEXCH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MirzargarS19,
author = {Seyedeh Sharareh Mirzargar and
Mirjana Stojilovic},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Physical Side-Channel Attacks and Covert Communication on FPGAs: {A}
Survey},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {202--210},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00039},
doi = {10.1109/FPL.2019.00039},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MirzargarS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NakaharaSSSJS19,
author = {Hiroki Nakahara and
Youki Sada and
Masayuki Shimoda and
Kouki Sayama and
Akira Jinguji and
Shimpei Sato},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional
Neural Network},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {180--186},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00036},
doi = {10.1109/FPL.2019.00036},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NakaharaSSSJS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NaylorMT19,
author = {Matthew Naylor and
Simon W. Moore and
David B. Thomas},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Tinsel: {A} Manythread Overlay for {FPGA} Clusters},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {375--383},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00066},
doi = {10.1109/FPL.2019.00066},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NaylorMT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NguyenTNH19,
author = {Marie Nguyen and
Robert Tamburo and
Srinivasa G. Narasimhan and
James C. Hoe},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Quantifying the Benefits of Dynamic Partial Reconfiguration for Embedded
Vision Applications},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {129--135},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00029},
doi = {10.1109/FPL.2019.00029},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NguyenTNH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NikolicZI19,
author = {Stefan Nikolic and
Grace Zgheib and
Paolo Ienne},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Finding a Needle in the Haystack of Hardened Interconnect Patterns},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {31--37},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00015},
doi = {10.1109/FPL.2019.00015},
timestamp = {Wed, 07 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NikolicZI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NittaTT19,
author = {Yasuhiro Nitta and
Sou Tamura and
Hideki Takase},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {ZytleBot: {FPGA} Integrated Development Platform for {ROS} Based Autonomous
Mobile Robot},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {422--423},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00077},
doi = {10.1109/FPL.2019.00077},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NittaTT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OmidianL19,
author = {Hossein Omidian and
Guy G. F. Lemieux},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Low-Level Loop Analysis and Pipelining of Applications Mapped to Xilinx
FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {391--396},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00068},
doi = {10.1109/FPL.2019.00068},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/OmidianL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PapaphilippouPL19,
author = {Philippos Papaphilippou and
Holger Pirk and
Wayne Luk},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Accelerating the Merge Phase of Sort-Merge Join},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {100--105},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00025},
doi = {10.1109/FPL.2019.00025},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PapaphilippouPL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PatelCFM19,
author = {Mrunal Patel and
Shenghsun Cho and
Michael Ferdman and
Peter A. Milder},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Runtime-Programmable Pipelines for Model Checkers on FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {51--58},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00018},
doi = {10.1109/FPL.2019.00018},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PatelCFM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PeetermansGRV19,
author = {Adriaan Peetermans and
Milos Grujic and
Vladimir Rozic and
Ingrid Verbauwhede},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Self-Calibrating True Random Number Generator},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {428},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00080},
doi = {10.1109/FPL.2019.00080},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/PeetermansGRV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PeetermansRV19,
author = {Adriaan Peetermans and
Vladimir Rozic and
Ingrid Verbauwhede},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Highly-Portable True Random Number Generator Based on Coherent Sampling},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {218--224},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00041},
doi = {10.1109/FPL.2019.00041},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PeetermansRV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PeltenburgSWLAH19,
author = {Johan Peltenburg and
Jeroen van Straten and
Lars Wijtemans and
Lars van Leeuwen and
Zaid Al{-}Ars and
H. Peter Hofstee},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Fletcher: {A} Framework to Efficiently Integrate {FPGA} Accelerators
with Apache Arrow},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {270--277},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00051},
doi = {10.1109/FPL.2019.00051},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PeltenburgSWLAH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PiyasenaWPLW19,
author = {Duvindu Piyasena and
Rukshan Wickramasinghe and
Debdeep Paul and
Siew{-}Kei Lam and
Meiqing Wu},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Reducing Dynamic Power in Streaming {CNN} Hardware Accelerators by
Exploiting Computational Redundancies},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {354--359},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00063},
doi = {10.1109/FPL.2019.00063},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/PiyasenaWPLW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PreusserW19,
author = {Thomas Preu{\ss}er and
Alexander Weiss},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {The CEDARtools Platform - Massive External Memory with High Bandwidth
and Low Latency Under Fine-Granular Random Access Patterns},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {426--427},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00079},
doi = {10.1109/FPL.2019.00079},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PreusserW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ProvelengiosHT19,
author = {George Provelengios and
Daniel E. Holcomb and
Russell Tessier},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Characterizing Power Distribution Attacks in Multi-User {FPGA} Environments},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {194--201},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00038},
doi = {10.1109/FPL.2019.00038},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ProvelengiosHT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RajatZP19,
author = {Rachit Rajat and
Hanqing Zeng and
Viktor K. Prasanna},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Flexible Design Automation Tool for Accelerating Quantized Spectral
CNNs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {144--150},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00031},
doi = {10.1109/FPL.2019.00031},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RajatZP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RenLSXQLYWYCH19,
author = {Yuchen Ren and
Zhijian Liao and
Xiaozhong Shi and
Jinyu Xie and
Yunhui Qiu and
Hankun Lv and
Wenbo Yin and
Lingli Wang and
Bowei Yu and
Hua Chen and
Xianjun He},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Low-Latency Multi-Version Key-Value Store Using B-Tree on an {FPGA-CPU}
Platform},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {321--325},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00058},
doi = {10.1109/FPL.2019.00058},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RenLSXQLYWYCH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RingleinADWHF19,
author = {Burkhard Ringlein and
Fran{\c{c}}ois Abel and
Alexander Ditter and
Beat Weiss and
Christoph Hagleitner and
Dietmar Fey},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {System Architecture for Network-Attached FPGAs in the Cloud using
Partial Reconfiguration},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {293--300},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00054},
doi = {10.1109/FPL.2019.00054},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RingleinADWHF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RuizSSAL19,
author = {Mario Ruiz and
David Sidler and
Gustavo Sutter and
Gustavo Alonso and
Sergio L{\'{o}}pez{-}Buedo},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Limago: An FPGA-Based Open-Source 100 GbE {TCP/IP} Stack},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {286--292},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00053},
doi = {10.1109/FPL.2019.00053},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RuizSSAL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SamajdarGKK19,
author = {Ananda Samajdar and
Tushar Garg and
Tushar Krishna and
Nachiket Kapre},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Scaling the Cascades: Interconnect-Aware {FPGA} Implementation of
Machine Learning Problems},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {342--349},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00061},
doi = {10.1109/FPL.2019.00061},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SamajdarGKK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShimodaSKN19,
author = {Masayuki Shimoda and
Youki Sada and
Ryosuke Kuramochi and
Hiroki Nakahara},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {An {FPGA} Implementation of Real-Time Object Detection with a Thermal
Camera},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {413--414},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00072},
doi = {10.1109/FPL.2019.00072},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ShimodaSKN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SierraMCC19,
author = {Roberto Sierra and
Filippo Mangani and
Carlos Carreras and
Gabriel Caffarena},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {High-Performance Decoding of Variable-Length Memory Data Packets for
{FPGA} Stream Processing},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {307--313},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00056},
doi = {10.1109/FPL.2019.00056},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SierraMCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SilvaSBT19,
author = {Bruno da Silva and
Laurent Segers and
An Braeken and
Abdellah Touhafi},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Demonstration of a Multimode SoC FPGA-Based Acoustic Camera},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {419--420},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00075},
doi = {10.1109/FPL.2019.00075},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SilvaSBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SinghDHSC19,
author = {Gagandeep Singh and
Dionysios Diamantopoulos and
Christoph Hagleitner and
Sander Stuijk and
Henk Corporaal},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {{NARMADA:} Near-Memory Horizontal Diffusion Accelerator for Scalable
Stencil Computations},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {263--269},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00050},
doi = {10.1109/FPL.2019.00050},
timestamp = {Thu, 03 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SinghDHSC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SunZW19,
author = {Xibo Sun and
Hao Zhou and
Lingli Wang},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Bent Routing Pattern for {FPGA}},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {9--16},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00012},
doi = {10.1109/FPL.2019.00012},
timestamp = {Tue, 02 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SunZW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TangGACG19,
author = {Xifan Tang and
Edouard Giacomin and
Aur{\'{e}}lien Alacchi and
Baudouin Chauviere and
Pierre{-}Emmanuel Gaillardon},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable
FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {367--374},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00065},
doi = {10.1109/FPL.2019.00065},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/TangGACG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Tapiador-Morales19,
author = {Ricardo Tapiador{-}Morales and
Antonio Rios{-}Navarro and
Juan Pedro Dominguez{-}Morales and
Daniel Gutierrez{-}Galan and
Alejandro Linares{-}Barranco},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Spiking Row-by-Row {FPGA} Multi-Kernel and Multi-Layer Convolution
Processor},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {248--249},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00046},
doi = {10.1109/FPL.2019.00046},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Tapiador-Morales19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TatsumuraDG19,
author = {Kosuke Tatsumura and
Alexander Dixon and
Hayato Goto},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {FPGA-Based Simulated Bifurcation Machine},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {59--66},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00019},
doi = {10.1109/FPL.2019.00019},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TatsumuraDG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ToupasBP19,
author = {Petros Toupas and
Andreas Brokalakis and
Ioannis Papaefstathiou},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Accelerating Physics Engine Components with Embedded FPGAs},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {88--94},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00023},
doi = {10.1109/FPL.2019.00023},
timestamp = {Sat, 19 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ToupasBP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UguenFD19,
author = {Yohann Uguen and
Luc Forget and
Florent de Dinechin},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Evaluating the Hardware Cost of the Posit Number System},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {106--113},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00026},
doi = {10.1109/FPL.2019.00026},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/UguenFD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VaishnavPMK19,
author = {Anuj Vaishnav and
Khoa Dang Pham and
Kristiyan Manev and
Dirk Koch},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {The {FOS} {(FPGA} Operating System) Demo},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {429},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00081},
doi = {10.1109/FPL.2019.00081},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VaishnavPMK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Venkataramanaiah19,
author = {Shreyas Kolala Venkataramanaiah and
Yufei Ma and
Shihui Yin and
Eriko Nurvitadhi and
Aravind Dasu and
Yu Cao and
Jae{-}sun Seo},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Automatic Compiler Based {FPGA} Accelerator for {CNN} Training},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {166--172},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00034},
doi = {10.1109/FPL.2019.00034},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Venkataramanaiah19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VestiasDSN19,
author = {M{\'{a}}rio P. V{\'{e}}stias and
Rui Policarpo Duarte and
Jos{\'{e}} T. de Sousa and
Hor{\'{a}}cio C. Neto},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Hybrid Dot-Product Calculation for Convolutional Neural Networks in
{FPGA}},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {350--353},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00062},
doi = {10.1109/FPL.2019.00062},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VestiasDSN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WijtvlietHWC19,
author = {Mark Wijtvliet and
Jos Huisken and
Luc Waeijen and
Henk Corporaal},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Blocks: Redesigning Coarse Grained Reconfigurable Architectures for
Energy Efficiency},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {17--23},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00013},
doi = {10.1109/FPL.2019.00013},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WijtvlietHWC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YuGWMWZMZMC19,
author = {Xiaoyu Yu and
Jianlin Gao and
Yuwei Wang and
Jie Miao and
Ephrem Wu and
Heng Zhang and
Yu Meng and
Bo Zhang and
Biao Min and
Dewei Chen},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {A Data-Center {FPGA} Acceleration Platform for Convolutional Neural
Networks},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {151--158},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00032},
doi = {10.1109/FPL.2019.00032},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YuGWMWZMZMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/2019,
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8890609/proceeding},
isbn = {978-1-7281-4884-7},
timestamp = {Sun, 22 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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