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@inproceedings{DBLP:conf/dft/Al-YamaniMM02,
author = {Ahmad A. Al{-}Yamani and
Subhasish Mitra and
Edward J. McCluskey},
title = {Testing Digital Circuits with Constraints},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {195--206},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173516},
doi = {10.1109/DFTVS.2002.1173516},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Al-YamaniMM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/AlexandrescuAN02,
author = {Dan Alexandrescu and
Lorena Anghel and
Michael Nicolaidis},
title = {New Methods for Evaluating the Impact of Single Event Transients in
{VDSM} ICs},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {99--107},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173506},
doi = {10.1109/DFTVS.2002.1173506},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/AlexandrescuAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/AntoniLF02,
author = {L{\"{o}}rinc Antoni and
R{\'{e}}gis Leveugle and
B{\'{e}}la Feh{\'{e}}r},
title = {Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {245--253},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173521},
doi = {10.1109/DFTVS.2002.1173521},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/AntoniLF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BalakrishnanT02,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Matrix-Based Test Vector Decompression Using an Embedded Processor},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {159--165},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173512},
doi = {10.1109/DFTVS.2002.1173512},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BalakrishnanT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BertoniBKMP02,
author = {Guido Bertoni and
Luca Breveglieri and
Israel Koren and
Paolo Maistri and
Vincenzo Piuri},
title = {A Parity Code Based Fault Detection for an Implementation of the Advanced
Encryption Standard},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {51--59},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173501},
doi = {10.1109/DFTVS.2002.1173501},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BertoniBKMP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BlancGG02,
author = {Sara Blanc and
Joaquin Gracia and
Pedro J. Gil},
title = {A Fault Hypothesis Study on the {TTP/C} Using VHDL-Based and Pin-Level
Fault Injection Techniques},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {254--262},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173522},
doi = {10.1109/DFTVS.2002.1173522},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BlancGG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BolchiniSS02,
author = {Cristiana Bolchini and
Fabio Salice and
Donatella Sciuto},
title = {Designing Self-Checking FPGAs through Error Detection Codes},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {60--68},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173502},
doi = {10.1109/DFTVS.2002.1173502},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BolchiniSS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/CastelnuovotFFS02,
author = {A. Castelnuovo and
Alessandro Fin and
Franco Fummi and
F. Sforza},
title = {Emulation-Based Design Errors Identification},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {365--371},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173533},
doi = {10.1109/DFTVS.2002.1173533},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/CastelnuovotFFS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ChangCPL02,
author = {Y. Chang and
Minsu Choi and
Nohpill Park and
Fabrizio Lombardi},
title = {Repairability Evaluation of Embedded Multiple Region DRAMs},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {428--436},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173541},
doi = {10.1109/DFTVS.2002.1173541},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ChangCPL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Cheng02,
author = {Ching{-}Hwa Cheng},
title = {Adaptable Voltage Scan Testing of Charge-Sharing Faults for Domino
Circuits},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {147--158},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173511},
doi = {10.1109/DFTVS.2002.1173511},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Cheng02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ChoiPLKP02,
author = {Minsu Choi and
Nohpill Park and
Fabrizio Lombardi and
Yong{-}Bin Kim and
Vincenzo Piuri},
title = {Balanced Redundancy Utilization in Embedded Memory Cores for Dependable
Systems},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {419--427},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173540},
doi = {10.1109/DFTVS.2002.1173540},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ChoiPLKP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/CiveraMV02,
author = {Pierluigi Civera and
Luca Macchiarulo and
Massimo Violante},
title = {A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {31--39},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173499},
doi = {10.1109/DFTVS.2002.1173499},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/CiveraMV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DworakWCLWM02,
author = {Jennifer Dworak and
James Wingfield and
Brad Cobb and
Sooryong Lee and
Li{-}C. Wang and
M. Ray Mercer},
title = {Fortuitous Detection and its Impact on Test Set Sizes Using Stuck-at
and Transition Faults},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {177--185},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173514},
doi = {10.1109/DFTVS.2002.1173514},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DworakWCLWM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/GoncalvesSTT02,
author = {Fernando M. Gon{\c{c}}alves and
Marcelino B. Santos and
Isabel C. Teixeira and
Jo{\~{a}}o Paulo Teixeira},
title = {Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {216--224},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173518},
doi = {10.1109/DFTVS.2002.1173518},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/GoncalvesSTT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HamamuraNKIOKS02,
author = {Yuichi Hamamura and
Kazunori Nemoto and
Takaaki Kumazawa and
Hisafumi Iwata and
Kousuke Okuyama and
Shiro Kamohara and
Aritoshi Sugimoto},
title = {Repair Yield Simulation with Iterative Critical Area Analysis for
Different Types of Failure},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {305--313},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173527},
doi = {10.1109/DFTVS.2002.1173527},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HamamuraNKIOKS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HashempourKP02,
author = {Hamidreza Hashempour and
Yong{-}Bin Kim and
Nohpill Park},
title = {A Test-Vector Generation Methodology for Crosstalk Noise Faults},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {40--50},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173500},
doi = {10.1109/DFTVS.2002.1173500},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HashempourKP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HashempourML02,
author = {Hamidreza Hashempour and
Fred J. Meyer and
Fabrizio Lombardi},
title = {Test Time Reduction in a Manufacturing Environment by Combining {BIST}
and {ATE}},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {186--194},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173515},
doi = {10.1109/DFTVS.2002.1173515},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HashempourML02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HoriguchiM02,
author = {Susumu Horiguchi and
Yasuyuki Miura},
title = {Performance of Deadlock-Free Adaptive Routing for Hierarchical Interconnection
Network {TESH}},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {275--283},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173524},
doi = {10.1109/DFTVS.2002.1173524},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HoriguchiM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/KarimiMNL02,
author = {Farzin Karimi and
Waleed Meleis and
Zainalabedin Navabi and
Fabrizio Lombardi},
title = {Data Compression for System-on-Chip Testing Using {ATE}},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {166--176},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173513},
doi = {10.1109/DFTVS.2002.1173513},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/KarimiMNL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/KhademsameniS02,
author = {Pedram Khademsameni and
Marek Syrzycki},
title = {Manufacturability Analysis of Analog {CMOS} ICs through Examination
of Multiple Layout Solutions},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {3--11},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173496},
doi = {10.1109/DFTVS.2002.1173496},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/KhademsameniS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LombardiP02,
author = {Fabrizio Lombardi and
Nohpill Park},
title = {Testing Layered Interconnection Networks},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {293--304},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173526},
doi = {10.1109/DFTVS.2002.1173526},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/LombardiP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MarienfeldOGS02,
author = {Daniel Marienfeld and
Vitalij Ocheretnij and
Michael G{\"{o}}ssel and
Egor S. Sogomonyan},
title = {Partially Duplicated Code-Disjoint Carry-Skip Adder},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {78--86},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173504},
doi = {10.1109/DFTVS.2002.1173504},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MarienfeldOGS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MathewD02,
author = {Jimson Mathew and
Elena Dubrova},
title = {Self-Checking 1-out-of-n {CMOS} Current-Mode Checker},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {69--77},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173503},
doi = {10.1109/DFTVS.2002.1173503},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MathewD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MaziarzJ02,
author = {Bogdan M. Maziarz and
Vijay K. Jain},
title = {Yield Estimates for the {TESH} Multicomputer Network},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {20--30},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173498},
doi = {10.1109/DFTVS.2002.1173498},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MaziarzJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MetraFM02,
author = {Cecilia Metra and
Stefano Di Francescantonio and
Giuseppe Marrale},
title = {On-Line Testing of Transient Faults Affecting Functional Blocks of
FCMOS, Domino and FPGA-Implemented Self-Checking Circuits},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {207--215},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173517},
doi = {10.1109/DFTVS.2002.1173517},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MetraFM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MohanramT02,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Input Ordering in Concurrent Checkers to Reduce Power Consumption},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {87--98},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173505},
doi = {10.1109/DFTVS.2002.1173505},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MohanramT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Piestrak02,
author = {Stanislaw J. Piestrak},
title = {Feasibility Study of Designing {TSC} Sequential Circuits with 100{\%}
Fault Coverage},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {354--364},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173532},
doi = {10.1109/DFTVS.2002.1173532},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Piestrak02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/PleskaczBK02,
author = {Witold A. Pleskacz and
Tomasz Borejko and
Wieslaw Kuzmicz},
title = {{CMOS} Standard Cells Characterization for {IDDQ} Testing},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {390--398},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173536},
doi = {10.1109/DFTVS.2002.1173536},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/PleskaczBK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/QiuSLWT02,
author = {Bing Qiu and
Yvon Savaria and
Meng Lu and
Chunyan Wang and
Claude Thibeault},
title = {Yield Modeling of a {WSI} Telecom Router Architecture},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {314--324},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173528},
doi = {10.1109/DFTVS.2002.1173528},
timestamp = {Tue, 05 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/QiuSLWT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RebaudengoRV02,
author = {Maurizio Rebaudengo and
Matteo Sonza Reorda and
Massimo Violante},
title = {A New Functional Fault Model for {FPGA} Application-Oriented Testing},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {372--380},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173534},
doi = {10.1109/DFTVS.2002.1173534},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RebaudengoRV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ReordaV02,
author = {Matteo Sonza Reorda and
Massimo Violante},
title = {Fault List Compaction through Static Timing Analysis for Efficient
Fault Injection Experiments},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {263--274},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173523},
doi = {10.1109/DFTVS.2002.1173523},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ReordaV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RodriguezCS02,
author = {Francisco Rodr{\'{\i}}guez and
Jos{\'{e}} Carlos Campelo and
Juan Jos{\'{e}} Serrano},
title = {A Memory Overhead valuation of the Interleaved Signature Instruction
Stream},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {225--232},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173519},
doi = {10.1109/DFTVS.2002.1173519},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RodriguezCS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RosingerAN02,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Scan Architecture for Shift and Capture Cycle Power Reduction},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {129--137},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173509},
doi = {10.1109/DFTVS.2002.1173509},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RosingerAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SabadeW02,
author = {Sagar S. Sabade and
D. M. H. Walker},
title = {Neighbor Current Ratio {(NCR):} {A} New Metric for {IDDQ} Data Analysis},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {381--389},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173535},
doi = {10.1109/DFTVS.2002.1173535},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SabadeW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SaliceSS02,
author = {Fabio Salice and
Mariagiovanna Sami and
Renato Stefanelli},
title = {Fault-Tolerant {CAM} Architectures: {A} Design Framework},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {233--244},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173520},
doi = {10.1109/DFTVS.2002.1173520},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SaliceSS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SankaralingamT02,
author = {Ranganathan Sankaralingam and
Nur A. Touba},
title = {Inserting Test Points to Control Peak Power During Scan Testing},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {138--146},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173510},
doi = {10.1109/DFTVS.2002.1173510},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SankaralingamT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SinanogluO02,
author = {Ozgur Sinanoglu and
Alex Orailoglu},
title = {Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation
Exploitation},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {325--333},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173529},
doi = {10.1109/DFTVS.2002.1173529},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SinanogluO02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/StopjakovaMBM02,
author = {Viera Stopjakov{\'{a}} and
Daniel Micus{\'{\i}}k and
Lubica Benuskov{\'{a}} and
Martin Margala},
title = {Neural Networks-Based Parametric Testing of Analog {IC}},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {408--418},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173538},
doi = {10.1109/DFTVS.2002.1173538},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/StopjakovaMBM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SunAT02,
author = {Xiaoling Sun and
A. Alimohammad and
Pieter M. Trouborst},
title = {Modeling of {FPGA} Local/Global Interconnect Resources and Derivation
of Minimal Test Configurations},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {284--292},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173525},
doi = {10.1109/DFTVS.2002.1173525},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SunAT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/VassighiSSK02,
author = {Arman Vassighi and
Oleg Semenov and
Manoj Sachdev and
Ali Keshavarzi},
title = {Effect of Static Power Dissipation in Burn-In Environment on Yield
of {VLSI}},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {12--19},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173497},
doi = {10.1109/DFTVS.2002.1173497},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/VassighiSSK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/VelazcoCF02,
author = {Raoul Velazco and
A. Corominas and
Pablo A. Ferreyra},
title = {Injecting Bit Flip Faults by Means of a Purely Software Approach:
{A} Case Studied},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {108--116},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173507},
doi = {10.1109/DFTVS.2002.1173507},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/VelazcoCF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/VerdelM02,
author = {Thomas Verdel and
Yiorgos Makris},
title = {Duplication-Based Concurrent Error Detection in Asynchronous Circuits:
Shortcomings and Remedies},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {345--353},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173531},
doi = {10.1109/DFTVS.2002.1173531},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/VerdelM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/WangHH02,
author = {Horng{-}Bin Wang and
Shi{-}Yu Huang and
Jing{-}Reng Huang},
title = {Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {117--128},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173508},
doi = {10.1109/DFTVS.2002.1173508},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/WangHH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/XiaL02,
author = {Tian Xia and
Jien{-}Chung Lo},
title = {On-Chip Jitter Measurement for Phase Locked Loops},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {399--407},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173537},
doi = {10.1109/DFTVS.2002.1173537},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/XiaL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ZhaoU02,
author = {Dan Zhao and
Shambhu J. Upadhyaya},
title = {Adaptive Test Scheduling in SoC's by Dynamic Partitioning},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {334--344},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173530},
doi = {10.1109/DFTVS.2002.1173530},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ZhaoU02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dft/2002,
title = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://ieeexplore.ieee.org/xpl/conhome/8374/proceeding},
isbn = {0-7695-1831-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/2002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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