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@inproceedings{DBLP:conf/cdes/Ahmad09,
author = {Mushtaq Ahmad},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {The Computing Technology And John Von Neumann's Computer Architecture
Giving Way To Optical Computing},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {200--206},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 13:41:31 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Ahmad09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Al-Asaad09,
author = {Hussain Al{-}Asaad},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Detection and Isolation of Faulty Processors in Multiprocessor Systems
via TMR-Based Time Redundant Task Scheduling},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {42--47},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Al-Asaad09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/AsghariZPAK09,
author = {Seyyed Amir Asghari and
Hamid R. Zarandi and
Hossein Pedram and
Morteza Ansarinia and
Mohammad Khademi},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A Fault Injection Attitude based on Background Debug Mode in Embedded
Systems},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {100--104},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/AsghariZPAK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/AyariATB09,
author = {Mohamed Ayari and
Taoufik Aguili and
Helmi Temimi and
Henri Baudrand},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {EM-Modeling of Excitation Source in Transverse Wave Approach {(TWA)}
for {RF} Integrated Circuits Applications},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {193--199},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/AyariATB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/CampoyROS09,
author = {Antonio Mart{\'{\i}} Campoy and
Francisco Rodr{\'{\i}}guez{-}Ballester and
Rafael Ors and
Juan Jos{\'{e}} Serrano},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Saving Cache Memory Using a Locking Cache in Real-time Systems},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {184--189},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/CampoyROS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/ChenANW09,
author = {Chung{-}Han Chen and
Saritha Akavaram and
Hira N. Narang and
Fan Wu},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Yield and Reliability Enhancement for {VLSI} Design},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {48--51},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Tue, 02 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cdes/ChenANW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/ChiemA09,
author = {Calvin Chiem and
Hussain Al{-}Asaad},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Low Power Methodologies and Challenges for {PWM} {DC-DC} Converters},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {70--75},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/ChiemA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/ChungLLLC09,
author = {Shen{-}Ming Chung and
Shun{-}Chieh Lin and
Chun{-}Yi Li and
Hsiao{-}Hui Lee and
Chi{-}Chun Chen},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Implementation and Analysis of an Efficient {TCP/IP} Offload Engine},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {178--183},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/ChungLLLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/CritesJL09,
author = {David Crites and
Eric Jordan and
Weidong Liao},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A Survey on Power-Aware Computer System Design},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {85--89},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/CritesJL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Davis09,
author = {Brett Davis},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {{CLIW} - Clue - Compressed Long Instruction Words},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {207--210},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Davis09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/DugganapallyA09,
author = {Indira Dugganapally and
Waleed Al{-}Assadi},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Null Conventional Logic {(NCL)} Implementation of a Bit-Wise Pipeline
Dual-Rail {(NCL)} 2 (to the power of) {S} Complement Multiplier},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {17--23},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/DugganapallyA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Hobson09,
author = {Richard F. Hobson},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A 5T Sram Cell with 4 Power Terminals for Read/Write/Standby Assist},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {10--16},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Hobson09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Horner09,
author = {Jack Horner},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Some Power-Law Scaling LImits to Computer Memory Architectures},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {159--163},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Horner09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/JeonH09,
author = {Yong{-}Sung Jeon and
Jong Wook Han},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Compact Design of a Combined MixColumn/InvMixColumn Transformation
Module for {AES}},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {38--41},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Thu, 09 Jan 2014 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/JeonH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/JohnNJH09,
author = {Binu P. John and
Pradeep S. Nair and
Eugene John and
Fred W. Hudson},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Performance Measurement of Single, Dual and Quad Core Machines Using
{SPEC} {CPU2006}},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {143--149},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 13 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/JohnNJH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Khwaja09,
author = {Amir Khwaja},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A Block Based Validation Methodology for Derivative SoC Products},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {93--99},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Khwaja09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Khwaja09a,
author = {Amir Khwaja},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {{DIM:} a Post-Silicon Engineering Impact Analysis Method for Derivative
SoC Products},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {105--110},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Khwaja09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/KimKKK09,
author = {Sung{-}Bin Kim and
Se{-}Jin Ko and
Ki{-}Young Kim and
Seok{-}Yoon Kim},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Reducing the Far-end Crosstalk Using Advanced Guard Trace in {PCB}
Transmission Lines},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {57--59},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/KimKKK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/KimKKK09a,
author = {Ki{-}Young Kim and
Sung{-}Bin Kim and
Se{-}Jin Ko and
Seok{-}Yoon Kim},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Analytic Models for Peak Current Computation in General Interconnect
Circuits},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {60--62},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/KimKKK09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/KwakK09,
author = {Jong Wook Kwak and
Ju{-}Hwan Kim},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Performance Evaluation Model of Branch Input Vectors using Neural
Network},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {31--37},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/KwakK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/LiFCZ09,
author = {Xiaobo Li and
Ming Fu and
Xiangdong Cui and
Zhou Zhou},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Super-Program Architectures - {A} New Driving Method for Executing
Instructions},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {111--116},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/LiFCZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/LiH09,
author = {Jia{-}Jhe Li and
Yuan{-}Shin Hwang},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Indirect-Mapped Caches: Approximating Set-Associativity with Direct-Mapped
Caches},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {164--170},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/LiH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Mogos09,
author = {Gabriela Mogos},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {How to Mark an Image from a Quantum Point of View},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {131--133},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/Mogos09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/MohamedBA09,
author = {Nagm Mohamed and
Nazeih Botros and
Mohamad Alweh},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {{EPIC:} An Energy Exploitative Architecture},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {65--69},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/MohamedBA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/MoshnyagaHH09,
author = {Vasily G. Moshnyaga and
Koji Hashimoto and
Shuhei Higashi},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A Hardware System for Tracking Eyes of Computer User},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {125--130},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/MoshnyagaHH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/NairSD09,
author = {Ravi Sankar Parameswaran Nair and
Scott C. Smith and
Jia Di},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Delay-Insensitive Ternary Logic},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {3--0},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/NairSD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/OgasawaraWMN09,
author = {Yoshiyasu Ogasawara and
Pulung Waskito and
Shinobu Miwa and
Hironori Nakajo},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Dynamic Switching Techniques of Accessing {L1/L2} Cache on an {SMT}
Processor},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {171--177},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/OgasawaraWMN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/Ortiz09,
author = {Jorge Ortiz},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {A Reconfigurable Superscalar Processor Architecture for FPGA-based
Designs},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {211--217},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 07 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cdes/Ortiz09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/PalangpourVS09,
author = {Parviz Palangpour and
Ganesh K. Venayagamoorthy and
Scott C. Smith},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Particle Swarm Optimization: {A} Hardware Implementation},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {134--139},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Wed, 19 May 2010 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cdes/PalangpourVS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/PatelG09,
author = {K. S. Vasundara Patel and
K. S. Gurumurthy},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Moving From Binary Towards Multi-valued logic},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {24--30},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/PatelG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/PlayneJH09,
author = {Daniel P. Playne and
Mitchell Johnson and
Kenneth A. Hawick},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Benchmarking {GPU} Devices with N-Body Simulations},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {150--156},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Wed, 04 Nov 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/PlayneJH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/SharmaCSKGL09,
author = {Rohit Sharma and
Nitin and
Vivek Kumar Sehgal and
Amit Kumar and
Preity Gupta and
Ashish Nandan Lal},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {{DELSIC:} {A} Delay Simulator for Interconnect Circuits},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {52--56},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Sat, 05 Dec 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/SharmaCSKGL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/ShiL09,
author = {Tuo Shi and
Jaehwan Lee},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {An {O(L)} Parallel Shortest Path Algorithm},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {119--124},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/ShiL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/SinghYK09,
author = {Yashpal Singh and
Vikram Singh Yadav and
Tarun Kumar},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {{PES:} Power Efficient Scatternet},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {76--79},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/SinghYK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/YangKRJK09,
author = {Yil Suk Yang and
Jongdae Kim and
Tae Moon Roh and
Moon Gyu Jang and
Woo Hyun Kwon},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Energy-Aware 32bit Parallel Processing Unit with Multi Operation Modes
and 2 Step Data Gating Technique for Multimedia Processor},
booktitle = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
pages = {80--84},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/YangKRJK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cdes/2009,
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Proceedings of the 2009 International Conference on Computer Design,
{CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
publisher = {{CSREA} Press},
year = {2009},
isbn = {1-60132-096-5},
timestamp = {Fri, 30 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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