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@incollection{DBLP:series/icas/Al-MaashriSD0V11,
  author       = {Ahmed Al{-}Maashri and
                  Guangyu Sun and
                  Xiangyu Dong and
                  Yuan Xie and
                  Narayanan Vijaykrishnan},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Influence of Stacked 3D Memory/Cache Architectures on GPUs},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {249--271},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_11},
  doi          = {10.1007/978-1-4419-7618-5\_11},
  timestamp    = {Sun, 19 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/Al-MaashriSD0V11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/FeeroP11,
  author       = {Brett Stanley Feero and
                  Partha Pratim Pande},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Three-Dimensional Networks-on-Chip: Performance Evaluation},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {115--145},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_6},
  doi          = {10.1007/978-1-4419-7618-5\_6},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/FeeroP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/FranzonDT11,
  author       = {Paul D. Franzon and
                  W. Rhett Davis and
                  Thorlindur Thorolfsson},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Design and Computer Aided Design of 3DIC},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {75--88},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_4},
  doi          = {10.1007/978-1-4419-7618-5\_4},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/FranzonDT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/JantschGP11,
  author       = {Axel Jantsch and
                  Matthew Grange and
                  Dinesh Pamunuwa},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {The Promises and Limitations of 3-D Integration},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {27--44},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_2},
  doi          = {10.1007/978-1-4419-7618-5\_2},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/series/icas/JantschGP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/Marinissen11,
  author       = {Erik Jan Marinissen},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Testing 3D Stacked ICs Containing Through-Silicon Vias},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {47--74},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_3},
  doi          = {10.1007/978-1-4419-7618-5\_3},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/Marinissen11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/MatsutaniKKA11,
  author       = {Hiroki Matsutani and
                  Michihiro Koibuchi and
                  Tadahiro Kuroda and
                  Hideharu Amano},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {3-D NoC on Inductive Wireless Interconnect},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {225--248},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_10},
  doi          = {10.1007/978-1-4419-7618-5\_10},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/MatsutaniKKA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/PavlidisF11,
  author       = {Vasilis F. Pavlidis and
                  Eby G. Friedman},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Physical Analysis of NoC Topologies for 3-D Integrated Systems},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {89--114},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_5},
  doi          = {10.1007/978-1-4419-7618-5\_5},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/PavlidisF11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/SeiculescuMBM11,
  author       = {Ciprian Seiculescu and
                  Srinivasan Murali and
                  Luca Benini and
                  Giovanni De Micheli},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {3D Network on Chip Topology Synthesis: Designing Custom Topologies
                  for Chip Stacks},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {193--223},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_9},
  doi          = {10.1007/978-1-4419-7618-5\_9},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/SeiculescuMBM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/SheibanyradP11,
  author       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Asynchronous 3D-NoCs Making Use of Serialized Vertical Links},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {149--165},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_7},
  doi          = {10.1007/978-1-4419-7618-5\_7},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/SheibanyradP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/Tan11,
  author       = {Chuan Seng Tan},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Three-Dimensional Integration of Integrated Circuits - an Introduction},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {3--26},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_1},
  doi          = {10.1007/978-1-4419-7618-5\_1},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/Tan11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:series/icas/YanL11,
  author       = {Shan Yan and
                  Bill Lin},
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {Design of Application-Specific 3D Networks-on-Chip Architectures},
  booktitle    = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  pages        = {167--191},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5\_8},
  doi          = {10.1007/978-1-4419-7618-5\_8},
  timestamp    = {Mon, 01 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/YanL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/icas/2011SPJ,
  editor       = {Abbas Sheibanyrad and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
                  Axel Jantsch},
  title        = {3D Integration for NoC-based SoC Architectures},
  series       = {Integrated Circuits and Systems},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-1-4419-7618-5},
  doi          = {10.1007/978-1-4419-7618-5},
  isbn         = {978-1-4419-7617-8},
  timestamp    = {Mon, 06 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/icas/2011SPJ.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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