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@article{DBLP:journals/todaes/AbbasianHAP08,
author = {Ali Abbasian and
Safar Hatami and
Ali Afzali{-}Kusha and
Massoud Pedram},
title = {Wavelet-based dynamic power management for nonstationary service requests},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {13:1--13:41},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297679},
doi = {10.1145/1297666.1297679},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/AbbasianHAP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/AhnHLSYCF08,
author = {Yongjin Ahn and
Keesung Han and
Ganghee Lee and
Hyunjik Song and
Jun{-}hee Yoo and
Kiyoung Choi and
Xingguang Feng},
title = {SoCDAL: System-on-chip design AcceLerator},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {17:1--17:38},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297683},
doi = {10.1145/1297666.1297683},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/AhnHLSYCF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaharC08,
author = {R. Iris Bahar and
Krishnendu Chakrabarty},
title = {Introduction to joint {ACM} {JETC/TODAES} special issue on new, emerging,
and specialized technologies},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {36:1--36:2},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344432},
doi = {10.1145/1344418.1344432},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BaharC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaldassinCRCSSF08,
author = {Alexandro Baldassin and
Paulo Centoducatte and
Sandro Rigo and
Daniel C. Casarotto and
Luiz C. V. dos Santos and
Max R. de O. Schultz and
Olinto J. V. Furtado},
title = {An open-source binary utility generator},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {27:1--27:17},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344423},
doi = {10.1145/1344418.1344423},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/BaldassinCRCSSF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BanerjeeDC08,
author = {Ansuman Banerjee and
Pallab Dasgupta and
P. P. Chakrabarti},
title = {Auxiliary state machines + context-triggered properties in verification},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {62:1--62:31},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391970},
doi = {10.1145/1391962.1391970},
timestamp = {Mon, 07 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BanerjeeDC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaradaranD08,
author = {Nastaran Baradaran and
Pedro C. Diniz},
title = {A compiler approach to managing storage and memory bandwidth in configurable
architectures},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {61:1--61:26},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391969},
doi = {10.1145/1391962.1391969},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/BaradaranD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BernasconiCC08,
author = {Anna Bernasconi and
Valentina Ciriani and
Roberto Cordone},
title = {The optimization of kEP-SOPs: Computational complexity, approximability
and experiments},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {35:1--35:31},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344431},
doi = {10.1145/1344418.1344431},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BernasconiCC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BombieriFP08,
author = {Nicola Bombieri and
Franco Fummi and
Graziano Pravadelli},
title = {Reuse and optimization of testbenches and properties in a TLM-to-RTL
design flow},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {47:1--47:22},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367056},
doi = {10.1145/1367045.1367056},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BombieriFP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BouleZ08,
author = {Marc Boule and
Zeljko Zilic},
title = {Automata-based assertion-checker synthesis of {PSL} properties},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {4:1--4:21},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297670},
doi = {10.1145/1297666.1297670},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BouleZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/CabodiMNQ08,
author = {Gianpiero Cabodi and
Marco Murciano and
Sergio Nocco and
Stefano Quer},
title = {Boosting interpolation with dynamic localized abstraction and redundancy
removal},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {3:1--3:20},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297669},
doi = {10.1145/1297666.1297669},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/CabodiMNQ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ChangSC08,
author = {Kuei{-}Chung Chang and
Jih{-}Sheng Shen and
Tien{-}Fu Chen},
title = {Tailoring circuit-switched network-on-chip to application-specific
system-on-chip by two optimization schemes},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {12:1--12:31},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297678},
doi = {10.1145/1297666.1297678},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ChangSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ChaoM08,
author = {Wei{-}Chung Chao and
Wai{-}Kei Mak},
title = {Low-power gated and buffered clock network construction},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {20:1--20:20},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297686},
doi = {10.1145/1297666.1297686},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ChaoM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ChengCW08,
author = {Lei Cheng and
Deming Chen and
Martin D. F. Wong},
title = {A fast simultaneous input vector generation and gate replacement algorithm
for leakage power reduction},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {34:1--34:15},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344430},
doi = {10.1145/1344418.1344430},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/ChengCW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/DasK08,
author = {Sabyasachi Das and
Sunil P. Khatri},
title = {Resource sharing among mutually exclusive sum-of-product blocks for
area reduction},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {51:1--51:7},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367060},
doi = {10.1145/1367045.1367060},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/DasK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Dutt08,
author = {Nikil D. Dutt},
title = {Editorial},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {1:1},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297667},
doi = {10.1145/1297666.1297667},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/Dutt08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Dutt08a,
author = {Nikil D. Dutt},
title = {Editorial},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {23:1},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344419},
doi = {10.1145/1344418.1344419},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/Dutt08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Dutt08b,
author = {Nikil D. Dutt},
title = {Editorial},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {37:1--37:2},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367046},
doi = {10.1145/1367045.1367046},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/Dutt08b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/GargM08,
author = {Siddharth Garg and
Diana Marculescu},
title = {System-level throughput analysis for process variation aware multiple
voltage-frequency island designs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {59:1--59:25},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391967},
doi = {10.1145/1391962.1391967},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/GargM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/GuanDGXY08,
author = {Nan Guan and
Qingxu Deng and
Zonghua Gu and
Wenyao Xu and
Ge Yu},
title = {Schedulability analysis of preemptive and nonpreemptive {EDF} on partial
runtime-reconfigurable FPGAs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {56:1--56:43},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391964},
doi = {10.1145/1391962.1391964},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/GuanDGXY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HsiaoJ08,
author = {Michael S. Hsiao and
Robert B. Jones},
title = {Introduction to special section on high-level design, validation,
and test},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {2:1},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297668},
doi = {10.1145/1297666.1297668},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/HsiaoJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HuLHT08,
author = {Yu Hu and
Yan Lin and
Lei He and
Tim Tuan},
title = {Physical synthesis for {FPGA} interconnect power reduction by dual-Vdd
budgeting and retiming},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {30:1--30:29},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344426},
doi = {10.1145/1344418.1344426},
timestamp = {Wed, 30 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/HuLHT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HuffmireBCVWKS08,
author = {Ted Huffmire and
Brett Brotherton and
Nick Callegari and
Jonathan Valamehr and
Jeff White and
Ryan Kastner and
Timothy Sherwood},
title = {Designing secure systems on reconfigurable hardware},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {44:1--44:24},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367053},
doi = {10.1145/1367045.1367053},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/HuffmireBCVWKS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/InoueSE08,
author = {Hiroaki Inoue and
Junji Sakai and
Masato Edahiro},
title = {Processor virtualization for secure mobile terminals},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {48:1--48:23},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367057},
doi = {10.1145/1367045.1367057},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/InoueSE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JohnsonP08,
author = {F. Ryan Johnson and
JoAnn M. Paul},
title = {Interrupt modeling for efficient high-level scheduler design space
exploration},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {10:1--10:22},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297676},
doi = {10.1145/1297666.1297676},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JohnsonP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JonesDTMHHCM08,
author = {Alex K. Jones and
Swapna R. Dontharaju and
Shen Chih Tung and
Leonid Mats and
Peter J. Hawrylak and
Raymond R. Hoare and
James T. Cain and
Marlin H. Mickle},
title = {Radio frequency identification prototyping},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {29:1--29:22},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344425},
doi = {10.1145/1344418.1344425},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JonesDTMHHCM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JonesW08,
author = {Alex K. Jones and
Robert Walker},
title = {Introduction to the special section on demonstrable software systems
and hardware platforms {II}},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {38:1--38:3},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367047},
doi = {10.1145/1367045.1367047},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JonesW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JooCSPC08,
author = {Yongsoo Joo and
Youngjin Cho and
Donghwa Shin and
Jaehyun Park and
Naehyuck Chang},
title = {An energy characterization platform for memory devices and energy-aware
data compression for multilevel-cell flash memory},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {43:1--43:29},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367052},
doi = {10.1145/1367045.1367052},
timestamp = {Mon, 19 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JooCSPC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KhatibPBBBKJN08,
author = {Iyad Al Khatib and
Francesco Poletti and
Davide Bertozzi and
Luca Benini and
Mohamed Bechara and
Hasan Khalifeh and
Axel Jantsch and
Rustam Nabiev},
title = {A multiprocessor system-on-chip for real-time biomedical monitoring
and analysis: {ECG} prototype architectural design space exploration},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {31:1--31:21},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344427},
doi = {10.1145/1344418.1344427},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KhatibPBBBKJN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KrashinskyBA08,
author = {Ronny Krashinsky and
Christopher Batten and
Krste Asanovic},
title = {Implementing the scale vector-thread processor},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {41:1--41:24},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367050},
doi = {10.1145/1367045.1367050},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KrashinskyBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KrishnaswamyVMH08,
author = {Smita Krishnaswamy and
George F. Viamontes and
Igor L. Markov and
John P. Hayes},
title = {Probabilistic transfer matrices in symbolic reliability analysis of
logic circuits},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {8:1--8:35},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297674},
doi = {10.1145/1297666.1297674},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KrishnaswamyVMH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KumarFHMC08,
author = {Akash Kumar and
Shakith Fernando and
Yajun Ha and
Bart Mesman and
Henk Corporaal},
title = {Multiprocessor systems synthesis for multiple use-cases of multiple
applications on {FPGA}},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {40:1--40:27},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367049},
doi = {10.1145/1367045.1367049},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KumarFHMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KwonKJHP08,
author = {Seongnam Kwon and
Yongjoo Kim and
Woo{-}Chul Jeun and
Soonhoi Ha and
Yunheung Paek},
title = {A retargetable parallel-programming framework for MPSoC},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {39:1--39:18},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367048},
doi = {10.1145/1367045.1367048},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KwonKJHP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LeeCZCKV08,
author = {Kyungsoo Lee and
Naehyuck Chang and
Jianli Zhuo and
Chaitali Chakrabarti and
Sudheendra Kadri and
Sarma B. K. Vrudhula},
title = {A fuel-cell-battery hybrid for portable embedded systems},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {19:1--19:34},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297685},
doi = {10.1145/1297666.1297685},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LeeCZCKV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LiuON08,
author = {Fang Liu and
Sule Ozev and
Plamen K. Nikolov},
title = {Parametric variability analysis for multistage analog circuits using
analytical sensitivity modeling},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {33:1--33:28},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344429},
doi = {10.1145/1344418.1344429},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LiuON08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LuCL08,
author = {Chao{-}Hung Lu and
Hung{-}Ming Chen and
Chien{-}Nan Jimmy Liu},
title = {Effective decap insertion in area-array SoC floorplan design},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {66:1--66:20},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391974},
doi = {10.1145/1391962.1391974},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LuCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ManoliosS08,
author = {Panagiotis Manolios and
Sudarshan K. Srinivasan},
title = {Automatic verification of safety and liveness for pipelined machines
using {WEB} refinement},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {45:1--45:19},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367054},
doi = {10.1145/1367045.1367054},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ManoliosS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MishraD08,
author = {Prabhat Mishra and
Nikil D. Dutt},
title = {Specification-driven directed test generation for validation of pipelined
processors},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {42:1--42:36},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367051},
doi = {10.1145/1367045.1367051},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/MishraD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MoffittRMP08,
author = {Michael D. Moffitt and
Jarrod A. Roy and
Igor L. Markov and
Martha E. Pollack},
title = {Constraint-driven floorplan repair},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {67:1--67:13},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391975},
doi = {10.1145/1391962.1391975},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MoffittRMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MoiseevKW08,
author = {Konstantin Moiseev and
Avinoam Kolodny and
Shmuel Wimer},
title = {Timing-aware power-optimal ordering of signals},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {65:1--65:17},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391973},
doi = {10.1145/1391962.1391973},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MoiseevKW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MoscolaLC08,
author = {James Moscola and
John W. Lockwood and
Young H. Cho},
title = {Reconfigurable content-based router using hardware-accelerated language
parser},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {28:1--28:25},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344424},
doi = {10.1145/1344418.1344424},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MoscolaLC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MuchherlaCMW08,
author = {Kishore Kumar Muchherla and
Pinhong Chen and
Dongsheng Ma and
Janet Meiling Wang},
title = {A noniterative equivalent waveform model for timing analysis in presence
of crosstalk},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {25:1--25:21},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344421},
doi = {10.1145/1344418.1344421},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MuchherlaCMW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MukherjeeLMM08,
author = {Rajarshi Mukherjee and
Song Liu and
Seda Ogrenci Memik and
Somsubhra Mondal},
title = {A high-level clustering algorithm targeting dual V\({}_{\mbox{dd}}\)
FPGAs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {57:1--57:20},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391965},
doi = {10.1145/1391962.1391965},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MukherjeeLMM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/OgrasM08,
author = {{\"{U}}mit Y. Ogras and
Radu Marculescu},
title = {Analysis and optimization of prediction-based flow control in networks-on-chip},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {11:1--11:28},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297677},
doi = {10.1145/1297666.1297677},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/OgrasM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/OzdalWH08,
author = {Muhammet Mustafa Ozdal and
Martin D. F. Wong and
Philip S. Honsinger},
title = {Optimal routing algorithms for rectilinear pin clusters in high-density
multichip modules},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {68:1--68:20},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391976},
doi = {10.1145/1391962.1391976},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/OzdalWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/OzturkK08,
author = {Ozcan Ozturk and
Mahmut T. Kandemir},
title = {ILP-Based energy minimization techniques for banked memories},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {50:1--50:40},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367059},
doi = {10.1145/1367045.1367059},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/OzturkK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/OzturkKC08,
author = {Ozcan Ozturk and
Mahmut T. Kandemir and
Guangyu Chen},
title = {Access pattern-based code compression for memory-constrained systems},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {60:1--60:30},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391968},
doi = {10.1145/1391962.1391968},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/OzturkKC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/PandaRCK08,
author = {Subrat Kumar Panda and
Arnab Roy and
P. P. Chakrabarti and
Rajeev Kumar},
title = {Simulation-based verification using Temporally Attributed Boolean
Logic},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {63:1--63:52},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391971},
doi = {10.1145/1391962.1391971},
timestamp = {Mon, 07 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/PandaRCK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/PecenkaSK08,
author = {Tomas Pecenka and
Luk{\'{a}}s Sekanina and
Zdenek Kot{\'{a}}sek},
title = {Evolution of synthetic {RTL} benchmark circuits with predefined testability},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {54:1--54:21},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367063},
doi = {10.1145/1367045.1367063},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/PecenkaSK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Pedram08,
author = {Massoud Pedram},
title = {Editorial},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {55:1--55:3},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391963},
doi = {10.1145/1391962.1391963},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/Pedram08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/RaabeHA08,
author = {Andreas Raabe and
Philipp A. Hartmann and
Joachim K. Anlauf},
title = {ReChannel: Describing and simulating reconfigurable hardware in systemC},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {15:1--15:18},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297681},
doi = {10.1145/1297666.1297681},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/RaabeHA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/RahamanMPJ08,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan and
Abusaleh M. Jabir},
title = {C-testable bit parallel multipliers over \emph{GF}(2\({}^{\mbox{\emph{m}}}\))},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {5:1--5:18},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297671},
doi = {10.1145/1297666.1297671},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/RahamanMPJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ResanoCGMC08,
author = {Javier Resano and
Juan Antonio Clemente and
Carlos Gonz{\'{a}}lez and
Daniel Mozos and
Francky Catthoor},
title = {Efficiently scheduling runtime reconfigurations},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {58:1--58:12},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391966},
doi = {10.1145/1391962.1391966},
timestamp = {Wed, 14 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/ResanoCGMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SalujaGK08,
author = {Nikhil Saluja and
Kanupriya Gulati and
Sunil P. Khatri},
title = {SAT-based {ATPG} using multilevel compatible don't-cares},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {24:1--24:18},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344420},
doi = {10.1145/1344418.1344420},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/SalujaGK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SanzPGPMC08,
author = {Concepci{\'{o}}n Sanz and
Manuel Prieto and
Jos{\'{e}} Ignacio G{\'{o}}mez and
Antonis Papanikolaou and
Miguel Miranda and
Francky Catthoor},
title = {Combining system scenarios and configurable memories to tolerate unpredictability},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {49:1--49:7},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367058},
doi = {10.1145/1367045.1367058},
timestamp = {Wed, 04 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/SanzPGPMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SehgalBC08,
author = {Anuja Sehgal and
Sudarshan Bahukudumbi and
Krishnendu Chakrabarty},
title = {Power-aware SoC test planning for effective utilization of port-scalable
testers},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {53:1--53:19},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367062},
doi = {10.1145/1367045.1367062},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/SehgalBC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ShamYZ08,
author = {Chiu{-}Wing Sham and
Evangeline F. Y. Young and
Hai Zhou},
title = {Optimizing wirelength and routability by searching alternative packings
in floorplanning},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {21:1--21:13},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297687},
doi = {10.1145/1297666.1297687},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/ShamYZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SuCCH08,
author = {Yu{-}Shih Su and
Po{-}Hsien Chang and
Shih{-}Chieh Chang and
TingTing Hwang},
title = {Synthesis of a novel timing-error detection architecture},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {14:1--14:14},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297680},
doi = {10.1145/1297666.1297680},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/SuCCH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/TaktakDE08,
author = {Sami Taktak and
Jean Lou Desbarbieux and
Emmanuelle Encrenaz},
title = {A tool for automatic detection of deadlock in wormhole networks on
chip},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {6:1--6:22},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297672},
doi = {10.1145/1297666.1297672},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/TaktakDE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/TsengP08,
author = {I{-}Lun Tseng and
Adam Postula},
title = {Partitioning parameterized 45-degree polygons with constraint programming},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {52:1--52:29},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367061},
doi = {10.1145/1367045.1367061},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/TsengP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/TzengYH08,
author = {Chao{-}Wen Tzeng and
Jheng{-}Syun Yang and
Shi{-}Yu Huang},
title = {A versatile paradigm for scan chain diagnosis of complex faults using
signal processing techniques},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {9:1--9:27},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297675},
doi = {10.1145/1297666.1297675},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/TzengYH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/WangPHL08,
author = {Sying{-}Jyan Wang and
Kuo{-}Lin Peng and
Kuang{-}Cyun Hsiao and
Katherine Shu{-}Min Li},
title = {Layout-aware scan chain reorder for launch-off-shift transition test
coverage},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {4},
pages = {64:1--64:16},
year = {2008},
url = {https://doi.org/10.1145/1391962.1391972},
doi = {10.1145/1391962.1391972},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/WangPHL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/WuLT08,
author = {Meng{-}Chiou Wu and
Rung{-}Bin Lin and
Shih{-}Cheng Tsai},
title = {Chip placement in a reticle for multiple-project wafer fabrication},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {22:1--22:21},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297688},
doi = {10.1145/1297666.1297688},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/WuLT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/WuWG08,
author = {Huaizhi Wu and
Martin D. F. Wong and
Wilsin Gosti},
title = {Postplacement voltage assignment under performance constraints},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {3},
pages = {46:1--46:20},
year = {2008},
url = {https://doi.org/10.1145/1367045.1367055},
doi = {10.1145/1367045.1367055},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/WuWG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Yan08,
author = {Jin{-}Tai Yan},
title = {Timing-driven octilinear Steiner tree construction based on Steiner-point
reassignment and path reconstruction},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {26:1--26:18},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344422},
doi = {10.1145/1344418.1344422},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/Yan08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ZamoraHOM08,
author = {Nicholas H. Zamora and
Xiaoping Hu and
{\"{U}}mit Y. Ogras and
Radu Marculescu},
title = {Enabling multimedia using resource-constrained video processing techniques:
{A} node-centric perspective},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {18:1--18:27},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297684},
doi = {10.1145/1297666.1297684},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ZamoraHOM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Zhou08,
author = {Hai Zhou},
title = {A new efficient retiming algorithm derived by formal manipulation},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {7:1--7:19},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297673},
doi = {10.1145/1297666.1297673},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/Zhou08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ZhouP08,
author = {Xiangrong Zhou and
Peter Petrov},
title = {Heterogeneously tagged caches for low-power embedded systems with
virtual memory support},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {32:1--32:24},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344428},
doi = {10.1145/1344418.1344428},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ZhouP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ZhouYDP08,
author = {Xiangrong Zhou and
Chenjie Yu and
Alokika Dash and
Peter Petrov},
title = {Application-aware snoop filtering for low-power cache coherence in
embedded multiprocessors},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {16:1--16:25},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297682},
doi = {10.1145/1297666.1297682},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ZhouYDP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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