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@article{DBLP:journals/cal/AdilehEJE17,
author = {Almutaz Adileh and
Stijn Eyerman and
Aamer Jaleel and
Lieven Eeckhout},
title = {Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous
Multicores},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {56--59},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2616339},
doi = {10.1109/LCA.2016.2616339},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AdilehEJE17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AhmadvandG17,
author = {Hossein Ahmadvand and
Maziar Goudarzi},
title = {Using Data Variety for Efficient Progressive Big Data Processing in
Warehouse-Scale Computers},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {166--169},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2636293},
doi = {10.1109/LCA.2016.2636293},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/AhmadvandG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BadawyY17,
author = {Abdel{-}Hameed A. Badawy and
Donald Yeung},
title = {Guiding Locality Optimizations for Graph Computations via Reuse Distance
Analysis},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {119--122},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2695178},
doi = {10.1109/LCA.2017.2695178},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BadawyY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BakhshalipourLS17,
author = {Mohammad Bakhshalipour and
Pejman Lotfi{-}Kamran and
Hamid Sarbazi{-}Azad},
title = {An Efficient Temporal Data Prefetcher for {L1} Caches},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {99--102},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2654347},
doi = {10.1109/LCA.2017.2654347},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BakhshalipourLS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BeckmannS17,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Cache Calculus: Modeling Caches through Differential Equations},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {1--5},
year = {2017},
url = {https://doi.org/10.1109/LCA.2015.2512873},
doi = {10.1109/LCA.2015.2512873},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BeckmannS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BoroumandGPHLHM17,
author = {Amirali Boroumand and
Saugata Ghose and
Minesh Patel and
Hasan Hassan and
Brandon Lucia and
Kevin Hsieh and
Krishna T. Malladi and
Hongzhong Zheng and
Onur Mutlu},
title = {LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {46--50},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2577557},
doi = {10.1109/LCA.2016.2577557},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BoroumandGPHLHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CarlsonTJKSK17,
author = {Trevor E. Carlson and
Kim{-}Anh Tran and
Alexandra Jimborean and
Konstantinos Koukos and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {Transcending Hardware Limits with Software Out-of-Order Processing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {162--165},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2672559},
doi = {10.1109/LCA.2017.2672559},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/CarlsonTJKSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChenCWY17,
author = {Li{-}Jhan Chen and
Hsiang{-}Yun Cheng and
Po{-}Han Wang and
Chia{-}Lin Yang},
title = {Improving {GPGPU} Performance via Cache Locality Aware Thread Block
Scheduling},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {127--131},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2693371},
doi = {10.1109/LCA.2017.2693371},
timestamp = {Tue, 04 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/ChenCWY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FengLS017,
author = {Liang Feng and
Hao Liang and
Sharad Sinha and
Wei Zhang},
title = {HeteroSim: {A} Heterogeneous {CPU-FPGA} Simulator},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {38--41},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2615617},
doi = {10.1109/LCA.2016.2615617},
timestamp = {Tue, 05 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/FengLS017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GarlandG17,
author = {James Garland and
David Gregg},
title = {Low Complexity Multiply Accumulate Unit for Weight-Sharing Convolutional
Neural Networks},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {132--135},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2656880},
doi = {10.1109/LCA.2017.2656880},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/GarlandG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GottschoSGSWG17,
author = {Mark Gottscho and
Mohammed Shoaib and
Sriram Govindan and
Bikash Sharma and
Di Wang and
Puneet Gupta},
title = {Measuring the Impact of Memory Errors on Application Performance},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {51--55},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2599513},
doi = {10.1109/LCA.2016.2599513},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/GottschoSGSWG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonC17,
author = {Dong{-}Ik Jeon and
Ki{-}Seok Chung},
title = {CasHMC: {A} Cycle-Accurate Simulator for Hybrid Memory Cube},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {10--13},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2600601},
doi = {10.1109/LCA.2016.2600601},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/JeonC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JouybariA17,
author = {Hoda Naghibi Jouybari and
Nael B. Abu{-}Ghazaleh},
title = {Covert Channels on GPGPUs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {22--25},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2590549},
doi = {10.1109/LCA.2016.2590549},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/JouybariA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JuddAM17,
author = {Patrick Judd and
Jorge Albericio and
Andreas Moshovos},
title = {Stripes: Bit-Serial Deep Neural Network Computing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {80--83},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2597140},
doi = {10.1109/LCA.2016.2597140},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/JuddAM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Jung17,
author = {Myoungsoo Jung},
title = {NearZero: An Integration of Phase Change Memory with Multi-Core Coprocessor},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {136--140},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2694828},
doi = {10.1109/LCA.2017.2694828},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/Jung17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhanWLAM17,
author = {Samira Manabi Khan and
Chris Wilkerson and
Donghyuk Lee and
Alaa R. Alameldeen and
Onur Mutlu},
title = {A Case for Memory Content-Based Detection and Mitigation of Data-Dependent
Failures in {DRAM}},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {88--93},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2624298},
doi = {10.1109/LCA.2016.2624298},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KhanWLAM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeGLK17,
author = {Junghee Lee and
Kalidas Ganesh and
Hyuk{-}Jun Lee and
Youngjae Kim},
title = {FeSSD: {A} Fast Encrypted {SSD} Employing On-Chip Access-Control Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {115--118},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2667639},
doi = {10.1109/LCA.2017.2667639},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/LeeGLK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ManivannanPPS17,
author = {Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Vassilis Papaefstathiou and
Per Stenstr{\"{o}}m},
title = {Runtime-Assisted Global Cache Management for Task-Based Parallel Programs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {145--148},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2606593},
doi = {10.1109/LCA.2016.2606593},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ManivannanPPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarquezKM17,
author = {David A. Gonz{\'{a}}lez M{\'{a}}rquez and
Adri{\'{a}}n Cristal Kestelman and
Esteban E. Mocskos},
title = {Mth: Codesigned Hardware/Software Support for Fine Grain Threads},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {64--67},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2606383},
doi = {10.1109/LCA.2016.2606383},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MarquezKM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MartinezMR17,
author = {Jorge A. Mart{\'{\i}}nez and
Juan Antonio Maestro and
Pedro Reviriego},
title = {A Scheme to Improve the Intrinsic Error Detection of the Instruction
Set Architecture},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {103--106},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2623628},
doi = {10.1109/LCA.2016.2623628},
timestamp = {Thu, 17 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MartinezMR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MirhosseiniAT17,
author = {Amirhossein Mirhosseini and
Aditya Agrawal and
Josep Torrellas},
title = {Survive: Pointer-Based In-DRAM Incremental Checkpointing for Low-Cost
Data Persistence and Rollback-Recovery},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {153--157},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2646340},
doi = {10.1109/LCA.2016.2646340},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MirhosseiniAT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MittalVJ17,
author = {Sparsh Mittal and
Jeffrey S. Vetter and
Lei Jiang},
title = {Addressing Read-Disturbance Issue in {STT-RAM} by Data Compression
and Selective Duplication},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {94--98},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2645207},
doi = {10.1109/LCA.2016.2645207},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MittalVJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoradSEKW17,
author = {Tomer Y. Morad and
Gil Shomron and
Mattan Erez and
Avinoam Kolodny and
Uri C. Weiser},
title = {Optimizing Read-Once Data Flow in Big-Data Applications},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {68--71},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2520927},
doi = {10.1109/LCA.2016.2520927},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MoradSEKW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PeraisS17,
author = {Arthur Perais and
Andr{\'{e}} Seznec},
title = {Storage-Free Memory Dependency Prediction},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {149--152},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2628379},
doi = {10.1109/LCA.2016.2628379},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/PeraisS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PintoPGET17,
author = {Sandro Pinto and
Jorge Pereira and
Tiago Gomes and
Mongkol Ekpanyapong and
Adriano Tavares},
title = {Towards a TrustZone-Assisted Hypervisor for Real-Time Embedded Systems},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {158--161},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2617308},
doi = {10.1109/LCA.2016.2617308},
timestamp = {Tue, 13 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/PintoPGET17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RaviL17,
author = {Gokul Subramanian Ravi and
Mikko H. Lipasti},
title = {Timing Speculation in Multi-Cycle Data Paths},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {84--87},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2580501},
doi = {10.1109/LCA.2016.2580501},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/RaviL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SasakiBVB17,
author = {Hiroshi Sasaki and
Alper Buyuktosunoglu and
Augusto Vega and
Pradip Bose},
title = {Mitigating Power Contention: {A} Scheduling Based Approach},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {60--63},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2572080},
doi = {10.1109/LCA.2016.2572080},
timestamp = {Fri, 17 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/SasakiBVB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SasakiSTS17,
author = {Hiroshi Sasaki and
Fang{-}Hsiang Su and
Teruo Tanimoto and
Simha Sethumadhavan},
title = {Heavy Tails in Program Structure},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {34--37},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2574350},
doi = {10.1109/LCA.2016.2574350},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/SasakiSTS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SeyedzadehJM17,
author = {Seyed Mohammad Seyedzadeh and
Alex K. Jones and
Rami G. Melhem},
title = {Counter-Based Tree Structure for Row Hammering Mitigation in {DRAM}},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {18--21},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2614497},
doi = {10.1109/LCA.2016.2614497},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SeyedzadehJM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SonCRLA17,
author = {Young Hoon Son and
Hyunyoon Cho and
Yuhwan Ro and
Jae W. Lee and
Jung Ho Ahn},
title = {{SALAD:} Achieving Symmetric Access Latency with Asymmetric {DRAM}
Architecture},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {76--79},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2525760},
doi = {10.1109/LCA.2016.2525760},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SonCRLA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SongJALK17,
author = {WonJun Song and
Hyungjoon Jung and
Jung Ho Ahn and
Jae W. Lee and
John Kim},
title = {Evaluation of Performance Unfairness in {NUMA} System Architecture},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {26--29},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2602876},
doi = {10.1109/LCA.2016.2602876},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SongJALK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TanimotoOIS17,
author = {Teruo Tanimoto and
Takatsugu Ono and
Koji Inoue and
Hiroshi Sasaki},
title = {Enhanced Dependence Graph Model for Critical Path Analysis on Modern
Out-of-Order Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {111--114},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2684813},
doi = {10.1109/LCA.2017.2684813},
timestamp = {Fri, 17 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/TanimotoOIS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VernerMS17,
author = {Uri Verner and
Avi Mendelson and
Assaf Schuster},
title = {Extending Amdahl's Law for Multicores with Turbo Boost},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {30--33},
year = {2017},
url = {https://doi.org/10.1109/LCA.2015.2512982},
doi = {10.1109/LCA.2015.2512982},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/VernerMS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangMZY17,
author = {Rujia Wang and
Sparsh Mittal and
Youtao Zhang and
Jun Yang},
title = {Decongest: Accelerating Super-Dense {PCM} Under Write Disturbance
by Hot Page Remapping},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {107--110},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2675883},
doi = {10.1109/LCA.2017.2675883},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/WangMZY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuLL17,
author = {Hao Wu and
Fangfei Liu and
Ruby B. Lee},
title = {Cloud Server Benchmark Suite for Evaluating New Hardware Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {14--17},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2597818},
doi = {10.1109/LCA.2016.2597818},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/WuLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YasoubiHM17,
author = {Ali Yasoubi and
Reza Hojabr and
Mehdi Modarressi},
title = {Power-Efficient Accelerator Design for Neural Networks Using Computation
Reuse},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {72--75},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2521654},
doi = {10.1109/LCA.2016.2521654},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/YasoubiHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsWG17,
author = {Leonid Yavits and
Uri C. Weiser and
Ran Ginosar},
title = {Resistive Address Decoder},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {141--144},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2670539},
doi = {10.1109/LCA.2017.2670539},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/YavitsWG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaL17,
author = {Yue Zha and
Jing Li},
title = {{IMEC:} {A} Fully Morphable In-Memory Computing Fabric Enabled by
Resistive Crossbar},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {123--126},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2672558},
doi = {10.1109/LCA.2017.2672558},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhaL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhanAKBR17,
author = {Xin Zhan and
Reza Azimi and
Svilen Kanev and
David M. Brooks and
Sherief Reda},
title = {{CARB:} {A} C-State Power Management Arbiter for Latency-Critical
Workloads},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {6--9},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2537802},
doi = {10.1109/LCA.2016.2537802},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhanAKBR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangMC17,
author = {Dan Zhang and
Xiaoyu Ma and
Derek Chiou},
title = {Worklist-Directed Prefetching},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {170--173},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2627571},
doi = {10.1109/LCA.2016.2627571},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhangMC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaoLAE17,
author = {Xia Zhao and
Yuxi Liu and
Almutaz Adileh and
Lieven Eeckhout},
title = {{LA-LLC:} Inter-Core Locality-Aware Last-Level Cache to Exploit Many-to-Many
Traffic in GPGPUs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {42--45},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2611663},
doi = {10.1109/LCA.2016.2611663},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhaoLAE17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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