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@inproceedings{DBLP:conf/vlsid/AgarwalK17,
author = {Sukarn Agarwal and
Hemangee K. Kapoor},
title = {Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {29--34},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.4},
doi = {10.1109/VLSID.2017.4},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AgarwalK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AinMDM17,
author = {Antara Ain and
Akshay Mambakam and
Pallab Dasgupta and
Siddhartha Mukhopadhyay},
title = {Feature Based Identification of Transmission Line Faults by Synchronous
Monitoring of PMUs},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {245--250},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.45},
doi = {10.1109/VLSID.2017.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AinMDM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AnandakumarHS17,
author = {N. Nalla Anandakumar and
Mohammad S. Hashmi and
Somitra Kumar Sanadhya},
title = {Compact Implementations of FPGA-based PUFs with Enhanced Performance},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {161--166},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.7},
doi = {10.1109/VLSID.2017.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AnandakumarHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AnuroopJN17,
author = {K. B. Anuroop and
Anu James and
M. Neema},
title = {Hardware Software Codesign for a Hybrid Substitution Box},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {423--428},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.46},
doi = {10.1109/VLSID.2017.46},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/AnuroopJN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BasiriM17,
author = {M. Mohamed Asan Basiri and
Sk. Noor Mahammad},
title = {High Performance Integer {DCT} Architectures for {HEVC}},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {121--126},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.68},
doi = {10.1109/VLSID.2017.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BasiriM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharjeeC17,
author = {Debjyoti Bhattacharjee and
Anupam Chattopadhyay},
title = {Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar
Arrays},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {277--282},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.10},
doi = {10.1109/VLSID.2017.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharjeeC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhuvaneshwariK17,
author = {Y. V. Bhuvaneshwari and
Abhinav Kranti},
title = {Extraction and Analysis of Mobility in Double Gate Junctionless Transistor},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {283--288},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.22},
doi = {10.1109/VLSID.2017.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhuvaneshwariK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BiswasW17,
author = {Prasenjit Biswas and
D. M. H. Walker},
title = {Improved Path Recovery in Pseudo Functional Path Delay Test Using
Extended Value Algebra},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {141--146},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.63},
doi = {10.1109/VLSID.2017.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BiswasW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyC17,
author = {Sarit Chakraborty and
Susanta Chakraborty},
title = {A Novel Approach towards Biochemical Synthesis on Cyberphysical Digital
Microfluidic Biochip},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {355--360},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.44},
doi = {10.1109/VLSID.2017.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyDS17,
author = {Bidesh Chakraborty and
Mamata Dalui and
Biplab K. Sikdar},
title = {Design of Coherence Verification Unit for Heterogeneous CMPs Integrating
Update and Invalidate Protocols},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {115--120},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.30},
doi = {10.1109/VLSID.2017.30},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyK17,
author = {Shounak Chakraborty and
Hemangee K. Kapoor},
title = {Towards Controlling Chip Temperature by Dynamic Cache Reconfiguration
in Multiprocessors},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.3},
doi = {10.1109/VLSID.2017.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CostaD17,
author = {Antonio Anastasio Bruto da Costa and
Pallab Dasgupta},
title = {Generating {AMS} Behavioral Models with Formal Guarantees on Feature
Accuracy},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.2},
doi = {10.1109/VLSID.2017.2},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CostaD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasguptaGDLSTHC17,
author = {Avirup Dasgupta and
Chetan Gupta and
Anupam Dutta and
Yen{-}Kai Lin and
Srikanth Srihari and
Ethirajan Tamilmani and
Chenming Hu and
Yogesh Singh Chauhan},
title = {Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {381--384},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.19},
doi = {10.1109/VLSID.2017.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasguptaGDLSTHC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeyDNT17,
author = {Sukanta Dey and
Satyabrata Dash and
Sukumar Nandi and
Gaurav Trivedi},
title = {Markov Chain Model Using L{\'{e}}vy Flight for {VLSI} Power Grid
Analysis},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {107--112},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.8},
doi = {10.1109/VLSID.2017.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeyDNT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GaggaturB17,
author = {Javed S. Gaggatur and
Gaurab Banerjee},
title = {High Gain Capacitance Sensor Interface for the Monitoring of Cell
Volume Growth},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {201--206},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.37},
doi = {10.1109/VLSID.2017.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GaggaturB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GaggaturRB17,
author = {Javed S. Gaggatur and
Immanuel Raja and
Gaurab Banerjee},
title = {On-Chip Non-intrusive Temperature Detection and Compensation of a
Fully Integrated {CMOS} {RF} Power Amplifier},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {21--26},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.35},
doi = {10.1109/VLSID.2017.35},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GaggaturRB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GopinathAVS17,
author = {Anjali Gopinath and
Ravi Kumar Adusumalli and
Veeresh Babu Vulligaddala and
M. B. Srinivas},
title = {A Switched-Capacitor Amplifier with True Rail-to-Rail Input Range
without Using a Rail-to-Rail Op-Amp},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {329--334},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.31},
doi = {10.1109/VLSID.2017.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GopinathAVS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuhaSC17,
author = {Krishnendu Guha and
Debasri Saha and
Amlan Chakrabarti},
title = {Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans
at Runtime},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {417--422},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.48},
doi = {10.1109/VLSID.2017.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuhaSC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaK17,
author = {Manish Gupta and
Abhinav Kranti},
title = {Suppressing Single Transistor Latch Effect in Energy Efficient Steep
Switching Junctionless MOSFETs},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {441--446},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.20},
doi = {10.1109/VLSID.2017.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HageGFS17,
author = {Nihar Hage and
Rohini Gulve and
Masahiro Fujita and
Virendra Singh},
title = {On Testing of Superscalar Processors in Functional Mode for Delay
Faults},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {397--402},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.58},
doi = {10.1109/VLSID.2017.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HageGFS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainD17,
author = {Poorvi Jain and
Bishnu Prasad Das},
title = {Within-Die Threshold Voltage Variability Estimation Using Reconfigurable
Ring Oscillator},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {315--320},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.23},
doi = {10.1109/VLSID.2017.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JayasingheIP17,
author = {Darshana Jayasinghe and
Aleksandar Ignjatovic and
Sri Parameswaran},
title = {{NORA:} Algorithmic Balancing without Pre-charge to Thwart Power Analysis
Attacks},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {167--172},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.25},
doi = {10.1109/VLSID.2017.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JayasingheIP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JohnsonTR17,
author = {Bibin Johnson and
Nimin Thomas and
J. Sheeba Rani},
title = {An {FPGA} Based High throughput Discrete Kalman Filter Architecture
for Real-Time Image Denoising},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.26},
doi = {10.1109/VLSID.2017.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JohnsonTR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JoshiDMSDST17,
author = {Deepak Joshi and
Satyabrata Dash and
Ayush Malhotra and
Pulimi Venkata Sai and
Rahul Das and
Dikshit Sharma and
Gaurav Trivedi},
title = {Optimization of 2.4 GHz {CMOS} Low Noise Amplifier Using Hybrid Particle
Swarm Optimization with L{\'{e}}vy Flight},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {181--186},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.9},
doi = {10.1109/VLSID.2017.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JoshiDMSDST17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KadayintiBS17,
author = {Naveen Kadayinti and
Maryam Shojaei Baghini and
Dinesh Kumar Sharma},
title = {A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.12},
doi = {10.1109/VLSID.2017.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KadayintiBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KarmakarPCK017,
author = {Rajit Karmakar and
N. Prasad and
Santanu Chattopadhyay and
Rohit Kapur and
Indranil Sengupta},
title = {A New Logic Encryption Strategy Ensuring Key Interdependency},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {429--434},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.29},
doi = {10.1109/VLSID.2017.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KarmakarPCK017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KediaYDFAB17,
author = {Rajesh Kedia and
K. K. Yoosuf and
Pappireddy Dedeepya and
Munib Fazal and
Chetan Arora and
M. Balakrishnan},
title = {{MAVI:} An Embedded Device to Assist Mobility of Visually Impaired},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.38},
doi = {10.1109/VLSID.2017.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KediaYDFAB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanAB17,
author = {Mohd. Tasleem Khan and
Shaik Rafi Ahamed and
Forrest Brewer},
title = {Low Complexity and Critical Path Based {VLSI} Architecture for {LMS}
Adaptive Filter Using Distributed Arithmetic},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {127--132},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.16},
doi = {10.1109/VLSID.2017.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanAB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KoleD17,
author = {Abhoy Kole and
Kamalika Datta},
title = {Improved {NCV} Gate Realization of Arbitrary Size Toffoli Gates},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {289--294},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.11},
doi = {10.1109/VLSID.2017.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KoleD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarBK17,
author = {Ashwin Kumar Siva Kumar and
Debasish Behera and
Nagendra Krishnapura},
title = {A Low Power Multi-channel Input Delta-Sigma {ADC} without Reset},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.85},
doi = {10.1109/VLSID.2017.85},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarBK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarJSF17,
author = {Binod Kumar and
Ankit Jindal and
Virendra Singh and
Masahiro Fujita},
title = {A Methodology for Trace Signal Selection to Improve Error Detection
in Post-Silicon Validation},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {147--152},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.66},
doi = {10.1109/VLSID.2017.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarJSF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarPKS17,
author = {Vinay Kumar and
Nikhil Puri and
Sudhir Kumar and
Sumit Srivastav},
title = {A Sub-0.5V Reliability Aware-Negative Bitline Write-Assisted 8T {DP-SRAM}
and {WL} Strapping Novel Architecture to Counter Dual Patterning Issues
in 10nm FinFET},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.17},
doi = {10.1109/VLSID.2017.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarPKS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarSMUS17,
author = {Pardeep Kumar and
S. Srivatsa and
P. Mantripragada and
S. Upreti and
K. V. Shravya},
title = {Hybrid {OPC} Technique for Fast and Accurate Lithography Simulation},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {447--450},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.49},
doi = {10.1109/VLSID.2017.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarSMUS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LiM17,
author = {Jiayin Li and
Kartik Mohanram},
title = {Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {47--52},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.13},
doi = {10.1109/VLSID.2017.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LiM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LimachiaVTK17,
author = {Mitesh Limachia and
Pathik Viramgama and
Rajesh Amratlal Thakker and
Nikhil Kothari},
title = {Characterization of a Novel 10T Low-Voltage {SRAM} Cell with High
Read and Write Margin for 20nm FinFET Technology},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {309--314},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.5},
doi = {10.1109/VLSID.2017.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LimachiaVTK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MandalCHDNMB17,
author = {Sudipa Mandal and
Antonio Anastasio Bruto da Costa and
Aritra Hazra and
Pallab Dasgupta and
Bhushan Naware and
Chunduri Rama Mohan and
Sanjib Basu},
title = {Formal Verification of Power Management Logic with Mixed-Signal Domains},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {239--244},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.43},
doi = {10.1109/VLSID.2017.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MandalCHDNMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ManikandanV17,
author = {R. R. Manikandan and
Venkata Narayana Rao Vanukuru},
title = {A High Performance Switchable Multiband Inductor Structure for LC-VCOs},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {253--258},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.53},
doi = {10.1109/VLSID.2017.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ManikandanV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MeershaSS17,
author = {Adil Meersha and
B. Sathyajit and
Mayank Shrivastava},
title = {A Systematic Study on the Hysteresis Behaviour and Reliability of
MoS2 {FET}},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {437--440},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.67},
doi = {10.1109/VLSID.2017.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MeershaSS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MishraT17,
author = {Vipul Kumar Mishra and
Himanshu Thapliyal},
title = {Heuristic Based Majority/Minority Logic Synthesis for Emerging Technologies},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {295--300},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.27},
doi = {10.1109/VLSID.2017.27},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/MishraT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MittalWJV17,
author = {Sparsh Mittal and
Haonan Wang and
Adwait Jog and
Jeffrey S. Vetter},
title = {Design and Analysis of Soft-Error Resilience Mechanisms for {GPU}
Register File},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {409--414},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.14},
doi = {10.1109/VLSID.2017.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MittalWJV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohapatraGSM17,
author = {Satyajit Mohapatra and
Hari Shanker Gupta and
Jatindeep Singh and
Nihar Ranjan Mohapatra},
title = {A 64b/66b Line Encoding for High Speed Serializers},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {303--308},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.47},
doi = {10.1109/VLSID.2017.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohapatraGSM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MondalKGD17,
author = {Hemanta Kumar Mondal and
Shashwat Kaushik and
Sri Harsha Gade and
Sujay Deb},
title = {Energy-Efficient Transceiver for Wireless NoC},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {87--92},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.42},
doi = {10.1109/VLSID.2017.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MondalKGD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MukherjeeFG17,
author = {Manideepa Mukherjee and
Alexander Fell and
Apala Guha},
title = {DFGenTool: {A} Dataflow Graph Generation Tool for Coarse Grain Reconfigurable
Architectures},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {67--72},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.62},
doi = {10.1109/VLSID.2017.62},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MukherjeeFG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MuldreyDC17,
author = {Barry John Muldrey and
Sabyasachi Deyati and
Abhijit Chatterjee},
title = {Post-Silicon Validation: Automatic Characterization of {RF} Device
Nonidealities via Iterative Learning Experiments on Hardware},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {403--408},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.86},
doi = {10.1109/VLSID.2017.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MuldreyDC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NaikwadRSD17,
author = {Sumit Naikwad and
Murali Krishna Rajendran and
Priya Sunil and
Ashudeb Dutta},
title = {A Single Inductor, Single Input Dual Output {(SIDO)} Piezoelectric
Energy Harvesting System},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.61},
doi = {10.1109/VLSID.2017.61},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/NaikwadRSD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NyshadhamK17,
author = {Sanjeev Nyshadham and
A. G. Krishna Kanth},
title = {A 6V to 42V High Voltage {CMOS} Bandgap Reference Robust to {RF} Interference
for Automotive Applications},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {187--192},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.28},
doi = {10.1109/VLSID.2017.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NyshadhamK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PaulRKGS17,
author = {Milova Paul and
Christian Russ and
Boeila Sampath Kumar and
Harald Gossner and
Mayank Shrivastava},
title = {Physics of Current Filamentation in ggNMOS Revisited: Was Our Understanding
Scientifically Complete?},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {391--394},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.32},
doi = {10.1109/VLSID.2017.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PaulRKGS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaiolaER017,
author = {Pascal Raiola and
Dominik Erb and
Sudhakar M. Reddy and
Bernd Becker},
title = {Accurate Diagnosis of Interconnect Open Defects Based on the Robust
Enhanced Aggressor Victim Model},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {135--140},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.34},
doi = {10.1109/VLSID.2017.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaiolaER017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Rao17,
author = {Madhav Rao},
title = {Electrical Modeling and Characterization of Copper/Carbon Nanotubes
in Tapered through Silicon Vias},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {366--371},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.87},
doi = {10.1109/VLSID.2017.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Rao17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ReniwalSVV17,
author = {Bhupendra Singh Reniwal and
P. Singh and
Vikas Vijayvargiya and
Santosh Kumar Vishvakarma},
title = {A New Sense Amplifier Design with Improved Input Referred Offset Characteristics
for Energy-Efficient {SRAM}},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {335--340},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.54},
doi = {10.1109/VLSID.2017.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ReniwalSVV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahaS17,
author = {Debasri Saha and
Susmita Sur{-}Kolay},
title = {Multi-objective Optimization of Placement and Assignment of TSVs in
3D ICs},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {372--377},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.40},
doi = {10.1109/VLSID.2017.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SahaS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahooSM17,
author = {Debiprasanna Sahoo and
Manoranjan Satpathy and
Madhu Mutyam},
title = {An Experimental Study on Dynamic Bank Partitioning of {DRAM} in Chip
Multiprocessors},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {35--40},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.21},
doi = {10.1109/VLSID.2017.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SahooSM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SangeethaD17,
author = {Sangeetha Damotharasamy and
P. Deepa},
title = {Efficient Scale Invariant Human Detection Using Histogram of Oriented
Gradients for IoT Services},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.60},
doi = {10.1109/VLSID.2017.60},
timestamp = {Fri, 29 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/SangeethaD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SarkarCA17,
author = {Sudipta Sarkar and
Yongda Cai and
Anubhav Adak},
title = {Two-Step Residue Transfer Technique for High-Speed Pipeline A/Ds},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.51},
doi = {10.1109/VLSID.2017.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SarkarCA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SavanthWMFA17,
author = {Anand Savanth and
Alex S. Weddell and
James Myers and
David Flynn and
Bashir M. Al{-}Hashimi},
title = {A 50nW Voltage Monitor Scheme for Minimum Energy Sensor Systems},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {81--86},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.36},
doi = {10.1109/VLSID.2017.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SavanthWMFA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShaikhRTG17,
author = {Mohammed Umar Shaikh and
Sivaramakrishna Rudrapati and
Nandish Bharat Thaker and
Shalabh Gupta},
title = {Frequency Enhancement in Miller Divider with Injection-Locking Portrait},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {347--352},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.65},
doi = {10.1109/VLSID.2017.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShaikhRTG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShankarSSSBRBS17,
author = {Bhawani Shankar and
Ankit Soni and
Manikant Singh and
Rohith Soman and
K. N. Bhat and
Srinivasan Raghavan and
Navakanta Bhat and
Mayank Shrivastava},
title = {{ESD} Behavior of AlGaN/GaN {HEMT} on Si: Physical Insights, Design
Aspects, Cumulative Degradation and Failure Analysis},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {361--365},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.57},
doi = {10.1109/VLSID.2017.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShankarSSSBRBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SharmaMDS17,
author = {Saransh Sharma and
Avilash Mukherjee and
Abhishek Dongre and
Mrigank Sharad},
title = {Ultra Low Power Sensor Node for Security Applications, Facilitated
by Algorithm-Architecture Co-design},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {101--106},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.55},
doi = {10.1109/VLSID.2017.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SharmaMDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShirwaikarKS17,
author = {Mahadev Govind Shirwaikar and
Naveen Kadayinti and
Dinesh Kumar Sharma},
title = {Clock Skew Measurement Using an All-Digital Sigma-Delta Time to Digital
Converter},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {321--326},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.41},
doi = {10.1109/VLSID.2017.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShirwaikarKS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SrivastavaSDB17,
author = {Abhishek Srivastava and
Nithin Sankar and
Devarshi Das and
Maryam Shojaei Baghini},
title = {{LNA-LO} Co-design Considerations for Low Intermediate Frequency Receivers
in 401-406 MHz MedRadio Spectrum for Healthcare Applications},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {175--180},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.18},
doi = {10.1109/VLSID.2017.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SrivastavaSDB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TehranipoorKYC17,
author = {Fatemeh Tehranipoor and
Nima Karimian and
Wei Yan and
John A. Chandy},
title = {A Study of Power Supply Variation as a Source of Random Noise},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.24},
doi = {10.1109/VLSID.2017.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TehranipoorKYC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThakkarP17,
author = {Ishan G. Thakkar and
Sudeep Pasricha},
title = {DyPhase: {A} Dynamic Phase Change Memory Architecture with Symmetric
Write Latency},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {41--46},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.6},
doi = {10.1109/VLSID.2017.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThakkarP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TripathiMSD17,
author = {Venkatesh Mani Tripathi and
Sandeep Mishra and
Jyotishman Saikia and
Anup Dandapat},
title = {A Low-Voltage 13T Latch-Type Sense Amplifier with Regenerative Feedback
for Ultra Speed Memory Access},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {341--346},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.15},
doi = {10.1109/VLSID.2017.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TripathiMSD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TripathiSC17,
author = {Anshuman Tripathi and
Arnab Sarkar and
P. P. Chakrabarti},
title = {Migration Aware Low Overhead ERfair Scheduler},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {219--224},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.33},
doi = {10.1109/VLSID.2017.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TripathiSC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/UdupiUSK17,
author = {Shrinidhi Udupi and
Joakim Urdahl and
Dominik Stoffel and
Wolfgang Kunz},
title = {Dynamic Power Optimization Based on Formal Property Checking of Operations},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {227--232},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.56},
doi = {10.1109/VLSID.2017.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/UdupiUSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VarmaPR17,
author = {Kajal Varma and
Geeta Patil and
Biju K. Raveendran},
title = {{DTLB:} Deterministic {TLB} for Tightly Bound Hard Real-Time Systems},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {207--212},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.50},
doi = {10.1109/VLSID.2017.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VarmaPR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VishnoiPK17,
author = {Rajat Vishnoi and
Pratyush Panday and
Mamidala Jagadesh Kumar},
title = {{DC} Drain Current Model for Tunnel FETs Considering Source and Drain
Depletion Regions},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {385--390},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.59},
doi = {10.1109/VLSID.2017.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VishnoiPK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WadhwaC17,
author = {Sanjay Kumar Wadhwa and
Nidhi Chaudhry},
title = {High Accuracy, Multi-output Bandgap Reference Circuit in 16nm FinFet},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {259--262},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.52},
doi = {10.1109/VLSID.2017.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WadhwaC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZanwarS17,
author = {Mahesh Zanwar and
Subhajit Sen},
title = {Programmable Output Multi-phase Switched Capacitor Step-Up {DC-DC}
Converter with SAR-based Regulation},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {193--198},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.39},
doi = {10.1109/VLSID.2017.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZanwarS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2017,
title = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://ieeexplore.ieee.org/xpl/conhome/7880094/proceeding},
isbn = {978-1-5090-5740-5},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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