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@inproceedings{DBLP:conf/mtdt/Al-ArsAG01, author = {Zaid Al{-}Ars and Ad J. van de Goor}, title = {Transient Faults in DRAMs: Concepts, Analysis and Impact on Tests}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {59--64}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945229}, doi = {10.1109/MTDT.2001.945229}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/Al-ArsAG01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/GregoriTKM01, author = {Stefano Gregori and Guido Torelli and Osama Khouri and Rino Micheloni}, title = {An Error Control Code Scheme for Multilevel Flash Memories}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {45--50}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945227}, doi = {10.1109/MTDT.2001.945227}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/GregoriTKM01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/HamdiouiGER01, author = {Said Hamdioui and Ad J. van de Goor and David Eastwick and Mike Rodgers}, title = {Realistic Fault Models and Test Procedures for Multi-Port SRAMs}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {65--72}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945230}, doi = {10.1109/MTDT.2001.945230}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/HamdiouiGER01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/Harling01, author = {G. Harling}, title = {A {DRAM} Compiler for Fully Optimized Memory Instances}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {3--8}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945221}, doi = {10.1109/MTDT.2001.945221}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/Harling01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KarimiLIC01, author = {Farzin Karimi and Fabrizio Lombardi and V. Swamy Irrinki and T. Crosby}, title = {A Parallel Approach for Testing Multi-Port Static Random Access Memories}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {73}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945233}, doi = {10.1109/MTDT.2001.945233}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KarimiLIC01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KesslerDMMK01, author = {Brian R. Kessler and Jeffrey H. Dreibelbis and Tim McMahon and Joshua S. McCloy and Rex Kho}, title = {BIST-Based Bitfail Mapping of an Embedded {DRAM}}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {29}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945225}, doi = {10.1109/MTDT.2001.945225}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KesslerDMMK01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KhouriGSTM01, author = {Osama Khouri and Stefano Gregori and Dario Soltesz and Guido Torelli and Rino Micheloni}, title = {Low Output Resistance Charge Pump for Flash Memory Programming}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {99}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945236}, doi = {10.1109/MTDT.2001.945236}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KhouriGSTM01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KimRL01, author = {Kyung{-}Saeng Kim and KwangMyoung Rho and Kwyro Lee}, title = {Orthogonal Transpose-RAM Cell Array Architecture with Alternate Bit-Line To Bit-Line Contact Scheme}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {9--12}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945222}, doi = {10.1109/MTDT.2001.945222}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KimRL01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KoranneWBWKV01, author = {Sandeep Koranne and Tom Waayers and Robert Beurze and Clemens Wouters and Sunil Kumar and G. S. Visweswara}, title = {A {P1500} Compliant Programable BistShell for Embedded Memories}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {21--28}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945224}, doi = {10.1109/MTDT.2001.945224}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KoranneWBWKV01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/MatarreseF01, author = {Stella Matarrese and Luca Fasoli}, title = {A Method to Caculate Redundancy Coverage for {FLASH} Memory}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {41--44}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945226}, doi = {10.1109/MTDT.2001.945226}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/MatarreseF01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/NapperY01, author = {Simon Napper and Dian Yang}, title = {Equivalence Checking a 256MB {SDRAM}}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {85--90}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945234}, doi = {10.1109/MTDT.2001.945234}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/NapperY01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/ShoukourianVZ01, author = {Samvel K. Shoukourian and Valery A. Vardanian and Yervant Zorian}, title = {An Approach for Evaluation of Redunancy Analysis Algorithms}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {51}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945228}, doi = {10.1109/MTDT.2001.945228}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/ShoukourianVZ01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/SunXT01, author = {Xiaoling Sun and Jian Xu and Pieter M. Trouborst}, title = {Testing Carry Logic Modules of SRAM-based FPGAs}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {91--98}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945235}, doi = {10.1109/MTDT.2001.945235}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/SunXT01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/SungKBEC01, author = {Raymond J. Sung and John C. Koob and Tyler L. Brandon and Duncan G. Elliott and Bruce F. Cockburn}, title = {Design of an Embedded Fully-Depleted {SOI} {SRAM}}, booktitle = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, pages = {13}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/MTDT.2001.945223}, doi = {10.1109/MTDT.2001.945223}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/SungKBEC01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/mtdt/2001, title = {9th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2001), 6-7 August 2001, San Jose, CA, {USA}}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://ieeexplore.ieee.org/xpl/conhome/7514/proceeding}, isbn = {0-7695-1242-9}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/mtdt/2001.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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