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@inproceedings{DBLP:conf/isca/AlvarezBC97,
  author       = {Guillermo A. Alvarez and
                  Walter A. Burkhard and
                  Flaviu Cristian},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Tolerating Multiple Failures in {RAID} Architectures with Optimal
                  Storage and Uniform Declustering},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {62--72},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264132},
  doi          = {10.1145/264107.264132},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/AlvarezBC97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BurgerKG97,
  author       = {Doug Burger and
                  Stefanos Kaxiras and
                  James R. Goodman},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {DataScalar Architectures},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {338--349},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264215},
  doi          = {10.1145/264107.264215},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/BurgerKG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChangHP97,
  author       = {Po{-}Yung Chang and
                  Eric Hao and
                  Yale N. Patt},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Target Prediction for Indirect Jumps},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {274--283},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264209},
  doi          = {10.1145/264107.264209},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/ChangHP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EbciogluA97,
  author       = {Kemal Ebcioglu and
                  Erik R. Altman},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {{DAISY:} Dynamic Compilation for 100{\%} Architectural Compatibility},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {26--37},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264126},
  doi          = {10.1145/264107.264126},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/EbciogluA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EmerG97,
  author       = {Joel S. Emer and
                  Nicholas C. Gloy},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {A Language for Describing Predictors and Its Application to Automatic
                  Synthesis},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {304--314},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264212},
  doi          = {10.1145/264107.264212},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/EmerG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FalsafiW97,
  author       = {Babak Falsafi and
                  David A. Wood},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Reactive {NUMA:} {A} Design for Unifying {S-COMA} and {CC-NUMA}},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {229--240},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264205},
  doi          = {10.1145/264107.264205},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/FalsafiW97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarkasCJV97,
  author       = {Keith I. Farkas and
                  Paul Chow and
                  Norman P. Jouppi and
                  Zvonko G. Vranesic},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Memory-System Design Considerations for Dynamically-Scheduled Processors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {133--143},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264156},
  doi          = {10.1145/264107.264156},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/FarkasCJV97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FrommPCKMPAY97,
  author       = {Richard Fromm and
                  Stylianos Perissakis and
                  Neal Cardwell and
                  Christoforos E. Kozyrakis and
                  Bruce McGaughy and
                  David A. Patterson and
                  Thomas E. Anderson and
                  Katherine A. Yelick},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The Energy Efficiency of {IRAM} Architectures},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {327--337},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264214},
  doi          = {10.1145/264107.264214},
  timestamp    = {Thu, 13 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isca/FrommPCKMPAY97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HakuraG97,
  author       = {Ziyad S. Hakura and
                  Anoop Gupta},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The Design and Analysis of a Cache Architecture for Texture Mapping},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {108--120},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264152},
  doi          = {10.1145/264107.264152},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/HakuraG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JohnsonH97,
  author       = {Teresa L. Johnson and
                  Wen{-}mei W. Hwu},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Run-Time Adaptive Cache Hierarchy Management via Reference Analysis},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {315--326},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264213},
  doi          = {10.1145/264107.264213},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/JohnsonH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JosephG97,
  author       = {Doug Joseph and
                  Dirk Grunwald},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Prefetching Using Markov Predictors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {252--263},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264207},
  doi          = {10.1145/264107.264207},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/JosephG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KagiBG97,
  author       = {Alain K{\"{a}}gi and
                  Doug Burger and
                  James R. Goodman},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Efficient Synchronization: Let Them Eat {QOLB}},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {170--180},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264166},
  doi          = {10.1145/264107.264166},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/KagiBG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KontothanassisHSHCPMDS97,
  author       = {Leonidas I. Kontothanassis and
                  Galen C. Hunt and
                  Robert Stets and
                  Nikos Hardavellas and
                  Michal Cierniak and
                  Srinivasan Parthasarathy and
                  Wagner Meira Jr. and
                  Sandhya Dwarkadas and
                  Michael L. Scott},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {157--169},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264163},
  doi          = {10.1145/264107.264163},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/KontothanassisHSHCPMDS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LaudonL97,
  author       = {James Laudon and
                  Daniel Lenoski},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The {SGI} Origin: {A} ccNUMA Highly Scalable Server},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {241--251},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264206},
  doi          = {10.1145/264107.264206},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/LaudonL97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MartinVCA97,
  author       = {Richard P. Martin and
                  Amin Vahdat and
                  David E. Culler and
                  Thomas E. Anderson},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Effects of Communication Latency, Overhead, and Bandwidth in a Cluster
                  Architecture},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {85--97},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264146},
  doi          = {10.1145/264107.264146},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/MartinVCA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MichaelNLS97,
  author       = {Maged M. Michael and
                  Ashwini K. Nanda and
                  Beng{-}Hong Lim and
                  Michael L. Scott},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Coherence Controller Architectures for SMP-Based {CC-NUMA} Multiprocessors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {219--228},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264203},
  doi          = {10.1145/264107.264203},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/MichaelNLS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MichaudSU97,
  author       = {Pierre Michaud and
                  Andr{\'{e}} Seznec and
                  Richard Uhlig},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Trading Conflict and Capacity Aliasing in Conditional Branch Predictors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {292--303},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264211},
  doi          = {10.1145/264107.264211},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/MichaudSU97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MoshovosBVS97,
  author       = {Andreas Moshovos and
                  Scott E. Breach and
                  T. N. Vijaykumar and
                  Gurindar S. Sohi},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Dynamic Speculation and Synchronization of Data Dependences},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {181--193},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264189},
  doi          = {10.1145/264107.264189},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/MoshovosBVS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NairH97,
  author       = {Ravi Nair and
                  Martin E. Hopkins},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Exploiting Instruction Level Parallelism in Processors by Caching
                  Scheduled Groups},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {13--25},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264125},
  doi          = {10.1145/264107.264125},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/NairH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PalacharlaJS97,
  author       = {Subbarao Palacharla and
                  Norman P. Jouppi and
                  James E. Smith},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Complexity-Effective Superscalar Processors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {206--218},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264201},
  doi          = {10.1145/264107.264201},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/PalacharlaJS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PinkstonW97,
  author       = {Timothy Mark Pinkston and
                  Sugath Warnakulasuriya},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {On Deadlocks in Interconnection Networks},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {38--49},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264127},
  doi          = {10.1145/264107.264127},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/PinkstonW97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RanganathanPAA97,
  author       = {Parthasarathy Ranganathan and
                  Vijay S. Pai and
                  Hazim Abdel{-}Shafi and
                  Sarita V. Adve},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The Interaction of Software Prefetching with {ILP} Processors in Shared-Memory
                  Systems},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {144--156},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264158},
  doi          = {10.1145/264107.264158},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/RanganathanPAA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SanthanamGH97,
  author       = {Vatsa Santhanam and
                  Edward H. Gornish and
                  Wei{-}Chung Hsu},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Data Prefetching on the {HP} {PA-8000}},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {264--273},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264208},
  doi          = {10.1145/264107.264208},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/SanthanamGH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SodaniS97,
  author       = {Avinash Sodani and
                  Gurindar S. Sohi},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Dynamic Instruction Reuse},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {194--205},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264200},
  doi          = {10.1145/264107.264200},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/SodaniS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SprangleCAP97,
  author       = {Eric Sprangle and
                  Robert S. Chappell and
                  Mitch Alsup and
                  Yale N. Patt},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The Agree Predictor: {A} Mechanism for Reducing Negative Branch History
                  Interference},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {284--291},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264210},
  doi          = {10.1145/264107.264210},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/SprangleCAP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StunkelSP97,
  author       = {Craig B. Stunkel and
                  Rajeev Sivaram and
                  Dhabaleswar K. Panda},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Implementing Multidestination Worms in Switch-Based Parallel Systems:
                  Architectural Alternatives and their Impact},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {50--61},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264129},
  doi          = {10.1145/264107.264129},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/StunkelSP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/TeodosiuBGCRH97,
  author       = {Dan Teodosiu and
                  Joel Baxter and
                  Kinshuk Govil and
                  John Chapin and
                  Mendel Rosenblum and
                  Mark Horowitz},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Hardware Fault Containment in Scalable Shared-Memory Multiprocessors},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {73--84},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264141},
  doi          = {10.1145/264107.264141},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/TeodosiuBGCRH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/VajapeyamM97,
  author       = {Sriram Vajapeyam and
                  Tulika Mitra},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Improving Superscalar Instruction Dispatch and Issue by Exploiting
                  Dynamic Code Sequences},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {1--12},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264119},
  doi          = {10.1145/264107.264119},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/VajapeyamM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WeberGHSWW97,
  author       = {Wolf{-}Dietrich Weber and
                  Stephen Gold and
                  Pat Helland and
                  Takeshi Shimizu and
                  Thomas Wicki and
                  Winfried W. Wilcke},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {The Mercury Interconnect Architecture: {A} Cost-effective Infrastructure
                  for High-performance Servers},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {98--107},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264149},
  doi          = {10.1145/264107.264149},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/WeberGHSWW97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WilsonO97,
  author       = {Kenneth M. Wilson and
                  Kunle Olukotun},
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Designing High Bandwidth On-Chip Caches},
  booktitle    = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  pages        = {121--132},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107.264153},
  doi          = {10.1145/264107.264153},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/WilsonO97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/1997,
  editor       = {Andrew R. Pleszkun and
                  Trevor N. Mudge},
  title        = {Proceedings of the 24th International Symposium on Computer Architecture,
                  Denver, Colorado, USA, June 2-4, 1997},
  publisher    = {{ACM}},
  year         = {1997},
  url          = {https://doi.org/10.1145/264107},
  doi          = {10.1145/264107},
  isbn         = {0-89791-901-7},
  timestamp    = {Fri, 09 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isca/1997.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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