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@inproceedings{DBLP:conf/hldvt/AhujaS09,
  author       = {Sumit Ahuja and
                  Sandeep K. Shukla},
  title        = {{MCBCG:} Model Checking Based Sequential Clock-Gating},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {20--25},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340181},
  doi          = {10.1109/HLDVT.2009.5340181},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/AhujaS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/AlizadehF09,
  author       = {Bijan Alizadeh and
                  Masahiro Fujita},
  title        = {Modular arithmetic decision procedure with auto-correction mechanism},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {138--145},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340162},
  doi          = {10.1109/HLDVT.2009.5340162},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/AlizadehF09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/CabodiDMN09,
  author       = {Gianpiero Cabodi and
                  Leandro Dipietro and
                  Marco Murciano and
                  Sergio Nocco},
  title        = {Exploiting incrementality in SAT-based search for multiple equivalence-preserving
                  transformations in combinational circuits},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {46--53},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340177},
  doi          = {10.1109/HLDVT.2009.5340177},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/CabodiDMN09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/CaramiaCFP09,
  author       = {Maurizio Caramia and
                  Stefano Di Carlo and
                  Michele Fabiano and
                  Paolo Prinetto},
  title        = {{FLARE:} {A} design environment for FLASH-based space applications},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {14--19},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340180},
  doi          = {10.1109/HLDVT.2009.5340180},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/CaramiaCFP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/ChakrabortyNB09,
  author       = {Rajat Subhra Chakraborty and
                  Seetharam Narasimhan and
                  Swarup Bhunia},
  title        = {Hardware Trojan: Threats and emerging solutions},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {166--171},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340158},
  doi          = {10.1109/HLDVT.2009.5340158},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/ChakrabortyNB09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/ChandrasekarH09,
  author       = {Maheshwar Chandrasekar and
                  Michael S. Hsiao},
  title        = {Diagnostic Test Generation for silicon diagnosis with an incremental
                  learning framework based on search state compatibility},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {68--75},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340172},
  doi          = {10.1109/HLDVT.2009.5340172},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/ChandrasekarH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/ChatterjeeB09,
  author       = {Debapriya Chatterjee and
                  Valeria Bertacco},
  title        = {Activity-based refinement for abstraction-guided simulation},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {146--153},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340163},
  doi          = {10.1109/HLDVT.2009.5340163},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/ChatterjeeB09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/ChenM09,
  author       = {Huan Chen and
                  Jo{\~{a}}o Marques{-}Silva},
  title        = {{TG-PRO:} {A} new model for SAT-based {ATPG}},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {76--81},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340173},
  doi          = {10.1109/HLDVT.2009.5340173},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hldvt/ChenM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/FanZ09,
  author       = {Yongquan Fan and
                  Zeljko Zilic},
  title        = {A versatile scheme for the validation, testing and debugging of High
                  Speed Serial Interfaces},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {114--121},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340167},
  doi          = {10.1109/HLDVT.2009.5340167},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/FanZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/FangCF09,
  author       = {Hongxia Fang and
                  Krishnendu Chakrabarty and
                  Hideo Fujiwara},
  title        = {{RTL} {DFT} techniques to enhance defect coverage for functional test
                  sequences},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {160--165},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340161},
  doi          = {10.1109/HLDVT.2009.5340161},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hldvt/FangCF09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/GulatiK09,
  author       = {Kanupriya Gulati and
                  Sunil P. Khatri},
  title        = {Fault table generation using Graphics Processing Units},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {60--67},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340175},
  doi          = {10.1109/HLDVT.2009.5340175},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/GulatiK09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/HannaM09,
  author       = {Ziyad Hanna and
                  Thomas F. Melham},
  title        = {A symbolic execution framework for algorithm-level modelling},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {94--99},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340168},
  doi          = {10.1109/HLDVT.2009.5340168},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/HannaM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/HaoB09,
  author       = {J. Hao and
                  Valeria Bertacco},
  title        = {PowerRanger: Assessing circuit vulnerability to power attacks using
                  SAT-based static analysis},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {54--59},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340174},
  doi          = {10.1109/HLDVT.2009.5340174},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/HaoB09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/JhaLS09,
  author       = {Susmit Jha and
                  Wenchao Li and
                  Sanjit A. Seshia},
  title        = {Localizing transient faults using dynamic bayesian networks},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {82--87},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340170},
  doi          = {10.1109/HLDVT.2009.5340170},
  timestamp    = {Mon, 05 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/JhaLS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/KallaM09,
  author       = {Priyank Kalla and
                  Prabhat Mishra},
  title        = {Chairs' welcome message},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340185},
  doi          = {10.1109/HLDVT.2009.5340185},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/KallaM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/LishernessC09,
  author       = {Peter Lisherness and
                  Kwang{-}Ting Cheng},
  title        = {An instrumented observability coverage method for system validation},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {88--93},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340171},
  doi          = {10.1109/HLDVT.2009.5340171},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hldvt/LishernessC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/LiuV09,
  author       = {Lingyi Liu and
                  Shobha Vasudevan},
  title        = {{STAR:} Generating input vectors for design validation by static analysis
                  of {RTL}},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {32--37},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340179},
  doi          = {10.1109/HLDVT.2009.5340179},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/LiuV09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/MoonH09,
  author       = {In{-}Ho Moon and
                  Kevin Harer},
  title        = {Learning from constraints for formal property checking},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {38--45},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340176},
  doi          = {10.1109/HLDVT.2009.5340176},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/MoonH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/NicoliciK09,
  author       = {Nicola Nicolici and
                  Ho Fai Ko},
  title        = {Design-for-debug for post-silicon validation: Can high-level descriptions
                  help?},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {172--175},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340159},
  doi          = {10.1109/HLDVT.2009.5340159},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/NicoliciK09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/ParkM09,
  author       = {Sung{-}Boem Park and
                  Subhasish Mitra},
  title        = {{IFRA:} Post-silicon bug localization in processors},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {154--159},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340160},
  doi          = {10.1109/HLDVT.2009.5340160},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/ParkM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/SafarpourV09,
  author       = {Sean Safarpour and
                  Andreas G. Veneris},
  title        = {Automated debugging with high level abstraction and refinement},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {26--31},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340178},
  doi          = {10.1109/HLDVT.2009.5340178},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/SafarpourV09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/SharmaGM09,
  author       = {Subodh Sharma and
                  Ganesh Gopalakrishnan and
                  Eric Mercer},
  title        = {Dynamic verification of Multicore Communication applications in {MCAPI}},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {100--105},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340169},
  doi          = {10.1109/HLDVT.2009.5340169},
  timestamp    = {Mon, 04 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hldvt/SharmaGM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/Shenoy09,
  author       = {Sunil R. Shenoy},
  title        = {Leadership Microprocessors: Validation, debug and test},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340187},
  doi          = {10.1109/HLDVT.2009.5340187},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/Shenoy09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/TongBZ09,
  author       = {Jason G. Tong and
                  Marc Boule and
                  Zeljko Zilic},
  title        = {Airwolf-TG: {A} test generator for assertion-based dynamic verification},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {106--113},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340166},
  doi          = {10.1109/HLDVT.2009.5340166},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/TongBZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/VelevG09,
  author       = {Miroslav N. Velev and
                  Ping Gao},
  title        = {Exploiting hierarchical encodings of equality to design independent
                  strategies in parallel {SMT} decision procedures for a logic of equality},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {8--13},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340184},
  doi          = {10.1109/HLDVT.2009.5340184},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/VelevG09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/VerdoolaegePBJC09,
  author       = {Sven Verdoolaege and
                  Martin Palkovic and
                  Maurice Bruynooghe and
                  Gerda Janssens and
                  Francky Catthoor},
  title        = {Experience with widening based equivalence checking in realistic multimedia
                  systems},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {122--129},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340164},
  doi          = {10.1109/HLDVT.2009.5340164},
  timestamp    = {Fri, 02 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/VerdoolaegePBJC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/XueS09,
  author       = {Bin Xue and
                  Sandeep K. Shukla},
  title        = {Analysis of scheduled Latency insensitive systems with periodic clock
                  calculus},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {1--7},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340183},
  doi          = {10.1109/HLDVT.2009.5340183},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/XueS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hldvt/Zheng09,
  author       = {Hao Zheng},
  title        = {A coordinated reachability analysis method for modular verification
                  of asynchronous designs},
  booktitle    = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  pages        = {130--137},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HLDVT.2009.5340165},
  doi          = {10.1109/HLDVT.2009.5340165},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/Zheng09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/hldvt/2009,
  title        = {{IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/5331931/proceeding},
  isbn         = {978-1-4244-4823-4},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hldvt/2009.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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