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@inproceedings{DBLP:conf/glvlsi/AbdulgadirKS22,
author = {Abubakr Abdulgadir and
Jens{-}Peter Kaps and
Ahmad Salman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Enhancing Information Security Courses With a Remotely Accessible
Side-Channel Analysis Setup},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {531--536},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530347},
doi = {10.1145/3526241.3530347},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AbdulgadirKS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AddepalliP22,
author = {Hari Addepalli and
Irith Pomeranz},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Algorithms for the Selection of Applied Tests when a Stored Test Produces
Many Applied Tests},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {345--349},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530359},
doi = {10.1145/3526241.3530359},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AddepalliP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Afsharmazayejani22,
author = {Raheel Afsharmazayejani and
Hossein Sayadi and
Amin Rezaei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Distributed Logic Encryption: Essential Security Requirements and
Low-Overhead Implementation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {127--131},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530372},
doi = {10.1145/3526241.3530372},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Afsharmazayejani22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlatounV22,
author = {Khitam M. Alatoun and
Ranga Vemuri},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Efficient Method for Timing-based Information Flow Verification in
Hardware Designs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {159--163},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530363},
doi = {10.1145/3526241.3530363},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlatounV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AminEMZ22,
author = {Md Hasibul Amin and
Mohammed E. Elbtity and
Mohammadreza Mohammadi and
Ramtin Zand},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {MRAM-based Analog Sigmoid Function for In-memory Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {319--323},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530376},
doi = {10.1145/3526241.3530376},
timestamp = {Wed, 04 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AminEMZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AswathyBSK22,
author = {N. S. Aswathy and
Sreesiddesh Bhavanasi and
Arnab Sarkar and
Hemangee K. Kapoor},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {SRS-Mig: Selection and Run-time Scheduling of page Migration for improved
response time in hybrid {PCM-DRAM} memories},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {217--222},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530327},
doi = {10.1145/3526241.3530327},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AswathyBSK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhatnagarRV22,
author = {Varun Bhatnagar and
Gopal Raut and
Santosh Kumar Vishvakarma},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Loading Effect Free MOS-only Voltage Reference Ladder for {ADC} in
RRAM-crossbar Array},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {199--202},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530354},
doi = {10.1145/3526241.3530354},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BhatnagarRV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoddupalliODCR22,
author = {Srivalli Boddupalli and
Richard Owoputi and
Chengwei Duan and
Tashfique Hasnine Choudhury and
Sandip Ray},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Resiliency in Connected Vehicle Applications: Challenges and Approaches
for Security Validation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {475--480},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530832},
doi = {10.1145/3526241.3530832},
timestamp = {Mon, 16 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BoddupalliODCR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BrunsHGD22,
author = {Niklas Bruns and
Vladimir Herdt and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Efficient Cross-Level Processor Verification using Coverage-guided
Fuzzing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {97--103},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530340},
doi = {10.1145/3526241.3530340},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BrunsHGD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CR22,
author = {Prashanth H. C. and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Evolutionary Standard Cell Synthesis of Unconventional Designs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {189--192},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530353},
doi = {10.1145/3526241.3530353},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CRGR22,
author = {Prashanth H. C. and
Soujanya S. R and
Bindu G. Gowda and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Design and Evaluation of In-Exact Compressor based Approximate Multipliers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {431--436},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530320},
doi = {10.1145/3526241.3530320},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CRGR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CalhounOYDA22,
author = {Ashley Calhoun and
Erick Ortega and
Ferhat Yaman and
Anuj Dubey and
Aydin Aysu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hands-On Teaching of Hardware Security for Machine Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {455--461},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530828},
doi = {10.1145/3526241.3530828},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CalhounOYDA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenL22,
author = {Chien{-}Fu Chen and
Mikko H. Lipasti},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {PrGEMM: {A} Parallel Reduction SpGEMM Accelerator},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {397--401},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530387},
doi = {10.1145/3526241.3530387},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenXZR22,
author = {Lingfeng Chen and
Tian Xia and
Wenzhe Zhao and
Pengju Ren},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MI2D:} Accelerating Matrix Inversion with 2-Dimensional Tile Manipulations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {423--429},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530314},
doi = {10.1145/3526241.3530314},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenXZR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChoLK22,
author = {Michael Cho and
Keewoo Lee and
Sunwoong Kim},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{HELPSE:} Homomorphic Encryption-based Lightweight Password Strength
Estimation in a Virtual Keyboard System},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {405--410},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530338},
doi = {10.1145/3526241.3530338},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChoLK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChowdhuryVLSM0D22,
author = {Tanmoy Chowdhury and
Ashkan Vakil and
Banafsheh Saber Latibari and
Sayed Aresh Beheshti{-}Shirazi and
Ali Mirzaeian and
Xiaojie Guo and
Sai Manoj P. D. and
Houman Homayoun and
Ioannis Savidis and
Liang Zhao and
Avesta Sasan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{RAPTA:} {A} Hierarchical Representation Learning Solution For Real-Time
Prediction of Path-Based Static Timing Analysis},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {493--500},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530831},
doi = {10.1145/3526241.3530831},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChowdhuryVLSM0D22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Cui0WYL22,
author = {Ziying Cui and
Ke Chen and
Bi Wu and
Chenggang Yan and
Weiqiang Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Energy-efficient and High-precision Approximate {MAC} with Distributed
Arithmetic Circuits},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {315--318},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530383},
doi = {10.1145/3526241.3530383},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Cui0WYL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DarjaniKRW022,
author = {Armin Darjani and
Nima Kavand and
Shubham Rai and
Mark Wijtvliet and
Akash Kumar},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{ENTANGLE:} An Enhanced Logic-locking Technique for Thwarting {SAT}
and Structural Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {147--151},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530371},
doi = {10.1145/3526241.3530371},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DarjaniKRW022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Dinakarrao22,
author = {Sai Manoj Pudukotai Dinakarrao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 7A: Special Session - 3: Machine Learning-Aided
Computer-Aided Design},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542694},
doi = {10.1145/3542694},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Dinakarrao22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DuttaGKCXR22,
author = {Arpan Dutta and
Saransh Gupta and
Behnam Khaleghi and
Rishikanth Chandrasekaran and
Weihong Xu and
Tajana Rosing},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {HDnn-PIM: Efficient in Memory Design of Hyperdimensional Computing
with Feature Extraction},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {281--286},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530331},
doi = {10.1145/3526241.3530331},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DuttaGKCXR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EngersC0WC22,
author = {Samuel J. Engers and
Cheng Chu and
Dawen Xu and
Ying Wang and
Fan Chen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MOCCA:} {A} Process Variation Tolerant Systolic {DNN} Accelerator
using CNFETs in Monolithic 3D},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {379--382},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530380},
doi = {10.1145/3526241.3530380},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/EngersC0WC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Fan22,
author = {Deliang Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 1B: Emerging Computing and Post-CMOS Technologies},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542683},
doi = {10.1145/3542683},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Fan22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FerdausTR22,
author = {Farah Ferdaus and
Bashir Mohammad Sabquat Bahar Talukder and
Md. Tauhidur Rahman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Watermarked ReRAM: {A} Technique to Prevent Counterfeit Memory Chips},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {21--26},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530341},
doi = {10.1145/3526241.3530341},
timestamp = {Wed, 15 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FerdausTR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FoshieRDZPR22,
author = {Adam Z. Foshie and
Charles Rizzo and
Hritom Das and
Chaohui Zheng and
James S. Plank and
Garrett S. Rose},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor
Architectures for Control Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {383--386},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530381},
doi = {10.1145/3526241.3530381},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FoshieRDZPR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuYAYJYG22,
author = {Weimin Fu and
Honggang Yu and
Orlando Arias and
Kaichen Yang and
Yier Jin and
Tuba Yavuz and
Xiaolong Guo},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Graph Neural Network based Hardware Trojan Detection at Intermediate
Representative for SoC Platforms},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {481--486},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530827},
doi = {10.1145/3526241.3530827},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FuYAYJYG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuYMC22,
author = {Zhaoqi Fu and
Wenxin Yu and
Jie Ma and
Xin Cheng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Efficient Maze Routing Algorithm for Fast Global Routing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {169--172},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530360},
doi = {10.1145/3526241.3530360},
timestamp = {Fri, 24 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FuYMC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 1A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542682},
doi = {10.1145/3542682},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22a,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 2A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542684},
doi = {10.1145/3542684},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22b,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 5A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542690},
doi = {10.1145/3542690},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaryfallouVAMS22,
author = {Dimitrios Garyfallou and
Anastasis Vagenas and
Charalampos Antoniadis and
Yehia Massoud and
George I. Stamoulis},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Leveraging Machine Learning for Gate-level Timing Estimation Using
Current Source Models and Effective Capacitance},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {77--83},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530343},
doi = {10.1145/3526241.3530343},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GaryfallouVAMS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GayariKG22,
author = {Gagan Gayari and
Chandan Karfa and
Prithwijit Guha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{GAUR:} Genetic Algorithm based Unlocking of Register Transfer Level
Locking},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {123--126},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530362},
doi = {10.1145/3526241.3530362},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GayariKG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Ghosh22,
author = {Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 5B: {VLSI} Design + {VLSI} Circuits and Power
Aware Design 2},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542691},
doi = {10.1145/3542691},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Ghosh22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GolderBR22,
author = {Anupam Golder and
Ashwin Bhat and
Arijit Raychowdhury},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Exploration into the Explainability of Neural Network Models for Power
Side-Channel Analysis},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {59--64},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530346},
doi = {10.1145/3526241.3530346},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GolderBR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GopaleDLR22,
author = {Manoj Gopale and
Gregory Ditzler and
Roman Lysecky and
Janet Roveda},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Inter-Architecture Portability of Artificial Neural Networks and Side
Channel Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {117--121},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530356},
doi = {10.1145/3526241.3530356},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GopaleDLR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GubbiBSSDRSH22,
author = {Kevin Immanuel Gubbi and
Sayed Aresh Beheshti{-}Shirazi and
Tyler David Sheaves and
Soheil Salehi and
Sai Manoj P. D. and
Setareh Rafatirad and
Avesta Sasan and
Houman Homayoun},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Survey of Machine Learning for Electronic Design Automation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {513--518},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530834},
doi = {10.1145/3526241.3530834},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GubbiBSSDRSH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuptaKJN22,
author = {Ruchika Gupta and
Vedika J. Kulkarni and
John Jose and
Sukumar Nandi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Securing On-chip Interconnect against Delay Trojan using Dynamic Adaptive
Caging},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {411--416},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530333},
doi = {10.1145/3526241.3530333},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuptaKJN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hasler22,
author = {Jennifer Hasler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Senior-Level Analog {IC} Design Course built on Open-Source Technologies},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {537--542},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530334},
doi = {10.1145/3526241.3530334},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hasler22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/He0HS22,
author = {Zhangying He and
Amin Rezaei and
Houman Homayoun and
Hossein Sayadi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Deep Neural Network and Transfer Learning for Accurate Hardware-Based
Zero-Day Malware Detection},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {27--32},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530326},
doi = {10.1145/3526241.3530326},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/He0HS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HerreraB22,
author = {Mois{\'{e}}s Herrera and
Peter A. Beerel},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Radiation Hardening by Design Techniques for the Mutual Exclusion
Element},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {267--273},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530310},
doi = {10.1145/3526241.3530310},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HerreraB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hu22,
author = {Jingtong Hu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 3B: {VLSI} for Machine Learning and Artifical
Intelligence 1},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542687},
doi = {10.1145/3542687},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hu22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hu22a,
author = {Jingtong Hu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 4B: {VLSI} for Machine Learning and Artifical
Intelligence 2},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542689},
doi = {10.1145/3542689},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hu22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangZGDY022,
author = {Lingyi Huang and
Xiao Zang and
Yu Gong and
Chunhua Deng and
Jingang Yi and
Bo Yuan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{IMG-SMP:} Algorithm and Hardware Co-Design for Real-time Energy-efficient
Neural Motion Planning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {373--377},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530367},
doi = {10.1145/3526241.3530367},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangZGDY022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JoseSNK22,
author = {Sethu Jose and
John Sampson and
Vijaykrishnan Narayanan and
Mahmut Taylan Kandemir},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Scheduling Framework for Decomposable Kernels on Energy Harvesting
IoT Edge Nodes},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {91--96},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530350},
doi = {10.1145/3526241.3530350},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JoseSNK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kahng22,
author = {Andrew B. Kahng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {AI/ML, Optimization and {EDA} in the {TILOS} {AI} Research Institute},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {1},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530052},
doi = {10.1145/3526241.3530052},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Kahng22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KasarapuSHSHD22,
author = {Sreenitha Kasarapu and
Sanket Shukla and
Rakibul Hassan and
Avesta Sasan and
Houman Homayoun and
Sai Manoj P. D.},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{CAD-FSL:} Code-Aware Data Generation based Few-Shot Learning for
Efficient Malware Detection},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {507--512},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530825},
doi = {10.1145/3526241.3530825},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KasarapuSHSHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KhanPK22,
author = {Kamil Khan and
Sudeep Pasricha and
Ryan Gary Kim},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{RACE:} {A} Reinforcement Learning Framework for Improved Adaptive
Control of NoC Channel Buffers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {205--210},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530335},
doi = {10.1145/3526241.3530335},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KhanPK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KiaeiLS22,
author = {Pantea Kiaei and
Zhenyuan Liu and
Patrick Schaumont},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Leverage the Average: Averaged Sampling in Pre-Silicon Side-Channel
Leakage Assessment},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {3--8},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530337},
doi = {10.1145/3526241.3530337},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KiaeiLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KiranR22,
author = {Yadu Kiran and
Marc D. Riedel},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Scalable, Deterministic Approach to Stochastic Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {45--51},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530344},
doi = {10.1145/3526241.3530344},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KiranR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KlemmerSG22,
author = {Lucas Klemmer and
Manfred Schl{\"{a}}gl and
Daniel Gro{\ss}e},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {RVVRadar: {A} Framework for Supporting the Programmer in Vectorization
for {RISC-V}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {183--187},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530388},
doi = {10.1145/3526241.3530388},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KlemmerSG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongKKK22,
author = {Myong Kong and
Daeyeon Kim and
Minhyuk Kweon and
Seokhyeong Kang},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {GAN-Dummy Fill: Timing-aware Dummy Fill Method using {GAN}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {177--181},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530352},
doi = {10.1145/3526241.3530352},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongKKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KumarRPA22,
author = {Gaurav Kumar and
Anjum Riaz and
Yamuna Prasad and
Satyadev Ahlawat},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {On Attacking Locking {SIB} based {IJTAG} Architecture},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {105--109},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530370},
doi = {10.1145/3526241.3530370},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KumarRPA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KunduG22,
author = {Satwik Kundu and
Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Security Aspects of Quantum Machine Learning: Opportunities, Threats
and Defenses},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {463--468},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530833},
doi = {10.1145/3526241.3530833},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KunduG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KuntharaJSJ22,
author = {Rose George Kunthara and
Rekha K. James and
Simi Zerine Sleeba and
John Jose},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless
On-Chip Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {211--216},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530332},
doi = {10.1145/3526241.3530332},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KuntharaJSJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiHC22,
author = {Wanqian Li and
Yinhe Han and
Xiaoming Chen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Energy-Efficient In-SRAM Accumulation for CMOS-based {CNN} Accelerators},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {293--298},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530319},
doi = {10.1145/3526241.3530319},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiHC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuCS022,
author = {Mengqiang Lu and
Aijiao Cui and
Yan Shao and
Gang Qu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Memristor-based Secure Scan Design against the Scan-based Side-Channel
Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {71--76},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530345},
doi = {10.1145/3526241.3530345},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuCS022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaYFC22,
author = {Jie Ma and
Wenxin Yu and
Zhaoqi Fu and
Xin Cheng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Optimal Region-based Mixed-Cell-Height Detailed Placement Considering
Complex Minimum-Implant-Area Constraints},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {173--176},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530389},
doi = {10.1145/3526241.3530389},
timestamp = {Fri, 24 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaYFC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MahmoudLVCACH22,
author = {Abdulqader Nael Mahmoud and
Nicoleta Cucu Laurenciu and
Frederic Vanderveken and
Florin Ciubotaru and
Christoph Adelmann and
Sorin Cotofana and
Said Hamdioui},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Would Magnonic Circuits Outperform {CMOS} Counterparts?},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {309--313},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530368},
doi = {10.1145/3526241.3530368},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MahmoudLVCACH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mathew22,
author = {Sanu K. Mathew},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Attack-Resistant Circuit Technologies for sub-5nm Secure Computing
Platforms},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {403},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530053},
doi = {10.1145/3526241.3530053},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mathew22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Meng0BH22,
author = {Xingyu Meng and
Mahmudul Hasan and
Kanad Basu and
Tamzidul Hoque},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Semi-formal Information Flow Validation for Analyzing Secret Asset
Propagation in {COTS} {IC} Integrated Systems},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {417--422},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530328},
doi = {10.1145/3526241.3530328},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Meng0BH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MishraMSPS22,
author = {Vishesh Mishra and
Sparsh Mittal and
Saurabh Singh and
Divy Pandey and
Rekha Singhal},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MEGA-MAC:} {A} Merged Accumulation based Approximate {MAC} Unit for
Error Resilient Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {325--328},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530384},
doi = {10.1145/3526241.3530384},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MishraMSPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mohanty22,
author = {Saraju P. Mohanty},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 3A: {VLSI} Design + {VLSI} Circuits and Power
Aware Design 1},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542686},
doi = {10.1145/3542686},
timestamp = {Wed, 22 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mohanty22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MonjurCKY22,
author = {Mohammad Mezanur Rahman Monjur and
Joshua Calzadillas and
Mashrafi Alam Kajol and
Qiaoyan Yu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hardware Security in Advanced Manufacturing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {469--474},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530829},
doi = {10.1145/3526241.3530829},
timestamp = {Mon, 31 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MonjurCKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajibiLAZA22,
author = {Halima Najibi and
Alexandre Levisse and
Giovanni Ansaloni and
Marina Zapater and
David Atienza},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs
with Integrated Flow Cell Arrays},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {223--228},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530309},
doi = {10.1145/3526241.3530309},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NajibiLAZA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NathK22,
author = {Arijit Nath and
Hemangee K. Kapoor},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {CoSeP: Compression and Content-based Selection Procedure to Improve
Lifetime of Encrypted Non-Volatile Main Memories},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {393--396},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530375},
doi = {10.1145/3526241.3530375},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NathK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NgoD22,
author = {Kalle Ngo and
Elena Dubrova},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Side-Channel Analysis of the Random Number Generator in {STM32} MCUs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {15--20},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530324},
doi = {10.1145/3526241.3530324},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NgoD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OdetolaKH22,
author = {Tolulope A. Odetola and
Faiq Khalid and
Syed Rafay Hasan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {LaBaNI: Layer-based Noise Injection Attack on Convolutional Neural
Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {143--146},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530385},
doi = {10.1145/3526241.3530385},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OdetolaKH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OlneyK22,
author = {Brooks Olney and
Robert Karam},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Protecting Deep Neural Network Intellectual Property with Architecture-Agnostic
Input Obfuscation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {111--115},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530386},
doi = {10.1145/3526241.3530386},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OlneyK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanTWZW22,
author = {Kangqiang Pan and
Amr M. S. Tosson and
Ningxuan Wang and
Norman Y. Zhou and
Lan Wei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Novel 2T2R CR-based {TCAM} Design for High-speed and Energy-efficient
Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {33--38},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530336},
doi = {10.1145/3526241.3530336},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PanTWZW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pasricha22,
author = {Sudeep Pasricha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Embedded Systems Education in the 2020s: Challenges, Reflections,
and Future Directions},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {519--524},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530348},
doi = {10.1145/3526241.3530348},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pasricha22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PieperHD22,
author = {Pascal Pieper and
Vladimir Herdt and
Rolf Drechsler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Advanced Environment Modeling and Interaction in an Open Source {RISC-V}
Virtual Prototype},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {193--197},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530374},
doi = {10.1145/3526241.3530374},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PieperHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pomeranz22,
author = {Irith Pomeranz},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Compaction of Compressed Bounded Transparent-Scan Test Sets},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {339--343},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530358},
doi = {10.1145/3526241.3530358},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pomeranz22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiZCY22,
author = {Zhongdong Qi and
Jingchong Zhang and
Gengjie Chen and
Hailong You},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Effective and Efficient Detailed Routing with Adaptive Rip-up Scheme
and Pin Access Refinement},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {165--168},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530361},
doi = {10.1145/3526241.3530361},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QiZCY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RashidS22,
author = {M. Imtiaz Rashid and
Benjamin Carrion Schafer},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Fast Parallel High-Level Synthesis Design Space Explorer: Targeting
FPGAs to accelerate {ASIC} Exploration},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {85--90},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530339},
doi = {10.1145/3526241.3530339},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RashidS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RatnaparkhiR22,
author = {Omkar G. Ratnaparkhi and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{LEAD:} Logarithmic Exponent Approximate Divider For Image Quantization
Application},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {437--442},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530323},
doi = {10.1145/3526241.3530323},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RatnaparkhiR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RiosPALA22,
author = {Marco Rios and
Flavio Ponzina and
Giovanni Ansaloni and
Alexandre Levisse and
David Atienza},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Error Resilient In-Memory Computing Architecture for {CNN} Inference
on the Edge},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {249--254},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530351},
doi = {10.1145/3526241.3530351},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RiosPALA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Roy22,
author = {Kaushik Roy},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {In-Memory Computing based Machine Learning Accelerators: Opportunities
and Challenges},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {203--204},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530051},
doi = {10.1145/3526241.3530051},
timestamp = {Sun, 05 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Roy22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salman22,
author = {Emre Salman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 2B: Computer-Aided Design {(CAD)}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542685},
doi = {10.1145/3542685},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salman22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salmani22,
author = {Hassan Salmani},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {The Improved {COTD} Technique for Hardware Trojan Detection in Gate-level
Netlist},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {449--454},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530835},
doi = {10.1145/3526241.3530835},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salmani22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salmani22a,
author = {Hassan Salmani},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 6B: Special Session - 2: Application-oriented
Hardware Security Challenges and Solutions},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542693},
doi = {10.1145/3542693},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salmani22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SarihiPJB22,
author = {Amin Sarihi and
Ahmad Patooghy and
Peter Jamieson and
Abdel{-}Hameed A. Badawy},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hardware Trojan Insertion Using Reinforcement Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {139--142},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530379},
doi = {10.1145/3526241.3530379},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SarihiPJB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShafieeBCPN22,
author = {Amin Shafiee and
Sanmitra Banerjee and
Krishnendu Chakrabarty and
Sudeep Pasricha and
Mahdi Nikdast},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise
in Integrated Silicon-Photonic Neural Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {351--355},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530365},
doi = {10.1145/3526241.3530365},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShafieeBCPN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShahhosseiniNNI22,
author = {Sina Shahhosseini and
Yang Ni and
Emad Kasaeyan Naeini and
Mohsen Imani and
Amir M. Rahmani and
Nikil D. Dutt},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Flexible and Personalized Learning for Wearable Health Applications
using HyperDimensional Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {357--360},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530373},
doi = {10.1145/3526241.3530373},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShahhosseiniNNI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShamsiZ22,
author = {Kaveh Shamsi and
Guangwei Zhao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Oracle-Less Machine-Learning Attack against Lookup-Table-based
Logic Locking},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {133--137},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530377},
doi = {10.1145/3526241.3530377},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShamsiZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShuklaKHRD22,
author = {Sanket Shukla and
Gaurav Kolhe and
Houman Homayoun and
Setareh Rafatirad and
Sai Manoj P. D.},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {RAFeL - Robust and Data-Aware Federated Learning-inspired Malware
Detection in Internet-of-Things (IoT) Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {153--157},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530378},
doi = {10.1145/3526241.3530378},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShuklaKHRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Skromme22,
author = {Brian J. Skromme},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 7B: Microelectronic Systems Education},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542695},
doi = {10.1145/3542695},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Skromme22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SridharanZF22,
author = {Amitesh Sridharan and
Fan Zhang and
Deliang Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {MnM: {A} Fast and Efficient Min/Max Searching in {MRAM}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {39--44},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530349},
doi = {10.1145/3526241.3530349},
timestamp = {Tue, 29 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SridharanZF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SundaravadivelG22,
author = {Prabha Sundaravadivel and
Prosenjit Kumar Ghosh and
Bikal Suwal},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {IoT-enabled Soft Robotics for Electrical Engineers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {329--332},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530369},
doi = {10.1145/3526241.3530369},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SundaravadivelG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunnyNP22,
author = {Febin Sunny and
Mahdi Nikdast and
Sudeep Pasricha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Silicon Photonic Accelerator for Convolutional Neural Networks with
Heterogeneous Quantization},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {367--371},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530364},
doi = {10.1145/3526241.3530364},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SunnyNP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TanYYF22,
author = {Long Tan and
Mingyu Yan and
Xiaochun Ye and
Dongrui Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {HetGraph: {A} High Performance {CPU-CGRA} Architecture for Matrix-based
Graph Analytics},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {387--391},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530382},
doi = {10.1145/3526241.3530382},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TanYYF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/UpadhyayATG22,
author = {Suryansh Upadhyay and
Abdullah Ash{-}Saki and
Rasit Onur Topaloglu and
Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Shuttle-Efficient Qubit Mapper for Trapped-Ion Quantum Computers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {305--308},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530366},
doi = {10.1145/3526241.3530366},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/UpadhyayATG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VercruysseMBH22,
author = {Alec Vercruysse and
M. Weston Miller and
Joshua Brake and
David M. Harris},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Tutorial-style Single-cycle Fast Fourier Transform Processor},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {525--530},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530329},
doi = {10.1145/3526241.3530329},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VercruysseMBH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiaoXCWH22,
author = {Hang Xiao and
Haobo Xu and
Xiaoming Chen and
Yujie Wang and
Yinhe Han},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{P3S:} {A} High Accuracy Probabilistic Prediction Processing System
for {CNN} Acceleration},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {237--242},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530322},
doi = {10.1145/3526241.3530322},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiaoXCWH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiongLSLLWLQ22,
author = {Wei Xiong and
Yanze Li and
Changpeng Sun and
Huanlin Luo and
Jiafeng Liu and
Jian Wang and
Jinmei Lai and
Gang Qu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Effective Test Method for Block RAMs in Heterogeneous FPGAs Based
on a Novel Partial Bitstream Relocation Technique},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {275--280},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530317},
doi = {10.1145/3526241.3530317},
timestamp = {Wed, 15 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiongLSLLWLQ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuGF22,
author = {Tianhong Xu and
Cheng Gongye and
Yunsi Fei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Protected {ECC} Still Leaks: {A} Novel Differential-Bit Side-channel
Power Attack on {ECDH} and Countermeasures},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {9--14},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530342},
doi = {10.1145/3526241.3530342},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XuGF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanCSZ0H0W22,
author = {Aibin Yan and
Yu Chen and
Shukai Song and
Zijie Zhai and
Jie Cui and
Zhengfeng Huang and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and
Low-Delay Flip-Flop for Aerospace Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {333--338},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530355},
doi = {10.1145/3526241.3530355},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanCSZ0H0W22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanHXCZHGW22,
author = {Aibin Yan and
Zhihui He and
Jing Xiang and
Jie Cui and
Yong Zhou and
Zhengfeng Huang and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Two 0.8 V, Highly Reliable {RHBD} 10T and 12T {SRAM} Cells for Aerospace
Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {261--266},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530312},
doi = {10.1145/3526241.3530312},
timestamp = {Wed, 22 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanHXCZHGW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanZW0ZN0W22,
author = {Aibin Yan and
Zhen Zhou and
Shaojie Wei and
Jie Cui and
Yong Zhou and
Tianming Ni and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale
{CMOS} Technology},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {255--260},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530321},
doi = {10.1145/3526241.3530321},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanZW0ZN0W22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yang0L22,
author = {Jiaqi Yang and
Hao Zheng and
Ahmed Louri},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Adapt-Flow: {A} Flexible {DNN} Accelerator Architecture for Heterogeneous
Dataflow Implementation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {287--292},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530311},
doi = {10.1145/3526241.3530311},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Yang0L22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangUS22,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Reducing Power Consumption using Approximate Encoding for {CNN} Accelerators
at the Edge},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {229--235},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530315},
doi = {10.1145/3526241.3530315},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangUS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yu22,
author = {Qiaoyan Yu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 6A: Special Session -1: Machine Learning
and Hardware Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542692},
doi = {10.1145/3542692},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Yu22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuW0YL22,
author = {Tianyang Yu and
Bi Wu and
Ke Chen and
Chenggang Yan and
Weiqiang Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Data Stream Oriented Fine-grained Sparse {CNN} Accelerator with Efficient
Unstructured Pruning Strategy},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {243--248},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530318},
doi = {10.1145/3526241.3530318},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuW0YL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZengKY22,
author = {Jun Zeng and
Mingyang Kou and
Hailong Yao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {KunlunTVM: {A} Compilation Framework for Kunlun Chip Supporting Both
Training and Inference},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {299--304},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530316},
doi = {10.1145/3526241.3530316},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZengKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangZDGDF22,
author = {Xiang Zhang and
Ziyue Zhang and
Ruyi Ding and
Cheng Gongye and
Aidong Adam Ding and
Yunsi Fei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Ran{\textdollar}Net: An Anti-Ransomware Methodology based on Cache
Monitoring and Deep Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {487--492},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530830},
doi = {10.1145/3526241.3530830},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangZDGDF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoS22,
author = {Guangwei Zhao and
Kaveh Shamsi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Graph Neural Network based Netlist Operator Detection under Circuit
Rewriting},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {53--58},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530330},
doi = {10.1145/3526241.3530330},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhongG22,
author = {Yadi Zhong and
Ujjwal Guin},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Fault-Injection Based Chosen-Plaintext Attacks on Multicycle {AES}
Implementations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {443--448},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530826},
doi = {10.1145/3526241.3530826},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhongG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuLL22,
author = {Shien Zhu and
Shiqing Li and
Weichen Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition
and Subtraction Operations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {65--70},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530313},
doi = {10.1145/3526241.3530313},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuWXYKLP22,
author = {Jingwei Zhu and
Lei Wang and
Xun Xiao and
Zhijie Yang and
Ziyang Kang and
Shiming Li and
LingHui Peng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Event Based Gesture Recognition System Using a Liquid State Machine
Accelerator},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {361--365},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530357},
doi = {10.1145/3526241.3530357},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuWXYKLP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zwolinski22,
author = {Mark Zwolinski},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 4A: Testing, Reliability and Fault Tolerance},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542688},
doi = {10.1145/3542688},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Zwolinski22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2022,
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241},
doi = {10.1145/3526241},
isbn = {978-1-4503-9322-5},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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