Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSearch dblp for Publications
export results for "toc:db/conf/fpga/fpga2017.bht:"
download as .bib file
@inproceedings{DBLP:conf/fpga/AbdelsalamLC17,
author = {Ahmed M. Abdelsalam and
J. M. Pierre Langlois and
Farida Cheriet},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Accurate and Efficient Hyperbolic Tangent Activation Function on {FPGA}
using the {DCT} Interpolation Filter (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {287},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021768},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AbdelsalamLC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AlawadL17,
author = {Mohammed Alawad and
Mingjie Lin},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Stochastic-Based Multi-stage Streaming Realization of a Deep Convolutional
Neural Network (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {291},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021788},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AlawadL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AydonatOCLC17,
author = {Utku Aydonat and
Shane O'Connell and
Davor Capalija and
Andrew C. Ling and
Gordon R. Chiu},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {An OpenCL{\texttrademark} Deep Learning Accelerator on Arria 10},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {55--64},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021738},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AydonatOCLC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BRMK17,
author = {Chethan Kumar H. B and
Prashant Ravi and
Gourav Modi and
Nachiket Kapre},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {120-core microAptiv {MIPS} Overlay for the Terasic {DE5-NET} {FPGA}
board},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {141--146},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021751},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BRMK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BanerjeeELCKCI17,
author = {Subho S. Banerjee and
Mohamed El{-}Hadedy and
Jong Bin Lim and
Daniel Chen and
Zbigniew T. Kalbarczyk and
Deming Chen and
Ravishankar K. Iyer},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{ASAP:} Accelerated Short Read Alignment on Programmable Hardware
(Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {293--294},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021796},
timestamp = {Thu, 02 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/BanerjeeELCKCI17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BobdaWKKN17,
author = {Christophe Bobda and
Taylor J. L. Whitaker and
Charles A. Kamhoua and
Kevin A. Kwiat and
Laurent Njilla},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Automatic Generation of Hardware Sandboxes for Trojan Mitigation in
Systems on Chip (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {289},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021774},
timestamp = {Sun, 05 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BobdaWKKN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Chaudhuri17,
author = {Sumanta Chaudhuri},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Cache Timing Attacks from The SoCFPGA Coherency Port (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {295--296},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021802},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Chaudhuri17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongFHW017,
author = {Jason Cong and
Zhenman Fang and
Muhuan Huang and
Libo Wang and
Di Wu},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{CPU-FPGA} Co-Optimization for Big Data Applications: {A} Case Study
of In-Memory Samtool Sorting (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {291},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021787},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CongFHW017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Constantinides17,
author = {George A. Constantinides},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {FPGAs in the Cloud},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {167},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3030014},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Constantinides17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaiHCXWY17,
author = {Guohao Dai and
Tianhao Huang and
Yuze Chi and
Ningyi Xu and
Yu Wang and
Huazhong Yang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {217--226},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021739},
timestamp = {Wed, 13 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DaiHCXWY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaiZLSGBZ17,
author = {Steve Dai and
Ritchie Zhao and
Gai Liu and
Shreesha Srinath and
Udit Gupta and
Christopher Batten and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level
Synthesis},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {189--194},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021754},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DaiZLSGBZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DeshpandeB17,
author = {Girish Deshpande and
Dinesh K. Bhatia},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Thermal Flattening in 3D FPGAs Using Embedded Cooling (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {286},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021764},
timestamp = {Thu, 08 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DeshpandeB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FangIL17,
author = {Xin Fang and
Stratis Ioannidis and
Miriam Leeser},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Secure Function Evaluation Using an {FPGA} Overlay Architecture},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {257--266},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021746},
timestamp = {Wed, 20 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FangIL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FuHRGLZLZY17,
author = {Haohuan Fu and
Conghui He and
Huabin Ruan and
Itay Greenspon and
Wayne Luk and
Yongkang Zheng and
Junfeng Liao and
Qing Zhang and
Guangwen Yang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Accelerating Financial Market Server through Hybrid List Design (Abstract
Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {289--290},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021775},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FuHRGLZLZY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GiesenRGD17,
author = {Hans Giesen and
Raphael Rubin and
Benjamin Gojman and
Andr{\'{e}} DeHon},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Quality-Time Tradeoffs in Component-Specific Mapping: How to Train
Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {85--94},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3026124},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GiesenRGD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GrewalAWAZ17,
author = {Gary William Grewal and
Shawki Areibi and
Matthew Westrik and
Ziad Abuowaimer and
Betty Zhao},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Machine Learning Framework for {FPGA} Placement (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {286},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021765},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GrewalAWAZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HanKMHLLXLYWYD17,
author = {Song Han and
Junlong Kang and
Huizi Mao and
Yiming Hu and
Xin Li and
Yubin Li and
Dongliang Xie and
Hong Luo and
Song Yao and
Yu Wang and
Huazhong Yang and
William (Bill) J. Dally},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{ESE:} Efficient Speech Recognition Engine with Sparse {LSTM} on {FPGA}},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {75--84},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021745},
timestamp = {Fri, 20 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HanKMHLLXLYWYD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HeL17,
author = {Zhuolun He and
Guojie Luo},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{FPGA} Acceleration for Computational Glass-Free Displays},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {267--274},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021728},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HeL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangMRRHC17,
author = {Sitao Huang and
Gowthami Jayashri Manikandan and
Anand Ramachandran and
Kyle Rupnow and
Wen{-}mei W. Hwu and
Deming Chen},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Hardware Acceleration of the Pair-HMM Algorithm for {DNA} Variant
Calling},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {275--284},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021749},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HuangMRRHC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangWZLLJTIY17,
author = {Zhihong Huang and
Xing Wei and
Grace Zgheib and
Wei Li and
Yu Lin and
Zhenghong Jiang and
Kaihui Tu and
Paolo Ienne and
Haigang Yang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{NAND-NOR:} {A} Compact, Fast, and Delay Balanced {FPGA} Logic Element},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {135--140},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021750},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HuangWZLLJTIY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KoraeiJF17,
author = {Mostafa Koraei and
Magnus Jahre and
S. Omid Fatemi},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Towards Efficient Design Space Exploration of FPGA-based Accelerators
for Streaming {HPC} Applications (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {287},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021767},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KoraeiJF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiLXYR17,
author = {Yixing Li and
Zichuan Liu and
Kai Xu and
Hao Yu and
Fengbo Ren},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A 7.663-TOPS 8.2-W Energy-efficient {FPGA} Accelerator for Binary
Convolutional Neural Networks (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {290--291},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021786},
timestamp = {Tue, 19 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/LiLXYR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LingA17,
author = {Andrew Ling and
Jason Anderson},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {The Role of FPGAs in Deep Learning},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {3},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3030013},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LingA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuLXLCQG17,
author = {Yanqiang Liu and
Yao Li and
Weilun Xiong and
Meng Lai and
Cheng Chen and
Zhengwei Qi and
Haibing Guan},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Scala Based {FPGA} Design Flow (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {286},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021762},
timestamp = {Tue, 20 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiuLXLCQG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuZ17,
author = {Gai Liu and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Parallelized Iterative Improvement Approach to Area Optimization
for LUT-Based Technology Mapping},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {147--156},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021735},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiuZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LokeK17,
author = {Wei Ting Loke and
Chin Yang Koay},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic
Frequency Scaling Emulation (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {296},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021805},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LokeK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LotfiG17,
author = {Atieh Lotfi and
Rajesh K. Gupta},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {RxRE: Throughput Optimization for High-Level Synthesis using Resource-Aware
Regularity Extraction (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {294},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021797},
timestamp = {Mon, 05 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LotfiG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LuYYXLW17,
author = {Tianyi Lu and
Shouyi Yin and
Xianqing Yao and
Zhicong Xie and
Leibo Liu and
Shaojun Wei},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Joint Modulo Scheduling and Memory Partitioning with Multi-Bank Memory
for High-Level Synthesis (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {290},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021778},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LuYYXLW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LuinaudSL17,
author = {Thomas Luinaud and
Yvon Savaria and
J. M. Pierre Langlois},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {An {FPGA} Overlay Architecture for Cost Effective Regular Expression
Search (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {287--288},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021770},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LuinaudSL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MaCVS17,
author = {Yufei Ma and
Yu Cao and
Sarma B. K. Vrudhula and
Jae{-}sun Seo},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Optimizing Loop Operation and Dataflow in {FPGA} Acceleration of Deep
Convolutional Neural Networks},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {45--54},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021736},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/MaCVS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MaZC17,
author = {Xiaoyu Ma and
Dan Zhang and
Derek Chiou},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {FPGA-Accelerated Transactional Execution of Graph Workloads},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {227--236},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021743},
timestamp = {Wed, 07 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MaZC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MaoZHL17,
author = {Fubing Mao and
Wei Zhang and
Bingsheng He and
SiewKei Lam},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Dynamic Partitioning for Library based Placement on Heterogeneous
FPGAs (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {296},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021803},
timestamp = {Thu, 06 Apr 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/MaoZHL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NakaharaYIM17,
author = {Hiroki Nakahara and
Haruyoshi Yonekawa and
Hisashi Iwamoto and
Masato Motomura},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Batch Normalization Free Binarized Convolutional Deep Neural Network
on an {FPGA} (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {290},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021782},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/NakaharaYIM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NurvitadhiVSMHH17,
author = {Eriko Nurvitadhi and
Ganesh Venkatesh and
Jaewoong Sim and
Debbie Marr and
Randy Huang and
Jason Ong Gee Hock and
Yeong Tat Liew and
Krishnan Srivatsan and
Duncan J. M. Moss and
Suchit Subhaschandra and
Guy Boudoukh},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks?},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {5--14},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021740},
timestamp = {Wed, 11 Oct 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/NurvitadhiVSMHH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PezzottiINCVA17,
author = {Emanuele Pezzotti and
Alex Iacobucci and
Gregory Nash and
Umer I. Cheema and
Paolo Vinella and
Rashid Ansari},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {FPGA-based Hardware Accelerator for Image Reconstruction in Magnetic
Resonance Imaging (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {293},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021793},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PezzottiINCVA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RamanathanFWC17,
author = {Nadesh Ramanathan and
Shane T. Fleming and
John Wickerson and
George A. Constantinides},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Hardware Synthesis of Weakly Consistent {C} Concurrency},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {169--178},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021733},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RamanathanFWC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RodionovR17,
author = {Alex Rodionov and
Jonathan Rose},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Synchronization Constraints for Interconnect Synthesis},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {95--104},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021729},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RodionovR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RozhkoELCJ17,
author = {Daniel Rozhko and
Geoffrey Elliott and
Daniel Ly{-}Ma and
Paul Chow and
Hans{-}Arno Jacobsen},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Packet Matching on FPGAs Using {HMC} Memory: Towards One Million Rules},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {201--206},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021752},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RozhkoELCJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SalomonJ17,
author = {Ralf Salomon and
Ralf Joost},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Precise Coincidence Detection on FPGAs: Three Case Studies (Abstract
Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {287},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021766},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SalomonJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ShenFM17,
author = {Yongming Shen and
Michael Ferdman and
Peter A. Milder},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Storage-Efficient Batching for Minimizing Bandwidth of Fully-Connected
Neural Network Layers (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {293},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021795},
timestamp = {Mon, 22 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ShenFM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ShenL17,
author = {Minghua Shen and
Guojie Luo},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Corolla: GPU-Accelerated {FPGA} Routing Based on Subgraph Dynamic
Expansion},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {105--114},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021732},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ShenL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SiripurapuGGC17,
author = {Srinivas Siripurapu and
Aman Gayasen and
Padmini Gopalakrishnan and
Nitin Chandrachoodan},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{FPGA} Implementation of Non-Uniform {DFT} for Accelerating Wireless
Channel Simulations (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {295},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021800},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SiripurapuGGC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SoW17,
author = {Hayden Kwok{-}Hay So and
John Wawrzynek},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {OLAF'17: Third International Workshop on Overlay Architectures for
FPGAs},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {1},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3030012},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SoW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SrivastavaDMZ17,
author = {Nitish Kumar Srivastava and
Steve Dai and
Rajit Manohar and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Accelerating Face Detection on Programmable SoC Using C-Based Synthesis},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {195--200},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021753},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SrivastavaDMZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TarafdarLFBLC17,
author = {Naif Tarafdar and
Thomas Lin and
Eric Fukuda and
Hadi Bannazadeh and
Alberto Leon{-}Garcia and
Paul Chow},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Enabling Flexible Network {FPGA} Clusters in a Heterogeneous Cloud
Data Center},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {237--246},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021742},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TarafdarLFBLC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/UmurogluFGBLJV17,
author = {Yaman Umuroglu and
Nicholas J. Fraser and
Giulio Gambardella and
Michaela Blott and
Philip Heng Wai Leong and
Magnus Jahre and
Kees A. Vissers},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{FINN:} {A} Framework for Fast, Scalable Binarized Neural Network
Inference},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {65--74},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021744},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/UmurogluFGBLJV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/VenierisB17,
author = {Stylianos I. Venieris and
Christos{-}Savvas Bouganis},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {fpgaConvNet: Automated Mapping of Convolutional Neural Networks on
FPGAs (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {291--292},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021791},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/VenierisB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WangL17,
author = {Shuo Wang and
Yun Liang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Framework for Iterative Stencil Algorithm Synthesis on FPGAs from
OpenCL Programming Model (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {285--286},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021761},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/WangL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WellerOLBT17,
author = {Dennis Weller and
Fabian Oboril and
Dimitar Lukarski and
J{\"{u}}rgen Becker and
Mehdi Baradaran Tahoori},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Energy Efficient Scientific Computing on FPGAs using OpenCL},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {247--256},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021730},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/WellerOLBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WuWLDLJLL17,
author = {Haoyang Wu and
Tao Wang and
Zhiwei Li and
Boyan Ding and
Xiaoguang Li and
Tianfu Jiang and
Jun Liu and
Songwu Lu},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {{GRT} 2.0: An FPGA-based {SDR} Platform for Cognitive Radio Networks
(Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {294--295},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021798},
timestamp = {Thu, 23 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WuWLDLJLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/XuLZYLZ17,
author = {Chang Xu and
Gai Liu and
Ritchie Zhao and
Stephen Yang and
Guojie Luo and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Parallel Bandit-Based Approach for Autotuning {FPGA} Compilation},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {157--166},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021747},
timestamp = {Sun, 17 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/XuLZYLZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YangFWCAE17,
author = {Hsin{-}Jung Yang and
Kermin Fleming and
Felix Winterstein and
Annie I. Chen and
Michael Adler and
Joel S. Emer},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Automatic Construction of Program-Optimized {FPGA} Memory Networks},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {125--134},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021748},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YangFWCAE17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YazdanshenasTB17,
author = {Sadegh Yazdanshenas and
Kosuke Tatsumura and
Vaughn Betz},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Don't Forget the Memory: Automatic Block {RAM} Modelling, Optimization,
and Architecture Exploration},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {115--124},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021731},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YazdanshenasTB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YeG17,
author = {Andy Gean Ye and
Karthik Ganesan},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Measuring the Power-Constrained Performance and Energy Gap between
FPGAs and Processors (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {285},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021756},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YeG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YinLSLLW17,
author = {Shouyi Yin and
Dajiang Liu and
Lifeng Sun and
Xinhan Lin and
Leibo Liu and
Shaojun Wei},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Learning Convolutional Neural Networks for Data-Flow Graph Mapping
on Spatial Programmable Architectures (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {295},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021801},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YinLSLLW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhaZWL17,
author = {Yue Zha and
Jialiang Zhang and
Zhiqiang Wei and
Jing Li},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A Mixed-Signal Data-Centric Reconfigurable Architecture enabled by
{RRAM} Technology (Abstract Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {285},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021759},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ZhaZWL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangKL17,
author = {Jialiang Zhang and
Soroosh Khoram and
Jing Li},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Boosting the Performance of FPGA-based Graph Processor using Hybrid
Memory Cube: {A} Case for Breadth First Search},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {207--216},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021737},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ZhangKL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangL17,
author = {Jialiang Zhang and
Jing Li},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Improving the Performance of OpenCL-based {FPGA} Accelerator for Convolutional
Neural Network},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {25--34},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021698},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhangL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangP17,
author = {Chi Zhang and
Viktor K. Prasanna},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Frequency Domain Acceleration of Convolutional Neural Networks on
{CPU-FPGA} Shared Memory System},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {35--44},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021727},
timestamp = {Tue, 18 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhangP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhaoH17,
author = {Zhipeng Zhao and
James C. Hoe},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Using Vivado-HLS for Structural Design: a NoC Case Study (Abstract
Only)},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {289},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021772},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhaoH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhaoSZXLSGZ17,
author = {Ritchie Zhao and
Weinan Song and
Wentao Zhang and
Tianwei Xing and
Jeng{-}Hau Lin and
Mani B. Srivastava and
Rajesh Gupta and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Accelerating Binarized Convolutional Neural Networks with Software-Programmable
FPGAs},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {15--24},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021741},
timestamp = {Mon, 05 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhaoSZXLSGZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhouAZ17,
author = {Yuan Zhou and
Khalid Musa Al{-}Hawaj and
Zhiru Zhang},
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {A New Approach to Automatic Memory Banking using Trace-Based Address
Mining},
booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
pages = {179--188},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021734},
timestamp = {Fri, 03 Feb 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhouAZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2017,
editor = {Jonathan W. Greene and
Jason Helge Anderson},
title = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3020078},
doi = {10.1145/3020078},
isbn = {978-1-4503-4354-1},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
retrieved on 2024-05-23 19:50 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
