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@inproceedings{DBLP:conf/fmcad/ArbelRY09, author = {Eli Arbel and Oleg Rokhlenko and Karen Yorav}, title = {SAT-based synthesis of clock gating functions using 3-valued abstraction}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {198--204}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351118}, doi = {10.1109/FMCAD.2009.5351118}, timestamp = {Wed, 16 Oct 2019 14:14:56 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/ArbelRY09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BaumgartnerMCSY09, author = {Jason Baumgartner and Hari Mony and Michael L. Case and Jun Sawada and Karen Yorav}, title = {Scalable conditional equivalence checking: An automated invariant-generation based approach}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {120--127}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351131}, doi = {10.1109/FMCAD.2009.5351131}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/BaumgartnerMCSY09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BeyerCGKS09, author = {Dirk Beyer and Alessandro Cimatti and Alberto Griggio and M. Erkan Keremoglu and Roberto Sebastiani}, title = {Software model checking via large-block encoding}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {25--32}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351147}, doi = {10.1109/FMCAD.2009.5351147}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/BeyerCGKS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BinghamESA09, author = {Jesse D. Bingham and John Erickson and Gaurav Singh and Flemming Andersen}, title = {Industrial strength refinement checking}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {180--183}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351123}, doi = {10.1109/FMCAD.2009.5351123}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/BinghamESA09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BloemGHJ09, author = {Roderick Bloem and Karin Greimel and Thomas A. Henzinger and Barbara Jobstmann}, title = {Synthesizing robust systems}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {85--92}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351139}, doi = {10.1109/FMCAD.2009.5351139}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fmcad/BloemGHJ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BrilloutKW09, author = {Angelo Brillout and Daniel Kroening and Thomas Wahl}, title = {Mixed abstractions for floating-point arithmetic}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {69--76}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351141}, doi = {10.1109/FMCAD.2009.5351141}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/BrilloutKW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/BroekS09, author = {Tom van den Broek and Julien Schmaltz}, title = {Towards a formally verified network-on-chip}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {184--187}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351124}, doi = {10.1109/FMCAD.2009.5351124}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/BroekS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/CaseMBK09, author = {Michael L. Case and Hari Mony and Jason Baumgartner and Robert Kanzelman}, title = {Enhanced verification by temporal decomposition}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {17--24}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351146}, doi = {10.1109/FMCAD.2009.5351146}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/CaseMBK09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/ChakiGS09, author = {Sagar Chaki and Arie Gurfinkel and Ofer Strichman}, title = {Decision diagrams for linear arithmetic}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {53--60}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351143}, doi = {10.1109/FMCAD.2009.5351143}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fmcad/ChakiGS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/CimattiDJR09, author = {Alessandro Cimatti and Jori Dubrovin and Tommi A. Junttila and Marco Roveri}, title = {Structure-aware computation of predicate abstraction}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {9--16}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351149}, doi = {10.1109/FMCAD.2009.5351149}, timestamp = {Sun, 02 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/CimattiDJR09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/CookGMRSSV09, author = {Byron Cook and Ashutosh Gupta and Stephen Magill and Andrey Rybalchenko and Jir{\'{\i}} Simsa and Satnam Singh and Viktor Vafeiadis}, title = {Finding heap-bounds for hardware synthesis}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {205--212}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351120}, doi = {10.1109/FMCAD.2009.5351120}, timestamp = {Fri, 23 Aug 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/CookGMRSSV09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/DenmanATZP09, author = {William Denman and Behzad Akbarpour and Sofi{\`{e}}ne Tahar and Mohamed H. Zaki and Lawrence C. Paulson}, title = {Formal verification of analog designs using MetiTarski}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {93--100}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351136}, doi = {10.1109/FMCAD.2009.5351136}, timestamp = {Wed, 14 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fmcad/DenmanATZP09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/DeshmukhE09, author = {Jyotirmoy V. Deshmukh and E. Allen Emerson}, title = {Verification of recursive methods on tree-like data structures}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {33--40}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351144}, doi = {10.1109/FMCAD.2009.5351144}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/DeshmukhE09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/ErkokCW09, author = {Levent Erk{\"{o}}k and Magnus Carlsson and Adam Wick}, title = {Hardware/software co-verification of cryptographic algorithms using Cryptol}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {188--191}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351121}, doi = {10.1109/FMCAD.2009.5351121}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/ErkokCW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/GanaiI09, author = {Malay K. Ganai and Franjo Ivancic}, title = {Efficient decision procedure for non-linear arithmetic constraints using {CORDIC}}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {61--68}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351140}, doi = {10.1109/FMCAD.2009.5351140}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/GanaiI09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KailasPM09, author = {Krishnan Kailas and Viresh Paruthi and Brian Monwai}, title = {Formal verification of correctness and performance of random priority-based arbiters}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {101--107}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351137}, doi = {10.1109/FMCAD.2009.5351137}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/KailasPM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KengV09, author = {Brian Keng and Andreas G. Veneris}, title = {Scaling {VLSI} design debugging with interpolation}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {144--151}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351130}, doi = {10.1109/FMCAD.2009.5351130}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/KengV09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KhasidashviliGM09, author = {Zurab Khasidashvili and Gavriel Gavrielov and Tom Melham}, title = {Assume-guarantee validation for {STE} properties within an {SVA} environment}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {108--115}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351133}, doi = {10.1109/FMCAD.2009.5351133}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/KhasidashviliGM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KhasidashviliKB09, author = {Zurab Khasidashvili and Daher Kaiss and Doron Bustan}, title = {A compositional theory for post-reboot observational equivalence checking of hardware}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {136--143}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351129}, doi = {10.1109/FMCAD.2009.5351129}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/KhasidashviliKB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KhasidashviliKV09, author = {Zurab Khasidashvili and Mahmoud Kinanah and Andrei Voronkov}, title = {Verifying equivalence of memories using a first order logic theorem prover}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {128--135}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351132}, doi = {10.1109/FMCAD.2009.5351132}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/KhasidashviliKV09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/KonighoferHB09, author = {Robert K{\"{o}}nighofer and Georg Hofferek and Roderick Bloem}, title = {Debugging formal specifications using simple counterstrategies}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {152--159}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351127}, doi = {10.1109/FMCAD.2009.5351127}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fmcad/KonighoferHB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/MouraB09, author = {Leonardo Mendon{\c{c}}a de Moura and Nikolaj S. Bj{\o}rner}, title = {Generalized, efficient array decision procedures}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {45--52}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351142}, doi = {10.1109/FMCAD.2009.5351142}, timestamp = {Thu, 14 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/MouraB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/OLearyTT09, author = {John W. O'Leary and Murali Talupur and Mark R. Tuttle}, title = {Protocol verification using flows: An industrial experience}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {172--179}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351126}, doi = {10.1109/FMCAD.2009.5351126}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/OLearyTT09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/RayH09, author = {Sandip Ray and Warren A. Hunt Jr.}, title = {Connecting pre-silicon and post-silicon verification}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {160--163}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351128}, doi = {10.1109/FMCAD.2009.5351128}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/RayH09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/SharmaGMH09, author = {Subodh Sharma and Ganesh Gopalakrishnan and Eric Mercer and Jim Holt}, title = {{MCC:} {A} runtime verification tool for {MCAPI} user applications}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {41--44}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351145}, doi = {10.1109/FMCAD.2009.5351145}, timestamp = {Mon, 04 Nov 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fmcad/SharmaGMH09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/SohailS09, author = {Saqib Sohail and Fabio Somenzi}, title = {Safety first: {A} two-stage algorithm for {LTL} games}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {77--84}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351138}, doi = {10.1109/FMCAD.2009.5351138}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/SohailS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/Tverdyshev09, author = {Sergey Tverdyshev}, title = {A verified platform for a gate-level electronic control unit}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {164--171}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351125}, doi = {10.1109/FMCAD.2009.5351125}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/Tverdyshev09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/VizelG09, author = {Yakir Vizel and Orna Grumberg}, title = {Interpolation-sequence based model checking}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {1--8}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351148}, doi = {10.1109/FMCAD.2009.5351148}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/VizelG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/Zhou09, author = {Hai Zhou}, title = {Retiming and resynthesis with sweep are complete for sequential transformation}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {192--197}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351122}, doi = {10.1109/FMCAD.2009.5351122}, timestamp = {Wed, 16 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/Zhou09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fmcad/ZhuHHSG09, author = {He Zhu and Fei He and William N. N. Hung and Xiaoyu Song and Ming Gu}, title = {Data mining based decomposition for assume-guarantee reasoning}, booktitle = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, pages = {116--119}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FMCAD.2009.5351134}, doi = {10.1109/FMCAD.2009.5351134}, timestamp = {Mon, 21 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/ZhuHHSG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/fmcad/2009, title = {Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, {FMCAD} 2009, 15-18 November 2009, Austin, Texas, {USA}}, publisher = {{IEEE}}, year = {2009}, url = {https://ieeexplore.ieee.org/xpl/conhome/5344684/proceeding}, isbn = {978-1-4244-4966-8}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fmcad/2009.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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