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@book{DBLP:series/synthesis-cac/AgrawalJ23,
  author       = {Rashmi Agrawal and
                  Ajay Joshi},
  title        = {On Architecting Fully Homomorphic Encryption-based Computing Systems},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Springer},
  year         = {2023},
  url          = {https://doi.org/10.1007/978-3-031-31754-5},
  doi          = {10.1007/978-3-031-31754-5},
  isbn         = {978-3-031-31753-8},
  timestamp    = {Fri, 03 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/series/synthesis-cac/AgrawalJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2021Fujiki,
  author       = {Daichi Fujiki and
                  Xiaowei Wang and
                  Arun Subramaniyan and
                  Reetuparna Das},
  title        = {In-/Near-Memory Computing},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2021},
  url          = {https://doi.org/10.2200/S01109ED1V01Y202106CAC057},
  doi          = {10.2200/S01109ED1V01Y202106CAC057},
  isbn         = {978-3-031-00644-9},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/series/synthesis/2021Fujiki.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2021LiuWYW,
  author       = {Shaoshan Liu and
                  Zishen Wan and
                  Bo Yu and
                  Yu Wang},
  title        = {Robotic Computing on FPGAs},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2021},
  url          = {https://doi.org/10.2200/S01101ED1V01Y202105CAC056},
  doi          = {10.2200/S01101ED1V01Y202105CAC056},
  isbn         = {978-3-031-00643-2},
  timestamp    = {Tue, 26 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/series/synthesis/2021LiuWYW.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020ChenPJ,
  author       = {Lizhong Chen and
                  Drew Penney and
                  Daniel Jim{\'{e}}nez},
  title        = {{AI} for Computer Architecture: Principles, Practice, and Prospects},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01052ED1V01Y202009CAC055},
  doi          = {10.2200/S01052ED1V01Y202009CAC055},
  isbn         = {978-3-031-00642-5},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020ChenPJ.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020DingC,
  author       = {Yongshan Ding and
                  Frederic T. Chong},
  title        = {Quantum Computer Systems: Research for Noisy Intermediate-Scale Quantum
                  Computers},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01014ED1V01Y202005CAC051},
  doi          = {10.2200/S01014ED1V01Y202005CAC051},
  isbn         = {978-3-031-00637-1},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020DingC.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020Krishna,
  author       = {Tushar Krishna and
                  Hyoukjun Kwon and
                  Angshuman Parashar and
                  Michael Pellauer and
                  Ananda Samajdar},
  title        = {Data Orchestration in Deep Learning Accelerators},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01015ED1V01Y202005CAC052},
  doi          = {10.2200/S01015ED1V01Y202005CAC052},
  isbn         = {978-3-031-00639-5},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020Krishna.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020Kuhn,
  author       = {Robert H. Kuhn and
                  David A. Padua},
  title        = {Parallel Processing, 1980 to 2020},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01049ED1V01Y202009CAC054},
  doi          = {10.2200/S01049ED1V01Y202009CAC054},
  isbn         = {978-3-031-00640-1},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020Kuhn.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020Nagarajan,
  author       = {Vijay Nagarajan and
                  Daniel J. Sorin and
                  Mark D. Hill and
                  David A. Wood},
  title        = {A Primer on Memory Consistency and Cache Coherence, Second Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S00962ED2V01Y201910CAC049},
  doi          = {10.2200/S00962ED2V01Y201910CAC049},
  isbn         = {978-3-031-00636-4},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020Nagarajan.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020Rodriguez,
  author       = {Andres Rodriguez},
  title        = {Deep Learning Systems: Algorithms, Compilers, and Processors for Large-Scale
                  Production},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01046ED1V01Y202009CAC053},
  doi          = {10.2200/S01046ED1V01Y202009CAC053},
  isbn         = {978-3-031-00641-8},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020Rodriguez.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2020Sze,
  author       = {Vivienne Sze and
                  Yu{-}Hsin Chen and
                  Tien{-}Ju Yang and
                  Joel S. Emer},
  title        = {Efficient Processing of Deep Neural Networks},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2020},
  url          = {https://doi.org/10.2200/S01004ED1V01Y202004CAC050},
  doi          = {10.2200/S01004ED1V01Y202004CAC050},
  isbn         = {978-3-031-00638-8},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2020Sze.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2019Balasubramonian,
  author       = {Rajeev Balasubramonian},
  title        = {Innovations in the Memory System},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2019},
  url          = {https://doi.org/10.2200/S00933ED1V01Y201906CAC048},
  doi          = {10.2200/S00933ED1V01Y201906CAC048},
  isbn         = {978-3-031-00635-7},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2019Balasubramonian.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2019Jain,
  author       = {Akanksha Jain and
                  Calvin Lin},
  title        = {Cache Replacement Policies},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2019},
  url          = {https://doi.org/10.2200/S00922ED1V01Y201905CAC047},
  doi          = {10.2200/S00922ED1V01Y201905CAC047},
  isbn         = {978-3-031-00634-0},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2019Jain.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2018Aamodt,
  author       = {Tor M. Aamodt and
                  Wilson Wai Lun Fung and
                  Timothy G. Rogers},
  title        = {General-Purpose Graphics Processor Architectures},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2018},
  url          = {https://doi.org/10.2200/S00848ED1V01Y201804CAC044},
  doi          = {10.2200/S00848ED1V01Y201804CAC044},
  isbn         = {978-3-031-00631-9},
  timestamp    = {Sat, 28 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2018Aamodt.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2018Barroso,
  author       = {Luiz Andr{\'{e}} Barroso and
                  Urs H{\"{o}}lzle and
                  Parthasarathy Ranganathan},
  title        = {The Datacenter as a Computer: Designing Warehouse-Scale Machines,
                  Third Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2018},
  url          = {https://doi.org/10.2200/S00874ED3V01Y201809CAC046},
  doi          = {10.2200/S00874ED3V01Y201809CAC046},
  isbn         = {978-3-031-00633-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2018Barroso.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2018Bell,
  author       = {Steven Bell and
                  Jing Pu and
                  James Hegarty and
                  Mark Horowitz},
  title        = {Compiling Algorithms for Heterogeneous Systems},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2018},
  url          = {https://doi.org/10.2200/S00816ED1V01Y201711CAC043},
  doi          = {10.2200/S00816ED1V01Y201711CAC043},
  isbn         = {978-3-031-00055-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2018Bell.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2018Szefer,
  author       = {Jakub Szefer},
  title        = {Principles of Secure Processor Architecture Design},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2018},
  url          = {https://doi.org/10.2200/S00864ED1V01Y201807CAC045},
  doi          = {10.2200/S00864ED1V01Y201807CAC045},
  isbn         = {978-3-031-00632-6},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2018Szefer.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2017Bhattacharjee,
  author       = {Abhishek Bhattacharjee and
                  Daniel Lustig},
  title        = {Architectural and Operating System Support for Virtual Memory},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2017},
  url          = {https://doi.org/10.2200/S00795ED1V01Y201708CAC042},
  doi          = {10.2200/S00795ED1V01Y201708CAC042},
  isbn         = {978-3-031-00629-6},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2017Bhattacharjee.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2017Bugnion,
  author       = {Edouard Bugnion and
                  Jason Nieh and
                  Dan Tsafrir},
  title        = {Hardware and Software Support for Virtualization},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2017},
  url          = {https://doi.org/10.2200/S00754ED1V01Y201701CAC038},
  doi          = {10.2200/S00754ED1V01Y201701CAC038},
  isbn         = {978-3-031-00625-8},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2017Bugnion.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2017Jerger,
  author       = {Natalie D. Enright Jerger and
                  Tushar Krishna and
                  Li{-}Shiuan Peh},
  title        = {On-Chip Networks, Second Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2017},
  url          = {https://doi.org/10.2200/S00772ED1V01Y201704CAC040},
  doi          = {10.2200/S00772ED1V01Y201704CAC040},
  isbn         = {978-3-031-00627-2},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2017Jerger.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2017Reagen,
  author       = {Brandon Reagen and
                  Robert Adolf and
                  Paul N. Whatmough and
                  Gu{-}Yeon Wei and
                  David M. Brooks},
  title        = {Deep Learning for Computer Architects},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2017},
  url          = {https://doi.org/10.2200/S00783ED1V01Y201706CAC041},
  doi          = {10.2200/S00783ED1V01Y201706CAC041},
  isbn         = {978-3-031-00628-9},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2017Reagen.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2017Smith,
  author       = {James E. Smith},
  title        = {Space-Time Computing with Temporal Neural Networks},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2017},
  url          = {https://doi.org/10.2200/S00771ED1V01Y201704CAC039},
  doi          = {10.2200/S00771ED1V01Y201704CAC039},
  isbn         = {978-3-031-00626-5},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2017Smith.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2016Lee,
  author       = {Benjamin C. Lee},
  title        = {Datacenter Design and Management: {A} Computer Architect's Perspective},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2016},
  url          = {https://doi.org/10.2200/S00693ED1V01Y201601CAC037},
  doi          = {10.2200/S00693ED1V01Y201601CAC037},
  isbn         = {978-3-031-00624-1},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2016Lee.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Bordawekar,
  author       = {Rajesh Bordawekar and
                  Bob Blainey and
                  Ruchir Puri},
  title        = {Analyzing Analytics},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00678ED1V01Y201511CAC035},
  doi          = {10.2200/S00678ED1V01Y201511CAC035},
  isbn         = {978-3-031-00621-0},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Bordawekar.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Chen,
  author       = {Yu{-}Ting Chen and
                  Jason Cong and
                  Michael Gill and
                  Glenn Reinman and
                  Bingjun Xiao},
  title        = {Customizable Computing},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00650ED1V01Y201505CAC033},
  doi          = {10.2200/S00650ED1V01Y201505CAC033},
  isbn         = {978-3-031-00620-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Chen.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Hughes,
  author       = {Christopher J. Hughes},
  title        = {Single-Instruction Multiple-Data Execution},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00647ED1V01Y201505CAC032},
  doi          = {10.2200/S00647ED1V01Y201505CAC032},
  isbn         = {978-3-031-00618-0},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Hughes.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Sardashti,
  author       = {Somayeh Sardashti and
                  Angelos Arelakis and
                  Per Stenstr{\"{o}}m and
                  David A. Wood},
  title        = {A Primer on Compression in the Memory Hierarchy},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00683ED1V01Y201511CAC036},
  doi          = {10.2200/S00683ED1V01Y201511CAC036},
  isbn         = {978-3-031-00623-4},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Sardashti.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Shao,
  author       = {Yakun Sophia Shao and
                  David M. Brooks},
  title        = {Research Infrastructures for Hardware Accelerators},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00677ED1V01Y201511CAC034},
  doi          = {10.2200/S00677ED1V01Y201511CAC034},
  isbn         = {978-3-031-00622-7},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Shao.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2015Xie,
  author       = {Yuan Xie and
                  Jishen Zhao},
  title        = {Die-stacking Architecture},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2015},
  url          = {https://doi.org/10.2200/S00644ED1V01Y201505CAC031},
  doi          = {10.2200/S00644ED1V01Y201505CAC031},
  isbn         = {978-3-031-00619-7},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2015Xie.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2014Angepat,
  author       = {Hari Angepat and
                  Derek Chiou and
                  Eric S. Chung and
                  James C. Hoe},
  title        = {FPGA-Accelerated Simulation of Computer Systems},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2014},
  url          = {https://doi.org/10.2200/S00586ED1V01Y201407CAC029},
  doi          = {10.2200/S00586ED1V01Y201407CAC029},
  isbn         = {978-3-031-00616-6},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2014Angepat.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2014Falsafi,
  author       = {Babak Falsafi and
                  Thomas F. Wenisch},
  title        = {A Primer on Hardware Prefetching},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2014},
  url          = {https://doi.org/10.2200/S00581ED1V01Y201405CAC028},
  doi          = {10.2200/S00581ED1V01Y201405CAC028},
  isbn         = {978-3-031-00615-9},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2014Falsafi.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2014Sjalander,
  author       = {Magnus Sj{\"{a}}lander and
                  Margaret Martonosi and
                  Stefanos Kaxiras},
  title        = {Power-Efficient Computer Architectures: Recent Advances},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2014},
  url          = {https://doi.org/10.2200/S00611ED1V01Y201411CAC030},
  doi          = {10.2200/S00611ED1V01Y201411CAC030},
  isbn         = {978-3-031-00617-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2014Sjalander.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Barroso,
  author       = {Luiz Andr{\'{e}} Barroso and
                  Jimmy Clidaras and
                  Urs H{\"{o}}lzle},
  title        = {The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale
                  Machines, Second Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00516ED2V01Y201306CAC024},
  doi          = {10.2200/S00516ED2V01Y201306CAC024},
  isbn         = {9781627050098},
  timestamp    = {Mon, 23 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Barroso.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Lee,
  author       = {Ruby B. Lee},
  title        = {Security Basics for Computer Architects},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00512ED1V01Y201305CAC025},
  doi          = {10.2200/S00512ED1V01Y201305CAC025},
  isbn         = {9781627051552},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Lee.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Nemirovsky,
  author       = {Mario Nemirovsky and
                  Dean M. Tullsen},
  title        = {Multithreading Architecture},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00458ED1V01Y201212CAC021},
  doi          = {10.2200/S00458ED1V01Y201212CAC021},
  isbn         = {9781608458554},
  timestamp    = {Sat, 28 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Nemirovsky.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Nitta,
  author       = {Christopher Nitta and
                  Matthew K. Farrens},
  title        = {Photonic Interconnects: {A} Computer Architect's Perspective},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00537ED1V01Y201309CAC027},
  doi          = {10.2200/S00537ED1V01Y201309CAC027},
  isbn         = {9781627052115},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Nitta.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Reddi,
  author       = {Vijay Janapa Reddi and
                  Meeta Sharma Gupta},
  title        = {Resilient Architecture Design for Voltage Variation},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00486ED1V01Y201303CAC022},
  doi          = {10.2200/S00486ED1V01Y201303CAC022},
  isbn         = {9781608456376},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Reddi.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Sankaralingam,
  author       = {Tony Nowatzki and
                  Michael C. Ferris and
                  Karu Sankaralingam and
                  Cristian Estan and
                  Nilay Vaish and
                  David A. Wood},
  title        = {Optimization and Mathematical Modeling in Computer Architecture},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00531ED1V01Y201308CAC026},
  doi          = {10.2200/S00531ED1V01Y201308CAC026},
  isbn         = {9781627052092},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Sankaralingam.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2013Scott,
  author       = {Michael L. Scott},
  title        = {Shared-Memory Synchronization},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2013},
  url          = {https://doi.org/10.2200/S00499ED1V01Y201304CAC023},
  doi          = {10.2200/S00499ED1V01Y201304CAC023},
  isbn         = {9781608459568},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2013Scott.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2012Kim,
  author       = {Hyesoon Kim and
                  Richard W. Vuduc and
                  Sara S. Baghsorkhi and
                  JeeWhan Choi and
                  Wen{-}mei W. Hwu},
  title        = {Performance Analysis and Tuning for General Purpose Graphics Processing
                  Units {(GPGPU)}},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2012},
  url          = {https://doi.org/10.2200/S00451ED1V01Y201209CAC020},
  doi          = {10.2200/S00451ED1V01Y201209CAC020},
  isbn         = {978-3-031-00609-8},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2012Kim.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2012Midkiff,
  author       = {Samuel P. Midkiff},
  title        = {Automatic Parallelization: An Overview of Fundamental Compiler Techniques},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2012},
  url          = {https://doi.org/10.2200/S00340ED1V01Y201201CAC019},
  doi          = {10.2200/S00340ED1V01Y201201CAC019},
  isbn         = {978-3-031-00608-1},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2012Midkiff.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Abts,
  author       = {Dennis Abts and
                  John Kim},
  title        = {High Performance Datacenter Networks: Architectures, Algorithms, and
                  Opportunities},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00341ED1V01Y201103CAC014},
  doi          = {10.2200/S00341ED1V01Y201103CAC014},
  isbn         = {978-3-031-00602-9},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Abts.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Balasubramonian,
  author       = {Rajeev Balasubramonian and
                  Norman P. Jouppi and
                  Naveen Muralimanohar},
  title        = {Multi-Core Cache Hierarchies},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00365ED1V01Y201105CAC017},
  doi          = {10.2200/S00365ED1V01Y201105CAC017},
  isbn         = {978-3-031-00606-7},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Balasubramonian.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Hazelwood,
  author       = {Kim M. Hazelwood},
  title        = {Dynamic Binary Modification: Tools, Techniques, and Applications},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00345ED1V01Y201104CAC015},
  doi          = {10.2200/S00345ED1V01Y201104CAC015},
  isbn         = {978-3-031-00604-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Hazelwood.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Metodi,
  author       = {Tzvetan S. Metodi and
                  Arvin I. Faruque and
                  Frederic T. Chong},
  title        = {Quantum Computing for Computer Architects, Second Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00331ED1V01Y201101CAC013},
  doi          = {10.2200/S00331ED1V01Y201101CAC013},
  isbn         = {978-3-031-00603-6},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Metodi.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Qureshi,
  author       = {Moinuddin K. Qureshi and
                  Sudhanva Gurumurthi and
                  Bipin Rajendran},
  title        = {Phase Change Memory: From Devices to Systems},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00381ED1V01Y201109CAC018},
  doi          = {10.2200/S00381ED1V01Y201109CAC018},
  isbn         = {978-3-031-00607-4},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Qureshi.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2011Sorin,
  author       = {Daniel J. Sorin and
                  Mark D. Hill and
                  David A. Wood},
  title        = {A Primer on Memory Consistency and Cache Coherence},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2011},
  url          = {https://doi.org/10.2200/S00346ED1V01Y201104CAC016},
  doi          = {10.2200/S00346ED1V01Y201104CAC016},
  isbn         = {978-3-031-01733-9},
  timestamp    = {Mon, 23 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2011Sorin.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2010Eeckhout,
  author       = {Lieven Eeckhout},
  title        = {Computer Architecture Performance Evaluation Methods},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2010},
  url          = {https://doi.org/10.2200/S00273ED1V01Y201006CAC010},
  doi          = {10.2200/S00273ED1V01Y201006CAC010},
  isbn         = {978-3-031-00599-2},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2010Eeckhout.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2010Gonzalez,
  author       = {Antonio Gonz{\'{a}}lez and
                  Fernando Latorre and
                  Grigorios Magklis},
  title        = {Processor Microarchitecture: An Implementation Perspective},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2010},
  url          = {https://doi.org/10.2200/S00309ED1V01Y201011CAC012},
  doi          = {10.2200/S00309ED1V01Y201011CAC012},
  isbn         = {978-3-031-00601-2},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2010Gonzalez.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2010Harris,
  author       = {Tim Harris and
                  James R. Larus and
                  Ravi Rajwar},
  title        = {Transactional Memory, 2nd Edition},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2010},
  url          = {https://doi.org/10.2200/S00272ED1V01Y201006CAC011},
  doi          = {10.2200/S00272ED1V01Y201006CAC011},
  isbn         = {978-3-031-00600-5},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2010Harris.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2009Barroso,
  author       = {Luiz Andr{\'{e}} Barroso and
                  Urs H{\"{o}}lzle},
  title        = {The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale
                  Machines},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2009},
  url          = {https://doi.org/10.2200/S00193ED1V01Y200905CAC006},
  doi          = {10.2200/S00193ED1V01Y200905CAC006},
  isbn         = {978-3-031-01722-3},
  timestamp    = {Mon, 23 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2009Barroso.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2009Jacob,
  author       = {Bruce L. Jacob},
  title        = {The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't
                  Fake It},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2009},
  url          = {https://doi.org/10.2200/S00201ED1V01Y200907CAC007},
  doi          = {10.2200/S00201ED1V01Y200907CAC007},
  isbn         = {978-3-031-00596-1},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2009Jacob.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2009Jerger,
  author       = {Natalie D. Enright Jerger and
                  Li{-}Shiuan Peh},
  title        = {On-Chip Networks},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2009},
  url          = {https://doi.org/10.2200/S00209ED1V01Y200907CAC008},
  doi          = {10.2200/S00209ED1V01Y200907CAC008},
  isbn         = {978-3-031-01725-4},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2009Jerger.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2009Lanzagorta,
  author       = {Marco Lanzagorta and
                  Stephen Bique and
                  Robert Rosenberg},
  title        = {Introduction to Reconfigurable Supercomputing},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2009},
  url          = {https://doi.org/10.2200/S00238ED1V01Y200911CAC009},
  doi          = {10.2200/S00238ED1V01Y200911CAC009},
  isbn         = {978-3-031-00598-5},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2009Lanzagorta.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2009Sorin,
  author       = {Daniel J. Sorin},
  title        = {Fault Tolerant Computer Architecture},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2009},
  url          = {https://doi.org/10.2200/S00192ED1V01Y200904CAC005},
  doi          = {10.2200/S00192ED1V01Y200904CAC005},
  isbn         = {978-3-031-00595-4},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2009Sorin.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2008Kaxiras,
  author       = {Stefanos Kaxiras and
                  Margaret Martonosi},
  title        = {Computer Architecture Techniques for Power-Efficiency},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2008},
  url          = {https://doi.org/10.2200/S00119ED1V01Y200805CAC004},
  doi          = {10.2200/S00119ED1V01Y200805CAC004},
  isbn         = {978-3-031-00593-0},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2008Kaxiras.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2007Olukotun,
  author       = {Kunle Olukotun and
                  Lance Hammond and
                  James Laudon},
  title        = {iChip Multiprocessor Architecture: Techniques to Improve Throughput
                  and Latency},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2007},
  url          = {https://doi.org/10.2200/S00093ED1V01Y200707CAC003},
  doi          = {10.2200/S00093ED1V01Y200707CAC003},
  isbn         = {978-3-031-00592-3},
  timestamp    = {Thu, 19 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2007Olukotun.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2006Larus,
  author       = {James R. Larus and
                  Ravi Rajwar},
  title        = {Transactional Memory},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2006},
  url          = {https://doi.org/10.2200/S00070ED1V01Y200611CAC002},
  doi          = {10.2200/S00070ED1V01Y200611CAC002},
  isbn         = {978-3-031-01719-3},
  timestamp    = {Mon, 23 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2006Larus.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/synthesis/2006Metodi,
  author       = {Tzvetan S. Metodi and
                  Frederic T. Chong},
  title        = {Quantum Computing for Computer Architects},
  series       = {Synthesis Lectures on Computer Architecture},
  publisher    = {Morgan {\&} Claypool Publishers},
  year         = {2006},
  url          = {https://doi.org/10.2200/S00066ED1V01Y200610CAC001},
  doi          = {10.2200/S00066ED1V01Y200610CAC001},
  isbn         = {978-3-031-01718-6},
  timestamp    = {Mon, 23 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/synthesis/2006Metodi.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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