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@inproceedings{DBLP:conf/isss/AraujoMHM02,
  author       = {Guido Araujo and
                  Sharad Malik and
                  Zhining Huang and
                  Nahri Moreano},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Datapath Merging and Interconnection Sharing for Reconfigurable Architectures},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {38--43},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227149},
  doi          = {10.1109/ISSS.2002.1227149},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/AraujoMHM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BagherzadehCL02,
  author       = {Nader Bagherzadeh and
                  Pai H. Chou and
                  Jinfeng Liu},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Combined Functional Partitioning and Communication Speed Selection
                  for Networked Voltage-Scalable Processors},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {14--19},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227145},
  doi          = {10.1109/ISSS.2002.1227145},
  timestamp    = {Tue, 11 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/BagherzadehCL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanKIGM02,
  author       = {M. Balakrishnan and
                  Anshul Kumar and
                  Paolo Ienne and
                  Anup Gangwar and
                  Bhuvan Middha},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Trimaran Based Framework for Exploring the Design Space of {VLIW}
                  ASIPs with Coarse Grain Functional Units},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {2--7},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227143},
  doi          = {10.1109/ISSS.2002.1227143},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BalakrishnanKIGM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanKJ02,
  author       = {M. Balakrishnan and
                  Anshul Kumar and
                  C. P. Joshi},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A New Performance Evaluation Approach for System Level Design Space
                  Exploration},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {180--185},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227174},
  doi          = {10.1109/ISSS.2002.1227174},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BalakrishnanKJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanMWGBS02,
  author       = {M. Balakrishnan and
                  Peter Marwedel and
                  Lars Wehmeyer and
                  Nils Grunwald and
                  Rajeshwari Banakar and
                  Stefan Steinke},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Reducing Energy Consumption by Dynamic Copying of Instructions onto
                  Onchip Memory},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {213--218},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227180},
  doi          = {10.1109/ISSS.2002.1227180},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BalakrishnanMWGBS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BringmannRM02,
  author       = {Oliver Bringmann and
                  Wolfgang Rosenstiel and
                  Carsten Menn},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Controller Estimation for {FPGA} Target Architectures during High-Level
                  Synthesis},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {56--61},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227152},
  doi          = {10.1109/ISSS.2002.1227152},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BringmannRM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CassidyATP02,
  author       = {Andrew S. Cassidy and
                  Christopher P. Andrews and
                  Donald E. Thomas and
                  JoAnn M. Paul},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {System-Level Modeling of a Network Switch SoC},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {62--67},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1145/581199.581215},
  doi          = {10.1145/581199.581215},
  timestamp    = {Wed, 21 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CassidyATP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChatterjeeEMPCP02,
  author       = {Abhijit Chatterjee and
                  Peeter Ellervee and
                  Vincent John Mooney III and
                  Jun{-}Cheol Park and
                  Kyu{-}won Choi and
                  Kiran Puttaswamy},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {System Level Power-Performance Trade-Offs in Embedded Systems Using
                  Voltage and Frequency Scaling of Off-Chip Buses and Memory},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {225--230},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227182},
  doi          = {10.1109/ISSS.2002.1227182},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChatterjeeEMPCP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DomerGM02,
  author       = {Rainer D{\"{o}}mer and
                  Andreas Gerstlauer and
                  Wolfgang M{\"{u}}ller},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {The Formal Execution Semantics of SpecC},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {150--155},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227168},
  doi          = {10.1109/ISSS.2002.1227168},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DomerGM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DuttHM02,
  author       = {Nikil D. Dutt and
                  Daniel S. Hirschberg and
                  Mahesh Mamidipaka},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Efficient Power Reduction Techniques for Time Multiplexed Address
                  Buses},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {207--212},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227179},
  doi          = {10.1109/ISSS.2002.1227179},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DuttHM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ElesPK02,
  author       = {Petru Eles and
                  Zebo Peng and
                  Daniel Karlsson},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Formal Verification in a Component-Based Reuse Methodology},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {156--161},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227169},
  doi          = {10.1109/ISSS.2002.1227169},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ElesPK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FornaciariTBSSB02,
  author       = {William Fornaciari and
                  Vito Trianni and
                  Carlo Brandolese and
                  Donatella Sciuto and
                  Fabio Salice and
                  Giovanni Beltrame},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Modeling Assembly Instruction Timing in Superscalar Architectures},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {132--137},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227165},
  doi          = {10.1109/ISSS.2002.1227165},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FornaciariTBSSB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GajskiG02,
  author       = {Daniel Gajski and
                  Andreas Gerstlauer},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {System-Level Abstraction Semantics},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {231--236},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227183},
  doi          = {10.1109/ISSS.2002.1227183},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GajskiG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GajskiP02,
  author       = {Daniel Gajski and
                  Junyu Peng},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Optimal Message-Passing for Data Coherency in Distributed Architecture},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {20--25},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227146},
  doi          = {10.1109/ISSS.2002.1227146},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GajskiP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Gebotys02,
  author       = {Catherine H. Gebotys},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Security-Driven Exploration of Cryptography in {DSP} Cores},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {80--85},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227156},
  doi          = {10.1109/ISSS.2002.1227156},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Gebotys02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GuptaSS02,
  author       = {Rajesh K. Gupta and
                  Sandeep K. Shukla and
                  Nick Savoiu},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Efficient Simulation of Synthesis-Oriented System Level Designs},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {168--173},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227171},
  doi          = {10.1109/ISSS.2002.1227171},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GuptaSS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HaKRJYK02,
  author       = {Soonhoi Ha and
                  Sungchan Kim and
                  Chan{-}Eun Rhee and
                  Hyunguk Jung and
                  Youngmin Yi and
                  Dohyung Kim},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Virtual Synchronization for Fast Distributed Cosimulation of Dataflow
                  Task Graphs},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {174--179},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227172},
  doi          = {10.1109/ISSS.2002.1227172},
  timestamp    = {Fri, 15 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HaKRJYK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/IenneTMW02,
  author       = {Paolo Ienne and
                  Patrick Thiran and
                  Giovanni De Micheli and
                  Frederic Worm},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {An Adaptive Low-Power Transmission Scheme for On-Chip Networks},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {92--100},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227158},
  doi          = {10.1109/ISSS.2002.1227158},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/IenneTMW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JerrayaLMRG02,
  author       = {Ahmed Amine Jerraya and
                  Damien Lyonnard and
                  Samy Meftali and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  Ferid Gharsalli},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Unifying Memory and Processor Wrapper Architecture in Multiprocessor
                  SoC Design},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {26--31},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227147},
  doi          = {10.1109/ISSS.2002.1227147},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JerrayaLMRG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JerrayaYBN02,
  author       = {Ahmed Amine Jerraya and
                  Sungjoo Yoo and
                  Aimen Bouchhima and
                  Gabriela Nicolescu},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Validation in a Component-Based Design Flow for Multicore SoCs},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {162--167},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227170},
  doi          = {10.1109/ISSS.2002.1227170},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JerrayaYBN02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Kock02,
  author       = {Erwin A. de Kock},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Multiprocessor Mapping of Process Networks: {A} {JPEG} Decoding Case
                  Study},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {68--73},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227154},
  doi          = {10.1109/ISSS.2002.1227154},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Kock02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LauwereinsWMVDHCY02,
  author       = {Rudy Lauwereins and
                  Chun Wong and
                  Paul Marchal and
                  Johan Vounckx and
                  Patrick David and
                  Stefaan Himpe and
                  Francky Catthoor and
                  Peng Yang},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia
                  Systems},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {112--119},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227162},
  doi          = {10.1109/ISSS.2002.1227162},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LauwereinsWMVDHCY02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LavagnoLQNPC02,
  author       = {Luciano Lavagno and
                  Mihai T. Lazarescu and
                  Stefano Quer and
                  Sergio Nocco and
                  Claudio Passerone and
                  Gianpiero Cabodi},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Symbolic Approach for the Combined Solution of Scheduling and Allocation},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {237--242},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227184},
  doi          = {10.1109/ISSS.2002.1227184},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LavagnoLQNPC02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LekatsasWX02,
  author       = {Haris Lekatsas and
                  Wayne H. Wolf and
                  Yuan Xie},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Code Compression for {VLIW} Processors Using Variable-to-Fixed Coding},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {138--143},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227166},
  doi          = {10.1109/ISSS.2002.1227166},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LekatsasWX02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LopezRMM02,
  author       = {Juan Carlos L{\'{o}}pez and
                  Fernando Rinc{\'{o}}n and
                  Francisco Moya and
                  Jos{\'{e}} Manuel Moya},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Improving Embedded System Design by Means of {HW-SW} Compilation on
                  Reconfigurable Coprocessors},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {255--260},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227187},
  doi          = {10.1109/ISSS.2002.1227187},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LopezRMM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Matsushita02,
  author       = {Satoshi Matsushita},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Design Experience of a Chip Multiprocessor Merlot and Expectation
                  to Functional Verification},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {103--108},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227160},
  doi          = {10.1109/ISSS.2002.1227160},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Matsushita02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MooneyRS02,
  author       = {Vincent John Mooney III and
                  George F. Riley and
                  Eung S. Shin},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Round-Robin Arbiter Design and Generation},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {243--248},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227185},
  doi          = {10.1109/ISSS.2002.1227185},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MooneyRS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/NakataMSKZ02,
  author       = {Tsuneo Nakata and
                  Akio Matsuda and
                  Minoru Shoji and
                  Shinya Kuwamura and
                  Qiang Zhu},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {An Object-Oriented Design Process for System-on-Chip Using {UML}},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {249--254},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227186},
  doi          = {10.1109/ISSS.2002.1227186},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/NakataMSKZ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/NicolauDGSRG02,
  author       = {Alexandru Nicolau and
                  Nikil D. Dutt and
                  Rajesh Gupta and
                  Nick Savoiu and
                  Mehrdad Reshadi and
                  Sumit Gupta},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Dynamic Common Sub-Expression Elimination during Scheduling in High-Level
                  Synthesis},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {261--266},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227188},
  doi          = {10.1109/ISSS.2002.1227188},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/NicolauDGSRG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/NicolauDSBH02,
  author       = {Alexandru Nicolau and
                  Nikil D. Dutt and
                  Aviral Shrivastava and
                  Partha Biswas and
                  Ashok Halambi},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Design Space Exploration Framework for Reduced Bit-Width Instruction
                  Set Architecture (rISA) Design},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {120--125},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227163},
  doi          = {10.1109/ISSS.2002.1227163},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/NicolauDSBH02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/OnoyeNSCTIY02,
  author       = {Takao Onoye and
                  Yukihiro Nakamura and
                  Atsuhito Shigiya and
                  Keishi Chikamura and
                  Kosuke Tsujino and
                  Tomonori Izumi and
                  Hirofumi Yamamoto},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {System-Level Design of {IEEE1394} Bus Segment Bridge},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {74--79},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227155},
  doi          = {10.1109/ISSS.2002.1227155},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/OnoyeNSCTIY02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/OrailogluP02,
  author       = {Alex Orailoglu and
                  Peter Petrov},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Low-Power Data Memory Communication for Application-Specific Embedded
                  Processors},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {219--224},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227181},
  doi          = {10.1109/ISSS.2002.1227181},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/OrailogluP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RaghunathanPR02,
  author       = {Anand Raghunathan and
                  Nachiketh R. Potlapally and
                  Srivaths Ravi},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Securing Wireless Data: System Architecture Challenges},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {195--200},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227177},
  doi          = {10.1109/ISSS.2002.1227177},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RaghunathanPR02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RajopadhyeD02,
  author       = {Sanjay V. Rajopadhye and
                  Steven Derrien},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Energy/Power Estimation of Regular Processor Arrays},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {50--55},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227151},
  doi          = {10.1109/ISSS.2002.1227151},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RajopadhyeD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RoychoudhuryLM02,
  author       = {Abhik Roychoudhury and
                  Xianfeng Li and
                  Tulika Mitra},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Timing Analysis of Embedded Software for Speculative Processors},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {126--131},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227164},
  doi          = {10.1109/ISSS.2002.1227164},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RoychoudhuryLM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RufKK02,
  author       = {J{\"{u}}rgen Ruf and
                  Thomas Kropf and
                  Jochen Klose},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Visual Approach to Validating System Level Designs},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {186--191},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227175},
  doi          = {10.1109/ISSS.2002.1227175},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RufKK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Sakai02,
  author       = {Shuichi Sakai},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {{CMP} on SoC: Architect's View},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {101--102},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227159},
  doi          = {10.1109/ISSS.2002.1227159},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Sakai02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SalaB02,
  author       = {Carles Rodoreda Sala and
                  Natalino G. Bus{\'{a}}},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit
                  for a {VLIW} Processor},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {44--49},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227150},
  doi          = {10.1109/ISSS.2002.1227150},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SalaB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SanderJL02,
  author       = {Ingo Sander and
                  Axel Jantsch and
                  Zhonghai Lu},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {A Case Study of Hardware and Software Synthesis in ForSyDe},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {86--91},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227157},
  doi          = {10.1109/ISSS.2002.1227157},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SanderJL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Sato02,
  author       = {Mitsuhisa Sato},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {OpenMP: Parallel Programming {API} for Shared Memory Multiprocessors
                  and On-Chip Multiprocessors},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {109--111},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227161},
  doi          = {10.1109/ISSS.2002.1227161},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Sato02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/VahidC02,
  author       = {Frank Vahid and
                  Susan Cotterell},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Tuning of Loop Cache Architectures to Programs in Embedded System
                  Design},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {8--13},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227144},
  doi          = {10.1109/ISSS.2002.1227144},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/VahidC02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/XiaoSCSZ02,
  author       = {Bin Xiao and
                  Zili Shao and
                  Chantana Chantrapornchai and
                  Edwin Hsing{-}Mean Sha and
                  Qingfeng Zhuge},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {144--149},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227167},
  doi          = {10.1109/ISSS.2002.1227167},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/XiaoSCSZ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/YasuuraCU02,
  author       = {Hiroto Yasuura and
                  Yun Cao and
                  Mohammad Mesbah Uddin},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {An Accelerated Datapath Width Optimization Scheme for Area Reduction
                  of Embedded Systems},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {32--37},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227148},
  doi          = {10.1109/ISSS.2002.1227148},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/YasuuraCU02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/YasuuraTOC02,
  author       = {Hiroto Yasuura and
                  Hiroyuki Tomiyama and
                  Takanori Okuma and
                  Yun Cao},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded
                  Systems},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {201--206},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227178},
  doi          = {10.1109/ISSS.2002.1227178},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/YasuuraTOC02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/YasuuraTRTG02,
  author       = {Hiroto Yasuura and
                  Naofumi Takagi and
                  Srivaths Ravi and
                  Michael Torla and
                  Catherine H. Gebotys},
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Special Session: Security on SoC},
  booktitle    = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  pages        = {192--194},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISSS.2002.1227176},
  doi          = {10.1109/ISSS.2002.1227176},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/YasuuraTRTG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/2002,
  editor       = {El Mostapha Aboulhamid and
                  Yukihiro Nakamura},
  title        = {Proceedings of the 15th International Symposium on System Synthesis
                  {(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1145/581199},
  doi          = {10.1145/581199},
  isbn         = {1-58113-576-9},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/2002.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AstromJN01,
  author       = {Pontus {\AA}str{\"{o}}m and
                  Stefan Johansson and
                  Peter Nilsson},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Application of Software design patterns to {DSP} library design},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {239--243},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957948},
  doi          = {10.1109/ISSS.2001.957948},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/AstromJN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BaileyG01,
  author       = {Brian Bailey and
                  Daniel Gajski},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {{RTL} semantics and methodology},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {69--74},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957915},
  doi          = {10.1109/ISSS.2001.957915},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BaileyG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BekooijJM01,
  author       = {Marco Bekooij and
                  Jochen A. G. Jess and
                  Jef L. van Meerbergen},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Phase coupled operation assignment for {VLIW} processors with distributed
                  register files},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {118--123},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957925},
  doi          = {10.1109/ISSS.2001.957925},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BekooijJM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BeltrameBFSST01,
  author       = {Giovanni Beltrame and
                  Carlo Brandolese and
                  William Fornaciari and
                  Fabio Salice and
                  Donatella Sciuto and
                  Vito Trianni},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Dynamic modeling of inter-instruction effects for execution time estimation},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {136--141},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957928},
  doi          = {10.1109/ISSS.2001.957928},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BeltrameBFSST01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BeniniM01,
  author       = {Luca Benini and
                  Giovanni De Micheli},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Powering Networks on Chips: Energy-Efficient and Reliable Interconnect
                  Design for SoCs},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {33--38},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957909},
  doi          = {10.1109/ISSS.2001.957909},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BeniniM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BjureusJ01,
  author       = {Per Bjur{\'{e}}us and
                  Axel Jantsch},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Performance analysis with confidence intervals for embedded software
                  processes},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {45--50},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957911},
  doi          = {10.1109/ISSS.2001.957911},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BjureusJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BolchiniPSS01,
  author       = {Cristiana Bolchini and
                  Luigi Pomante and
                  Fabio Salice and
                  Donatella Sciuto},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {On-line fault detection in a hardware/software co-design environment},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {51--56},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957912},
  doi          = {10.1109/ISSS.2001.957912},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BolchiniPSS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BraunHNM01,
  author       = {Gunnar Braun and
                  Andreas Hoffmann and
                  Achim Nohl and
                  Heinrich Meyr},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Using static scheduling techniques for the retargeting of high speed,
                  compiled simulators for embedded processors from an abstract machine
                  description},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {57--62},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957913},
  doi          = {10.1109/ISSS.2001.957913},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BraunHNM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChabiniS01,
  author       = {Noureddine Chabini and
                  Yvon Savaria},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Methods for optimizing register placement in synchronous circuits
                  derived using software pipelining techniques},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {209--214},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957943},
  doi          = {10.1109/ISSS.2001.957943},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChabiniS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChandrasenaCL01,
  author       = {Lama H. Chandrasena and
                  Priyadarshana Chandrasena and
                  Michael J. Liebelt},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {An energy efficient rate selection algorithm for voltage quantized
                  dynamic voltage scaling},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {124--129},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957926},
  doi          = {10.1109/ISSS.2001.957926},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChandrasenaCL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Chen01,
  author       = {Chien{-}In Henry Chen},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Synthesis of configurable linear feedback shifter registers for detecting
                  random-pattern-resistant faults},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {203--208},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957942},
  doi          = {10.1109/ISSS.2001.957942},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Chen01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChenMA01,
  author       = {Kaiyu Chen and
                  Sharad Malik and
                  David I. August},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Retargetable static timing analysis for embedded software},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {39--44},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957910},
  doi          = {10.1109/ISSS.2001.957910},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/ChenMA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChoiC01,
  author       = {Kyu{-}won Choi and
                  Abhijit Chatterjee},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Efficient instruction-level optimization methodology for low-power
                  embedded systems},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {147--152},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957930},
  doi          = {10.1109/ISSS.2001.957930},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChoiC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChungBM01,
  author       = {Eui{-}Young Chung and
                  Luca Benini and
                  Giovanni De Micheli},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Source code transformation based on software cost analysis},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {153--158},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957931},
  doi          = {10.1109/ISSS.2001.957931},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChungBM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DebOJ01,
  author       = {Abhijit K. Deb and
                  Johnny {\"{O}}berg and
                  Axel Jantsch},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Control and communication performance analysis of embedded {DSP} systems
                  in the {MASIC} methodology},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {274--273},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957954},
  doi          = {10.1109/ISSS.2001.957954},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DebOJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DerrienRS01,
  author       = {Steven Derrien and
                  Sanjay V. Rajopadhye and
                  Susmita Sur{-}Kolay},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Combined instruction and loop parallelism in array synthesis for FPGAs},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {165--170},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957933},
  doi          = {10.1109/ISSS.2001.957933},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DerrienRS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DoucetGOSS01,
  author       = {Frederic Doucet and
                  Rajesh K. Gupta and
                  Masato Otsuka and
                  Patrick Schaumont and
                  Sandeep K. Shukla},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Interoperability as a design issue in {C++} based modeling environments},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {87--92},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957918},
  doi          = {10.1109/ISSS.2001.957918},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DoucetGOSS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FinFP01,
  author       = {Alessandro Fin and
                  Franco Fummi and
                  Giovanni Perbellini},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Soft-cores generation by instruction set analysis},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {227--232},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957946},
  doi          = {10.1109/ISSS.2001.957946},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FinFP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FrabouletKM01,
  author       = {Antoine Fraboulet and
                  Karen Kodary and
                  Anne Mignotte},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Loop fusion for memory space optimization},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {95--100},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957920},
  doi          = {10.1109/ISSS.2001.957920},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FrabouletKM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FujitaN01,
  author       = {Masahiro Fujita and
                  Hiroshi Nakamura},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {The standard SpecC language},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {81--86},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957917},
  doi          = {10.1109/ISSS.2001.957917},
  timestamp    = {Fri, 22 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FujitaN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GangwalNL01,
  author       = {Om Prakash Gangwal and
                  Andr{\'{e}} Nieuwland and
                  Paul E. R. Lippens},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {A scalable and flexible data synchronization scheme for embedded {HW-SW}
                  shared-memory systems},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {1--6},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957904},
  doi          = {10.1109/ISSS.2001.957904},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GangwalNL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Gao01,
  author       = {Guang R. Gao},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Bridging the gap between {ISA} compilers and silicon compilers a challenge
                  for future SoC design},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {93},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957919},
  doi          = {10.1109/ISSS.2001.957919},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Gao01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GrunDN01,
  author       = {Peter Grun and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {{APEX:} Access Pattern Based Memory Architecture Exploration},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {25--32},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957908},
  doi          = {10.1109/ISSS.2001.957908},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GrunDN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GuptaSDGN01,
  author       = {Sumit Gupta and
                  Nick Savoiu and
                  Nikil D. Dutt and
                  Rajesh K. Gupta and
                  Alexandru Nicolau},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Conditional speculation and its effects on performance and area for
                  high-level snthesis},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {171--176},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957934},
  doi          = {10.1109/ISSS.2001.957934},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GuptaSDGN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JerrayaPNW01,
  author       = {Ahmed Amine Jerraya and
                  Pierre G. Paulin and
                  Richard Norman and
                  Feliks J. Welfeld},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Programming models for network processors (Panel)},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {202},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.10001},
  doi          = {10.1109/ISSS.2001.10001},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JerrayaPNW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KandemirKS01,
  author       = {Mahmut T. Kandemir and
                  Ismail Kadayif and
                  Ugur Sezer},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Exploiting scratch-pad memory using Presburger formulas},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {7--12},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957905},
  doi          = {10.1109/ISSS.2001.957905},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KandemirKS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Khoumsi01,
  author       = {Ahmed Khoumsi},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Synthesizing distributed real-time systems modeled by a timed version
                  of a subset of {LOTOS}},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {268--273},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957953},
  doi          = {10.1109/ISSS.2001.957953},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Khoumsi01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KuhnOSWREK01,
  author       = {Tommy Kuhn and
                  Tobias Oppold and
                  C. Schulz{-}Key and
                  Markus Winterholer and
                  Wolfgang Rosenstiel and
                  Mark Edwards and
                  Yaron Kashai},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Object oriented hardware synthesis and verification},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {189--194},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957937},
  doi          = {10.1109/ISSS.2001.957937},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KuhnOSWREK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LekatsasHW01,
  author       = {Haris Lekatsas and
                  J{\"{o}}rg Henkel and
                  Wayne H. Wolf},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Design and simulation of a pipelined decompression architecture for
                  embedded systems},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {63--68},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957914},
  doi          = {10.1109/ISSS.2001.957914},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LekatsasHW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MarinescuR01,
  author       = {Maria{-}Cristina V. Marinescu and
                  Martin C. Rinard},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {High-level automatic pipelining for sequential circuits},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {215--220},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957944},
  doi          = {10.1109/ISSS.2001.957944},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MarinescuR01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MeeuwenVZCV01,
  author       = {Tycho van Meeuwen and
                  Arnout Vandecappelle and
                  Allert van Zelst and
                  Francky Catthoor and
                  Diederik Verkest},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {System-level interconnect architecture exploration for custom memory
                  organizations},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {13--18},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957906},
  doi          = {10.1109/ISSS.2001.957906},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MeeuwenVZCV01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MeftaliGRJ01,
  author       = {Samy Meftali and
                  Ferid Gharsalli and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  Ahmed Amine Jerraya},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {An optimal memory allocation for application-specific multiprocessor
                  system-on-chip},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {19--24},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957907},
  doi          = {10.1109/ISSS.2001.957907},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MeftaliGRJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MirandaGKCV01,
  author       = {Miguel Miranda and
                  C. Ghez and
                  Chidamber Kulkarni and
                  Francky Catthoor and
                  Diederik Verkest},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Systematic speed-power memory data-layout exploration for cache controlled
                  embedded multimedia applications},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {107--112},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957922},
  doi          = {10.1109/ISSS.2001.957922},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MirandaGKCV01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MishraDN01,
  author       = {Prabhat Mishra and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Functional abstraction driven design space exploration of heterogeneous
                  programmable architectures},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {256--261},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957951},
  doi          = {10.1109/ISSS.2001.957951},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MishraDN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MuresanG01,
  author       = {Radu Muresan and
                  Catherine H. Gebotys},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Current consumption dynamics at instruction and program level for
                  a \emph{VLIW} {DSP} processor},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {130--135},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957927},
  doi          = {10.1109/ISSS.2001.957927},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MuresanG01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Norman01,
  author       = {Richard Norman},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {System design of a telecommunication router},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {196},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957939},
  doi          = {10.1109/ISSS.2001.957939},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Norman01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Panda01,
  author       = {Preeti Ranjan Panda},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {SystemC: {A} Modeling Platform Supporting Multiple Design Abstractions},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {75--80},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957916},
  doi          = {10.1109/ISSS.2001.957916},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Panda01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PandaSM01,
  author       = {Preeti Ranjan Panda and
                  Luc S{\'{e}}m{\'{e}}ria and
                  Giovanni De Micheli},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Cache-efficient memory layout of aggregate data structures},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {101--106},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957921},
  doi          = {10.1109/ISSS.2001.957921},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PandaSM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ParkD01,
  author       = {Joonseok Park and
                  Pedro C. Diniz},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Synthesis of pipelined memory access controllers for streamed data
                  applications on FPGA-based computing engines},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {221--226},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957945},
  doi          = {10.1109/ISSS.2001.957945},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ParkD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PaulST01,
  author       = {JoAnn M. Paul and
                  Arne J. Supp{\'{e}} and
                  Donald E. Thomas},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Modeling and simulation of steady state and transient behaviors for
                  emergent SoCs},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {262--267},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957952},
  doi          = {10.1109/ISSS.2001.957952},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PaulST01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Paulin01,
  author       = {Pierre G. Paulin},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Embedded systems technologies for application-specific architecture
                  platforms},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {195},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957938},
  doi          = {10.1109/ISSS.2001.957938},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Paulin01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PetrovO01,
  author       = {Peter Petrov and
                  Alex Orailoglu},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Data cache energy minimizations through programmable tag size matching
                  to the applications},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {113--117},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957924},
  doi          = {10.1109/ISSS.2001.957924},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PetrovO01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RosenstielBFGGP01,
  author       = {Wolfgang Rosenstiel and
                  Brian Bailey and
                  Masahiro Fujita and
                  Guang R. Gao and
                  Rajesh K. Gupta and
                  Preeti Ranjan Panda},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {New Design Paradigms: What Needs to be Standardized?},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {94},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.10000},
  doi          = {10.1109/ISSS.2001.10000},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RosenstielBFGGP01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Sanchez-ElezFHMKB01,
  author       = {Marcos S{\'{a}}nchez{-}{\'{E}}lez and
                  Milagros Fern{\'{a}}ndez and
                  Rom{\'{a}}n Hermida and
                  Rafael Maestre and
                  Fadi J. Kurdahi and
                  Nader Bagherzadeh},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {A data scheduler for multi-context reconfigurable architectures},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {177--182},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957935},
  doi          = {10.1109/ISSS.2001.957935},
  timestamp    = {Fri, 26 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/Sanchez-ElezFHMKB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SchmitzA01,
  author       = {Marcus T. Schmitz and
                  Bashir M. Al{-}Hashimi},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Considering power variations of {DVS} processing elements for energy
                  minimisation in distributed systems},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {250--255},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957950},
  doi          = {10.1109/ISSS.2001.957950},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SchmitzA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/StammermannKNPSSS01,
  author       = {Ansgar Stammermann and
                  Lars Kruse and
                  Wolfgang Nebel and
                  Alexander Pratsch and
                  Eike Schmidt and
                  Milan Schulte and
                  Arne Schulz},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {System level optimization and design space exploration for low power},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {142--146},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957929},
  doi          = {10.1109/ISSS.2001.957929},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/StammermannKNPSSS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WangZS01,
  author       = {Zhong Wang and
                  Qingfeng Zhuge and
                  Edwin Hsing{-}Mean Sha},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Scheduling and partitioning for multiple loop nests},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {183--188},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957936},
  doi          = {10.1109/ISSS.2001.957936},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WangZS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Welfeld01,
  author       = {Feliks J. Welfeld},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Network processing in content inspection applications},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {197--201},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957940},
  doi          = {10.1109/ISSS.2001.957940},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Welfeld01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WenLL01,
  author       = {Hung{-}Pin Wen and
                  Chien{-}Yu Lin and
                  Youn{-}Long Lin},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Concurrent-simulation-based remote {IP} evaluation over the internet
                  for system-on-a-chip design},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {233--238},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957947},
  doi          = {10.1109/ISSS.2001.957947},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WenLL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ZhaoBMEJ01,
  author       = {Qin Zhao and
                  Twan Basten and
                  Bart Mesman and
                  C. A. J. van Eijk and
                  Jochen A. G. Jess},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Static resource models of instruction sets},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {159--164},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957932},
  doi          = {10.1109/ISSS.2001.957932},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ZhaoBMEJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ZhaoMMM01,
  author       = {Ying Zhao and
                  Sharad Malik and
                  Matthew W. Moskewicz and
                  Conor F. Madigan},
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Accelerating boolean satisfiability through application specific processing},
  booktitle    = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  pages        = {244--249},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISSS.2001.957949},
  doi          = {10.1109/ISSS.2001.957949},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/ZhaoMMM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/2001,
  editor       = {Rom{\'{a}}n Hermida and
                  El Mostapha Aboulhamid},
  title        = {Proceedings of the 14th International Symposium on Systems Synthesis,
                  {ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
                  30 - October 3, 2001},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1145/500001},
  doi          = {10.1145/500001},
  isbn         = {1-58113-418-5},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/2001.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AchterenLC00,
  author       = {Tanja Van Achteren and
                  Rudy Lauwereins and
                  Francky Catthoor},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Systematic Data Reuse Exploration Methodology for Irregular Access
                  Patterns},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {115--122},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874037},
  doi          = {10.1109/ISSS.2000.874037},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/AchterenLC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AkturanJ00,
  author       = {Cagdas Akturan and
                  Margarida F. Jacome},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {{FDRA:} {A} Software-Pipelining Algorithm for Embedded {VLIW} Processors},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {34--40},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874026},
  doi          = {10.1109/ISSS.2000.874026},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/AkturanJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BambhaB00,
  author       = {Neal K. Bambha and
                  Shuvra S. Bhattacharyya},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {A Joint Power/Performance Optimization Algorithm for Multiprocessor
                  Systems using a Period Graph Construct},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {91--99},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874034},
  doi          = {10.1109/ISSS.2000.874034},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BambhaB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BeniniCMMS00,
  author       = {Luca Benini and
                  Giuliano Castelli and
                  Alberto Macii and
                  Enrico Macii and
                  Riccardo Scarsi},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Battery-Driven Dynamic Power Management of Portable Systems},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {25--33},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874025},
  doi          = {10.1109/ISSS.2000.874025},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BeniniCMMS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BrandoleseFPSS00,
  author       = {Carlo Brandolese and
                  William Fornaciari and
                  Luigi Pomante and
                  Fabio Salice and
                  Donatella Sciuto},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {A Multi-Level Strategy for Software Power Estimation},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {187--192},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874048},
  doi          = {10.1109/ISSS.2000.874048},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BrandoleseFPSS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BrockmeyerVWC00,
  author       = {Erik Brockmeyer and
                  Arnout Vandecappelle and
                  Sven Wuytack and
                  Francky Catthoor},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Low Power Storage Cycle Budget Distribution Tool Support for Hierarchical
                  Graphs},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {200--206},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874050},
  doi          = {10.1109/ISSS.2000.874050},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BrockmeyerVWC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BusaWB00,
  author       = {Natalino G. Bus{\'{a}} and
                  Albert van der Werf and
                  Marco Bekooij},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Scheduling Coarse-Grain Operations for {VLIW} Processors},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {47--54},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874028},
  doi          = {10.1109/ISSS.2000.874028},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BusaWB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CesarioSMJ00,
  author       = {Wander O. Ces{\'{a}}rio and
                  Zoltan Sugar and
                  Imed Moussa and
                  Ahmed Amine Jerraya},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Efficient Integration of Behavioral Synthesis with Existing Design
                  Flows},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {85--90},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874033},
  doi          = {10.1109/ISSS.2000.874033},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CesarioSMJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CortesEP00,
  author       = {Luis Alejandro Cort{\'{e}}s and
                  Petru Eles and
                  Zebo Peng},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Verification of Embedded Systems using a Petri Net based Representation},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {149--156},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874042},
  doi          = {10.1109/ISSS.2000.874042},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CortesEP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GironesCBS00,
  author       = {Rafael Gadea Giron{\'{e}}s and
                  Joaqu{\'{\i}}n Cerd{\'{a}} and
                  Francisco Jos{\'{e}} Ballester{-}Merelo and
                  Antonio Mochol{\'{\i}} Salcedo},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Artificial Neural Network Implementation on a Single {FPGA} of a Pipelined
                  On-Line Backpropagation},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {225--230},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874054},
  doi          = {10.1109/ISSS.2000.874054},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GironesCBS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GivargisVH00,
  author       = {Tony Givargis and
                  Frank Vahid and
                  J{\"{o}}rg Henkel},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Instruction-based System-level Power Evaluation of System-On-A-Chip
                  Peripheral Cores},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {163--171},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874044},
  doi          = {10.1109/ISSS.2000.874044},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GivargisVH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Grajcar00,
  author       = {Martin Grajcar},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Conditional Scheduling for Embedded Systems using Genetic List Scheduling},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {123--129},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874038},
  doi          = {10.1109/ISSS.2000.874038},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Grajcar00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JersakCZE00,
  author       = {Marek Jersak and
                  Ying Cai and
                  Dirk Ziegenbein and
                  Rolf Ernst},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {A Transformational Approach to Constraint Relaxation of a Time-driven
                  Simulation Model},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {137--142},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874040},
  doi          = {10.1109/ISSS.2000.874040},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JersakCZE00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JungLH00,
  author       = {Hyunuk Jung and
                  Kangnyoung Lee and
                  Soonhoi Ha},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph
                  in System Level Design},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {79--84},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874032},
  doi          = {10.1109/ISSS.2000.874032},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JungLH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KangWL00,
  author       = {Jeffrey Kang and
                  Albert van der Werf and
                  Paul E. R. Lippens},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Mapping Array Communication onto {FIFO} Communication - Towards an
                  Implementation},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {207--214},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874051},
  doi          = {10.1109/ISSS.2000.874051},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KangWL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KountourisW00,
  author       = {Apostolos A. Kountouris and
                  Christophe Wolinski},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Hierarchical Conditional Dependency Graphs as a Unifying Design Representation
                  in the {CODESIS} High-Level Synthesis System},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {66--72},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874030},
  doi          = {10.1109/ISSS.2000.874030},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KountourisW00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KruseSJSN00,
  author       = {Lars Kruse and
                  Eike Schmidt and
                  Gerd Jochens and
                  Ansgar Stammermann and
                  Wolfgang Nebel},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Lower Bound Estimation for Low Power High-Level Synthesis},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {180--186},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874047},
  doi          = {10.1109/ISSS.2000.874047},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KruseSJSN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeeLHT00,
  author       = {Chingren Lee and
                  Jenq Kuen Lee and
                  TingTing Hwang and
                  Shi{-}Chun Tsai},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Compiler Optimization on Instruction Scheduling for Low Power},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {55--61},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874029},
  doi          = {10.1109/ISSS.2000.874029},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeeLHT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Leupers00,
  author       = {Rainer Leupers},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Code Generation for Embedded Processors},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {173--179},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874046},
  doi          = {10.1109/ISSS.2000.874046},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Leupers00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LuMB00,
  author       = {Yung{-}Hsiang Lu and
                  Giovanni De Micheli and
                  Luca Benini},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Requester-Aware Power Reduction},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {18--24},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874024},
  doi          = {10.1109/ISSS.2000.874024},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LuMB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LyseckyVG00,
  author       = {Roman L. Lysecky and
                  Frank Vahid and
                  Tony Givargis},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Experiments with the Peripheral Virtual Component Interface},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {221--224},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874053},
  doi          = {10.1109/ISSS.2000.874053},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LyseckyVG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MaestreKFBS00,
  author       = {Rafael Maestre and
                  Fadi J. Kurdahi and
                  Milagros Fern{\'{a}}ndez and
                  Nader Bagherzadeh and
                  Hartej Singh},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Configuration Management in Multi-Context Reconfigurable Systems for
                  Simultaneous Performance and Power Optimization},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {107--114},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874036},
  doi          = {10.1109/ISSS.2000.874036},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MaestreKFBS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MeerweinBWG00,
  author       = {Matthias Meerwein and
                  C. Baumgartner and
                  T. Wieja and
                  W. Glauert},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Embedded Systems Verification with FPGA-Enhanced In-Circuit Emulator},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {143--148},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874041},
  doi          = {10.1109/ISSS.2000.874041},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MeerweinBWG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MuthF00,
  author       = {Annette Muth and
                  Georg F{\"{a}}rber},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {{SDL} as a System Level Specification Language for Application-Specific
                  Hardware in a Rapid Prototyping Environment},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {157--162},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874043},
  doi          = {10.1109/ISSS.2000.874043},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MuthF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/NogueraB00,
  author       = {Juanjo Noguera and
                  Rosa M. Badia},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Run-Time {HW/SW} Codesign for Discrete Event Systems using Dynamically
                  Reconfigurable Architectures},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {100--106},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874035},
  doi          = {10.1109/ISSS.2000.874035},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/NogueraB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ParkH00,
  author       = {Chanik Park and
                  Soonhoi Ha},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Hardware Synthesis from {SPDF} Representation for Multimedia Applications},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {215--220},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://dl.acm.org/citation.cfm?id=501835},
  doi          = {10.1109/ISSS.2000.874052},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ParkH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PenalbaMM00,
  author       = {Olga Pe{\~{n}}alba and
                  Jos{\'{e}} M. Mend{\'{\i}}as and
                  Mar{\'{\i}}a C. Molina},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Execution Condition Analysis in High Level Synthesis: {A} Unified
                  Approach},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {73--78},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874031},
  doi          = {10.1109/ISSS.2000.874031},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PenalbaMM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Rosenstiel00,
  author       = {Wolfgang Rosenstiel},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Embedded Java},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {172},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874045},
  doi          = {10.1109/ISSS.2000.874045},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Rosenstiel00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SanchezG00,
  author       = {F. Jes{\'{u}}s S{\'{a}}nchez and
                  Antonio Gonz{\'{a}}lez},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Instruction Scheduling for Clustered {VLIW} Architectures},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {41--46},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874027},
  doi          = {10.1109/ISSS.2000.874027},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SanchezG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SavageCC00,
  author       = {Warren Savage and
                  John Chilton and
                  Raul Camposano},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {{IP} Reuse in the System on a Chip Era},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {2--8},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874022},
  doi          = {10.1109/ISSS.2000.874022},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SavageCC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SimunicMBH00,
  author       = {Tajana Simunic and
                  Giovanni De Micheli and
                  Luca Benini and
                  Mat Hans},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Source Code Optimization and Profiling of Energy Consumption in Embedded
                  Systems},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {193--199},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874049},
  doi          = {10.1109/ISSS.2000.874049},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SimunicMBH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SinhaDSGLG00,
  author       = {Vivek Sinha and
                  Frederic Doucet and
                  Chuck Siska and
                  Rajesh K. Gupta and
                  Stan Y. Liao and
                  Abhijit Ghosh},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {{YAML:} {A} Tool for Hardware Design Visualization and Capture},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {9--17},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874023},
  doi          = {10.1109/ISSS.2000.874023},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SinhaDSGLG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Valero00,
  author       = {Mateo Valero},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Architectures for One Billion of Transistors},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {62},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2000.10000},
  doi          = {10.1109/ISSS.2000.10000},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Valero00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WolfE00,
  author       = {Fabian Wolf and
                  Rolf Ernst},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Intervals in Software Execution Cost Analysis},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {130--136},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874039},
  doi          = {10.1109/ISSS.2000.874039},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WolfE00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/2000,
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/7021/proceeding},
  isbn         = {0-7695-0765-4},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/2000.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AdityaRK99,
  author       = {Shail Aditya and
                  B. Ramakrishna Rau and
                  Vinod Kathail},
  title        = {Automatic Architectural Synthesis of {VLIW} and {EPIC} Processors},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {107--113},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814268},
  doi          = {10.1109/ISSS.1999.814268},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/AdityaRK99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BarryD99,
  author       = {Brian M. Barry and
                  John Duimovich},
  title        = {Embedded Java: Techniques and Applications},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {6--7},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1999.10000},
  doi          = {10.1109/ISSS.1999.10000},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BarryD99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CarrerasLN99,
  author       = {Carlos Carreras and
                  Juan A. L{\'{o}}pez and
                  Octavio Nieto{-}Taladriz},
  title        = {Bit-Width Selection for Data-Path Implementations},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {114--121},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814269},
  doi          = {10.1109/ISSS.1999.814269},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CarrerasLN99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CentoducattePA99,
  author       = {Paulo Centoducatte and
                  Ricardo Pannain and
                  Guido Araujo},
  title        = {Compressed Code Execution on {DSP} Architectures},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {56--63},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814261},
  doi          = {10.1109/ISSS.1999.814261},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CentoducattePA99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChenS99,
  author       = {Fei Chen and
                  Edwin Hsing{-}Mean Sha},
  title        = {Loop Scheduling and Partitions for Hiding Memory Latencies},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {64--70},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814262},
  doi          = {10.1109/ISSS.1999.814262},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChenS99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Foster99,
  author       = {Eric M. Foster},
  title        = {Design of a Set-Top Box System on a Chip},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {2},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1999.10003},
  doi          = {10.1109/ISSS.1999.10003},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Foster99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FrabouletHM99,
  author       = {Antoine Fraboulet and
                  Guillaume Huard and
                  Anne Mignotte},
  title        = {Loop Alignment for Memory Accesses Optimization},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {71--77},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814263},
  doi          = {10.1109/ISSS.1999.814263},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FrabouletHM99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GajskiB99,
  author       = {Daniel Gajski and
                  Reinaldo A. Bergamaschi},
  title        = {Panel Statement: System-Level Design: Designers' Wish List vs. Reality},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {8--9},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1999.10001},
  doi          = {10.1109/ISSS.1999.10001},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GajskiB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GrunHDN99,
  author       = {Peter Grun and
                  Ashok Halambi and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  title        = {{RTGEN:} An Algorithm for Automatic Generation of Reservation Tables
                  from Architectural Descriptions},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {44--50},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814259},
  doi          = {10.1109/ISSS.1999.814259},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GrunHDN99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HorstmannshoffM99,
  author       = {Jens Horstmannshoff and
                  Heinrich Meyr},
  title        = {Optimized System Synthesis of Complex {RT} Level Building Blocks from
                  Multirate Dataflow Graphs},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {38--43},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814258},
  doi          = {10.1109/ISSS.1999.814258},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HorstmannshoffM99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Kelley99,
  author       = {Brian Kelley},
  title        = {On the Rapid Prototyping and Design of a Wireless Communication System
                  on a Chip},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {3},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1999.10004},
  doi          = {10.1109/ISSS.1999.10004},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Kelley99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LyseckyVPG99,
  author       = {Roman L. Lysecky and
                  Frank Vahid and
                  Rilesh Patel and
                  Tony Givargis},
  title        = {Pre-Fetching for Improved Core Interfacing},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {51--55},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814260},
  doi          = {10.1109/ISSS.1999.814260},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LyseckyVPG99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MaestreFHB99,
  author       = {Rafael Maestre and
                  Milagros Fern{\'{a}}ndez and
                  Rom{\'{a}}n Hermida and
                  Nader Bagherzadeh},
  title        = {A Framework for Scheduling and Context Allocation in Reconfigurable
                  Computing},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {134--140},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814272},
  doi          = {10.1109/ISSS.1999.814272},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MaestreFHB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Maluf99,
  author       = {Nadim Maluf},
  title        = {Micro-Electromechanical Systems {(MEMS):} Miniaturization Beyond Microelectronics},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {10--11},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1999.10002},
  doi          = {10.1109/ISSS.1999.10002},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Maluf99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MesmanPE99,
  author       = {Bart Mesman and
                  Carlos A. Alba Pinto and
                  Koen van Eijk},
  title        = {Efficient Scheduling of {DSP} Code on Processors with Distributed
                  Register Files},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {100--106},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814267},
  doi          = {10.1109/ISSS.1999.814267},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MesmanPE99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Mooney99,
  author       = {Vincent John Mooney III},
  title        = {Path-based Edge Activation for Dynamic Run-Time Scheduling},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {30--37},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814257},
  doi          = {10.1109/ISSS.1999.814257},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Mooney99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MuhammadR99,
  author       = {Khurram Muhammad and
                  Kaushik Roy},
  title        = {A Graph Theoretic Approach for Design and Synthesis of Multiplierless
                  {FIR} Filters},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {94--99},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814266},
  doi          = {10.1109/ISSS.1999.814266},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MuhammadR99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MurthyB99,
  author       = {Praveen K. Murthy and
                  Shuvra S. Bhattacharyya},
  title        = {A Buffer Merging Technique for Reducing Memory Requirements of Synchronous
                  Dataflow Specifications},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {78--84},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814264},
  doi          = {10.1109/ISSS.1999.814264},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MurthyB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/OkumaIY99,
  author       = {Takanori Okuma and
                  Tohru Ishihara and
                  Hiroto Yasuura},
  title        = {Real-Time Task Scheduling for a Variable Voltage Processor},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {24--29},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814256},
  doi          = {10.1109/ISSS.1999.814256},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/OkumaIY99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/QuMP99,
  author       = {Gang Qu and
                  Malena R. Mesarina and
                  Miodrag Potkonjak},
  title        = {System Synthesis of Synchronous Multimedia Applications},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {128--133},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814271},
  doi          = {10.1109/ISSS.1999.814271},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/QuMP99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RammelaereELMSMH99,
  author       = {Werner De Rammelaere and
                  K. Eckert and
                  T. Lawell and
                  Ralph McGarity and
                  F. Steininger and
                  Patricia Le Moenner and
                  E. Hilkens},
  title        = {Catalyst: {A} {DSIP} Design Flow Development in Industry},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {122--127},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814270},
  doi          = {10.1109/ISSS.1999.814270},
  timestamp    = {Tue, 02 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RammelaereELMSMH99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Schmidt99,
  author       = {Douglas C. Schmidt},
  title        = {Middleware Techniques and Optimizations for Real-Time, Embedded Systems},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {12--17},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814254},
  doi          = {10.1109/ISSS.1999.814254},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Schmidt99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SimunicMB99,
  author       = {Tajana Simunic and
                  Giovanni De Micheli and
                  Luca Benini},
  title        = {Event-Driven Power Management of Portable Systems},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {18--23},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814255},
  doi          = {10.1109/ISSS.1999.814255},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SimunicMB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Ykman-CouvreurLVCM99,
  author       = {Chantal Ykman{-}Couvreur and
                  Jurgen Lambrecht and
                  Diederik Verkest and
                  Francky Catthoor and
                  Hugo De Man},
  title        = {Exploration and Synthesis of Dynamic Data Sets in Telecom Network
                  Applications},
  booktitle    = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  pages        = {85--93},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ISSS.1999.814265},
  doi          = {10.1109/ISSS.1999.814265},
  timestamp    = {Fri, 20 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/Ykman-CouvreurLVCM99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1999,
  title        = {Proceedings of the 12th International Symposium on System Synthesis,
                  {ISSS} '99, Boca Raton, Florida, USA, November 1-4, 1999},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1999},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/6603/proceeding},
  isbn         = {0-7695-0356-X},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1999.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BolchiniFSS98,
  author       = {Cristiana Bolchini and
                  William Fornaciari and
                  Fabio Salice and
                  Donatella Sciuto},
  editor       = {Francky Catthoor},
  title        = {Concurrent Error Detection at Architectural Level},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {72--75},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730600},
  doi          = {10.1109/ISSS.1998.730600},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BolchiniFSS98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BringmannRR98,
  author       = {Oliver Bringmann and
                  Wolfgang Rosenstiel and
                  Dirk Reichardt},
  editor       = {Francky Catthoor},
  title        = {Synchronization Detection for Multi-Process Hierarchical Synthesis},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {105--110},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1998.730608},
  doi          = {10.1109/ISSS.1998.730608},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BringmannRR98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CatthoorVB98,
  author       = {Francky Catthoor and
                  Diederik Verkest and
                  Erik Brockmeyer},
  editor       = {Francky Catthoor},
  title        = {Proposal for Unified System Design Meta Flow in Task-Level and Instruction-Level
                  Design Technology Research for Multi-Media Applications},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {89--95},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730605},
  doi          = {10.1109/ISSS.1998.730605},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CatthoorVB98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChathaV98,
  author       = {Karam S. Chatha and
                  Ranga Vemuri},
  editor       = {Francky Catthoor},
  title        = {A Tool for Partitioning and Pipelined Scheduling of Hardware-Software
                  Systems},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {145--151},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730616},
  doi          = {10.1109/ISSS.1998.730616},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChathaV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChengL98,
  author       = {Wei{-}Kai Cheng and
                  Youn{-}Long Lin},
  editor       = {Francky Catthoor},
  title        = {Addressing Optimization for Loop Execution Targeting {DSP} with Auto-Increment/Decrement
                  Architecture},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {15--22},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730591},
  doi          = {10.1109/ISSS.1998.730591},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChengL98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/CosterALP98,
  author       = {Luc De Coster and
                  Marleen Ad{\'{e}} and
                  Rudy Lauwereins and
                  J. A. Peperstraete},
  editor       = {Francky Catthoor},
  title        = {Code Generation for Compiled Bit-True Simulation of {DSP} Applications},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {9--14},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730590},
  doi          = {10.1109/ISSS.1998.730590},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/CosterALP98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FilippiLLMPPSS98,
  author       = {Enrica Filippi and
                  Luciano Lavagno and
                  L. Licciardi and
                  Archille Montanaro and
                  Maurizio Paolini and
                  Roberto Passerone and
                  Marco Sgroi and
                  Alberto L. Sangiovanni{-}Vincentelli},
  editor       = {Francky Catthoor},
  title        = {Intellectual Property Re-use in Embedded System Co-design: An Industrial
                  Case Study},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {37--42},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730594},
  doi          = {10.1109/ISSS.1998.730594},
  timestamp    = {Thu, 06 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/FilippiLLMPPSS98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GivargisV98,
  author       = {Tony Givargis and
                  Frank Vahid},
  editor       = {Francky Catthoor},
  title        = {Interface Exploration for Reduced Power in Core-Based Systems},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {117--124},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730611},
  doi          = {10.1109/ISSS.1998.730611},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GivargisV98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Hassoun98,
  author       = {Soha Hassoun},
  editor       = {Francky Catthoor},
  title        = {Fine Grain Incremental Rescheduling Via Architectural Retiming},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {158--163},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730619},
  doi          = {10.1109/ISSS.1998.730619},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Hassoun98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HuangX98,
  author       = {Ing{-}Jer Huang and
                  Ping{-}Huei Xie},
  editor       = {Francky Catthoor},
  title        = {Application of Instruction Analysis/Synthesis Tools to x86's Functional
                  Unit Allocation},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {131--136},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730614},
  doi          = {10.1109/ISSS.1998.730614},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HuangX98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HwangW98,
  author       = {Yin{-}Tsung Hwang and
                  Yuan{-}Hung Wang},
  editor       = {Francky Catthoor},
  title        = {Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software
                  Codesign System},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {76--82},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730601},
  doi          = {10.1109/ISSS.1998.730601},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HwangW98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JaschkeL98,
  author       = {Christoph J{\"{a}}schke and
                  Rainer Laur},
  editor       = {Francky Catthoor},
  title        = {Resource Constrained Modulo Scheduling with Global Resource Sharing},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {60--65},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730598},
  doi          = {10.1109/ISSS.1998.730598},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JaschkeL98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Keitel-SchulzW98,
  author       = {Doris Keitel{-}Schulz and
                  Norbert Wehn},
  editor       = {Francky Catthoor},
  title        = {Issues in Embedded {DRAM} Development and Applications},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {23--30},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730592},
  doi          = {10.1109/ISSS.1998.730592},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Keitel-SchulzW98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KnudsenM98,
  author       = {Peter Voigt Knudsen and
                  Jan Madsen},
  editor       = {Francky Catthoor},
  title        = {Integrating Communication Protocol Selection with Partitioning in
                  Hardware/Software Codesign},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {111--116},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730610},
  doi          = {10.1109/ISSS.1998.730610},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KnudsenM98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KountourisW98,
  author       = {Apostolos A. Kountouris and
                  Christophe Wolinski},
  editor       = {Francky Catthoor},
  title        = {False Path Analysis Based on a Hierarchical Control Representation},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {55--59},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730597},
  doi          = {10.1109/ISSS.1998.730597},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KountourisW98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Leupers98,
  author       = {Rainer Leupers},
  editor       = {Francky Catthoor},
  title        = {HDL-Based Modeling of Embedded Processor Behavior for Retargetable
                  Compilation},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {51},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730596},
  doi          = {10.1109/ISSS.1998.730596},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Leupers98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersD98,
  author       = {Rainer Leupers and
                  Fabian David},
  editor       = {Francky Catthoor},
  title        = {A Uniform Optimization Technique for Offset Assignment Problems},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {3--8},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730589},
  doi          = {10.1109/ISSS.1998.730589},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersD98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/OkumaTIFY98,
  author       = {Takanori Okuma and
                  Hiroyuki Tomiyama and
                  Akihiko Inoue and
                  Eko Fajar and
                  Hiroto Yasuura},
  editor       = {Francky Catthoor},
  title        = {Instruction Encoding Techniques for Area Minimization of Instruction
                  {ROM}},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {125--130},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730612},
  doi          = {10.1109/ISSS.1998.730612},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/OkumaTIFY98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RaeP98,
  author       = {Allan Rae and
                  Sri Parameswaran},
  editor       = {Francky Catthoor},
  title        = {Application-Specific Heterogeneous Multiprocessor Synthesis Using
                  Differential-Evolution},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {83--88},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730602},
  doi          = {10.1109/ISSS.1998.730602},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RaeP98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Siska98,
  author       = {Chuck Siska},
  editor       = {Francky Catthoor},
  title        = {A Processor Description Language Supporting Retargetable Multi-Pipeline
                  {DSP} Program Development Tools},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {31--36},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730593},
  doi          = {10.1109/ISSS.1998.730593},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Siska98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SungKH98,
  author       = {Wonyong Sung and
                  Junedong Kim and
                  Soonhoi Ha},
  editor       = {Francky Catthoor},
  title        = {Memory Efficient Software Synthesis from Dataflow Graph},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {137--144},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730615},
  doi          = {10.1109/ISSS.1998.730615},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SungKH98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/TomiyamaIY98,
  author       = {Hiroyuki Tomiyama and
                  Akihiko Inoue and
                  Hiroto Yasuura},
  editor       = {Francky Catthoor},
  title        = {Statistical Performance-Driven Module Binding in High-Level Synthesis},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {66--71},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730599},
  doi          = {10.1109/ISSS.1998.730599},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/TomiyamaIY98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Vahid98,
  author       = {Frank Vahid},
  editor       = {Francky Catthoor},
  title        = {A Three-Step Approach to the Functional Partitioning of Large Behavioral
                  Processes},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {152--157},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730618},
  doi          = {10.1109/ISSS.1998.730618},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Vahid98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/VahidG98,
  author       = {Frank Vahid and
                  Tony Givargis},
  editor       = {Francky Catthoor},
  title        = {Incorporating Cores into System-Level Specification},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {43--50},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730595},
  doi          = {10.1109/ISSS.1998.730595},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/VahidG98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WuW98,
  author       = {Zhao Wu and
                  Wayne H. Wolf},
  editor       = {Francky Catthoor},
  title        = {Data-Path Synthesis of {VLIW} Video Signal Processors},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {96--104},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730607},
  doi          = {10.1109/ISSS.1998.730607},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WuW98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1998,
  editor       = {Francky Catthoor},
  title        = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/5921/proceeding},
  isbn         = {0-8186-8623-5},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1998.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BakshiG97,
  author       = {Smita Bakshi and
                  Daniel Gajski},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {A Scheduling and Pipelining Algorithm for Hardware/Software Systems},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {113},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621683},
  doi          = {10.1109/ISSS.1997.621683},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BakshiG97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BlumenrohrE97,
  author       = {Christian Blumenr{\"{o}}hr and
                  Dirk Eisenbiegler},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {An Efficient Representation for Formal Synthesis},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {9--15},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621670},
  doi          = {10.1109/ISSS.1997.621670},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BlumenrohrE97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChenK97,
  author       = {Chih{-}Tung Chen and
                  Kayhan K{\"{u}}{\c{c}}{\"{u}}k{\c{c}}akar},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {A Source-Level Dynamic Analysis Methodology and Tool for High-Level
                  Synthesis},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {134--140},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621686},
  doi          = {10.1109/ISSS.1997.621686},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChenK97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Dierks97,
  author       = {Henning Dierks},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Synthesising Controllers from Real-Time Specifications},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {126--133},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1997.621685},
  doi          = {10.1109/ISSS.1997.621685},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Dierks97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/EckhardtM97,
  author       = {Uwe Eckhardt and
                  Renate Merker},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Optimization of the Background Memory Utilization by Partitioning},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {82--89},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621679},
  doi          = {10.1109/ISSS.1997.621679},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/EckhardtM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Gebotys97,
  author       = {Catherine H. Gebotys},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {An Efficient Model for {DSP} Code Generation: Performance, Code Size,
                  Estimated Energy},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {41},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621674},
  doi          = {10.1109/ISSS.1997.621674},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Gebotys97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HeinDCLA97,
  author       = {A. Hein and
                  J. Dalcolmo and
                  P. Le Corre and
                  Rudy Lauwereins and
                  Marleen Ad{\'{e}}},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Prototyping of the Receiver Unit for a Broadband Access Network},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {26--32},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621672},
  doi          = {10.1109/ISSS.1997.621672},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HeinDCLA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KochKR97,
  author       = {Gernot Koch and
                  Udo Kebschull and
                  Wolfgang Rosenstiel},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Co-Emulation and Debugging of HW/SW-Systems},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {120--125},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621684},
  doi          = {10.1109/ISSS.1997.621684},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KochKR97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Kuchcinski97,
  author       = {Krzysztof Kuchcinski},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Embedded System Synthesis by Timing Constraints Solving},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {50--57},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621675},
  doi          = {10.1109/ISSS.1997.621675},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Kuchcinski97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LandwehrM97,
  author       = {Birger Landwehr and
                  Peter Marwedel},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {A New Optimization Technique for Improving Resource Exploitation and
                  Critical Path Minimization},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {65},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621677},
  doi          = {10.1109/ISSS.1997.621677},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LandwehrM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MesmanSTMJ97,
  author       = {Bart Mesman and
                  Marino T. J. Strik and
                  Adwin H. Timmer and
                  Jef L. van Meerbergen and
                  Jochen A. G. Jess},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Constraint Analysis for {DSP} Code Generation},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {33--40},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1997.621673},
  doi          = {10.1109/ISSS.1997.621673},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MesmanSTMJ97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MignotteP97,
  author       = {Anne Mignotte and
                  Olivier Peyran},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Reducing the Complexity of {ILP} Formulations for Synthesis},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {58--64},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621676},
  doi          = {10.1109/ISSS.1997.621676},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MignotteP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PandaDN97,
  author       = {Preeti Ranjan Panda and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Architectural Exploration and Optimization of Local Memory in Embedded
                  Systems},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {90},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1997.621680},
  doi          = {10.1109/ISSS.1997.621680},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PandaDN97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PaskoSDD97,
  author       = {Robert Pasko and
                  Patrick Schaumont and
                  Veerle Derudder and
                  Daniela Durackov{\'{a}}},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Optimization Method for Broadband Modem {FIR} Filter Design using
                  Common Subexpression Elimination},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {100--106},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621681},
  doi          = {10.1109/ISSS.1997.621681},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PaskoSDD97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Sentovich97,
  author       = {Ellen Sentovich},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Quick Conservative Causality Analysis},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {2--8},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621669},
  doi          = {10.1109/ISSS.1997.621669},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Sentovich97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SlockWCJ97,
  author       = {Peter Slock and
                  Sven Wuytack and
                  Francky Catthoor and
                  Gjalt G. de Jong},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Fast and Extensive System-Level Memory Exploration for {ATM} Applications},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {74--81},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621678},
  doi          = {10.1109/ISSS.1997.621678},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SlockWCJ97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Vahid97,
  author       = {Frank Vahid},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Port Calling: {A} Transformation for Reducing {I/O} during Multi-Package
                  Functional Partitioning},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {107--112},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621682},
  doi          = {10.1109/ISSS.1997.621682},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Vahid97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/VercauterenVJL97,
  author       = {Steven Vercauteren and
                  Diederik Verkest and
                  Gjalt G. de Jong and
                  Bill Lin},
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Derivation of Formal Representations from Process-Based Specification
                  and Implementation Models},
  booktitle    = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  pages        = {16},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ISSS.1997.621671},
  doi          = {10.1109/ISSS.1997.621671},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/VercauterenVJL97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1997,
  editor       = {Frank Vahid and
                  Francky Catthoor},
  title        = {Proceedings of the 10th International Symposium on System Synthesis,
                  {ISSS} '97, Antwerp, Belgium, September 17-19, 1997},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1997},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/4904/proceeding},
  isbn         = {0-8186-7949-2},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1997.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AraujoSM96,
  author       = {Guido Araujo and
                  Ashok Sudarsanam and
                  Sharad Malik},
  title        = {Instruction Set Design and Optimizations for Address Computation in
                  {DSP} Architectures},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {102--107},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565889},
  doi          = {10.1109/ISSS.1996.565889},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/AraujoSM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalboniFVS96,
  author       = {Alessandro Balboni and
                  William Fornaciari and
                  Massimo Vincenzi and
                  Donatella Sciuto},
  title        = {The Use of a Virtual Instruction Set for the Software Synthesis of
                  {HW/SW} Embedded Systems},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {77--82},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565883},
  doi          = {10.1109/ISSS.1996.565883},
  timestamp    = {Tue, 29 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/BalboniFVS96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BeckS96,
  author       = {James E. Beck and
                  Daniel P. Siewiorek},
  title        = {Modeling Multicomputer Task Allocation as a Vector Packing Problem},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {115--120},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565892},
  doi          = {10.1109/ISSS.1996.565892},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BeckS96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BeniniVCM96,
  author       = {Luca Benini and
                  Patrick Vuillod and
                  Claudionor Jos{\'{e}} Nunes Coelho Jr. and
                  Giovanni De Micheli},
  title        = {Synthesis of Low-Power Selectively-Clocked Systems from High-Level
                  Specification},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {57},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565878},
  doi          = {10.1109/ISSS.1996.565878},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BeniniVCM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BlytheW96,
  author       = {Stephen A. Blythe and
                  Robert A. Walker},
  title        = {Toward a Practical Methodology for Completely Characterizing the Optimal
                  Design Space},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {8--13},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565870},
  doi          = {10.1109/ISSS.1996.565870},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/BlytheW96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DocyHP96,
  author       = {Stephen Docy and
                  Inki Hong and
                  Miodrag Potkonjak},
  title        = {Throughput Optimization in Disk-Based Real-Time Application Specific
                  Systems},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {133--138},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565895},
  doi          = {10.1109/ISSS.1996.565895},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DocyHP96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ElesPKD96,
  author       = {Petru Eles and
                  Zebo Peng and
                  Krzysztof Kuchcinski and
                  Alex Doboli},
  title        = {Hardware/Software Partitioning with Iterative Improvement Heuristics},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {71--76},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565881},
  doi          = {10.1109/ISSS.1996.565881},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ElesPKD96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/FreundIRBABG96,
  author       = {Laurent Freund and
                  Michel Isra{\"{e}}l and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  J. M. Berg{\'{e}} and
                  Michel Auguin and
                  C{\'{e}}cile Belleudy and
                  Guy Gogniat},
  title        = {A Codesign Experiment in Acoustic Echo Cancellation: GMDFa},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {83},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565884},
  doi          = {10.1109/ISSS.1996.565884},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/FreundIRBABG96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GasteierG96,
  author       = {Michael Gasteier and
                  Manfred Glesner},
  title        = {Bus-Based Communication Synthesis on System-Level},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {65--70},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565880},
  doi          = {10.1109/ISSS.1996.565880},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GasteierG96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HsuRP96,
  author       = {Frank F. Hsu and
                  Elizabeth M. Rudnick and
                  Janak H. Patel},
  title        = {Testability Insertion in Behavioral Descriptions},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {139--144},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565896},
  doi          = {10.1109/ISSS.1996.565896},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HsuRP96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KochKR96,
  author       = {Gernot Koch and
                  Udo Kebschull and
                  Wolfgang Rosenstiel},
  title        = {Breakpoints and Breakpoint Detection in Source Level Emulation},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {26},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISSS.1996.565873},
  doi          = {10.1109/ISSS.1996.565873},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KochKR96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeePW96,
  author       = {Chunho Lee and
                  Miodrag Potkonjak and
                  Wayne H. Wolf},
  title        = {System-Level Synthesis of Application Specific Systems using A* Search
                  and Generalized Force-Directed Heuristics},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {2--7},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565869},
  doi          = {10.1109/ISSS.1996.565869},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeePW96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MirandaCJM96,
  author       = {Miguel Miranda and
                  Francky Catthoor and
                  Martin Janssen and
                  Hugo De Man},
  title        = {{ADOPT:} Efficient Hardware Address Generation in Distributed Memory
                  Architectures},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {20--25},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565872},
  doi          = {10.1109/ISSS.1996.565872},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MirandaCJM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MunchGW96,
  author       = {Michael M{\"{u}}nch and
                  Manfred Glesner and
                  Norbert Wehn},
  title        = {An Efficient ILP-Based Scheduling Algorithm for Control-Dominated
                  {VHDL} Descriptions},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {45--50},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565876},
  doi          = {10.1109/ISSS.1996.565876},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MunchGW96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ObergKH96,
  author       = {Johnny {\"{O}}berg and
                  Anshul Kumar and
                  Ahmed Hemani},
  title        = {Grammar-Based Hardware Synthesis of Data Communication Protocols},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {14--19},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565871},
  doi          = {10.1109/ISSS.1996.565871},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ObergKH96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PandaDN96,
  author       = {Preeti Ranjan Panda and
                  Nikil D. Dutt and
                  Alexandru Nicolau},
  title        = {Memory Organization for Improved Data Cache Performance in Embedded
                  Processors},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {90--95},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565886},
  doi          = {10.1109/ISSS.1996.565886},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PandaDN96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SantosHEEJ96,
  author       = {Luiz C. V. dos Santos and
                  Marc J. M. Heijligers and
                  C. A. J. van Eijk and
                  Jos T. J. van Eijndhoven and
                  Jochen A. G. Jess},
  title        = {A Constructive Method for Exploiting Code Motion},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {51--56},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565877},
  doi          = {10.1109/ISSS.1996.565877},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SantosHEEJ96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SuLHL96,
  author       = {Alan Su and
                  Ta{-}Yung Liu and
                  Yu{-}Chin Hsu and
                  Mike Tien{-}Chien Lee},
  title        = {Eliminating False Loops Caused by Sharing in Control Path},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {39--44},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565875},
  doi          = {10.1109/ISSS.1996.565875},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SuLHL96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/TomiyamaY96,
  author       = {Hiroyuki Tomiyama and
                  Hiroto Yasuura},
  title        = {Size-Constrained Code Placement for Cache Miss Rate Reduction},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {96--104},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565887},
  doi          = {10.1109/ISSS.1996.565887},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/TomiyamaY96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/VahidLH96,
  author       = {Frank Vahid and
                  Thuy Dm Le and
                  Yu{-}Chin Hsu},
  title        = {A Comparison of Functional and Structural Partitioning},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {121--126},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565893},
  doi          = {10.1109/ISSS.1996.565893},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/VahidLH96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WuytackCJLM96,
  author       = {Sven Wuytack and
                  Francky Catthoor and
                  Gjalt G. de Jong and
                  Bill Lin and
                  Hugo De Man},
  title        = {Flow Graph Balancing for Minimizing the Required Memory Bandwidth},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {127--132},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565894},
  doi          = {10.1109/ISSS.1996.565894},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WuytackCJLM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/XuK96,
  author       = {Min Xu and
                  Fadi J. Kurdahi},
  title        = {Layout-Driven {RTL} Binding Techniques for High-Level Synthesis},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {33--38},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565874},
  doi          = {10.1109/ISSS.1996.565874},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/XuK96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ZivojnovicPSWSM96,
  author       = {Vojin Zivojnovic and
                  Stefan Pees and
                  C. Sch{\"{a}}lger and
                  Markus Willems and
                  Rainer Schoenen and
                  Heinrich Meyr},
  title        = {{DSP} Processor/Compiler Co-Design: {A} Quantitative Approach},
  booktitle    = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  pages        = {108},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISSS.1996.565890},
  doi          = {10.1109/ISSS.1996.565890},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ZivojnovicPSWSM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1996,
  title        = {Proceedings of the 9th International Symposium on System Synthesis,
                  {ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1996},
  url          = {http://dl.acm.org/citation.cfm?id=524431},
  isbn         = {0-8186-7563-2},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1996.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AdamsT95,
  author       = {Jay K. Adams and
                  Donald E. Thomas},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Multiple-process behavioral synthesis for mixed hardware-software
                  systems},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {10--15},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224489},
  doi          = {10.1145/224486.224489},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/AdamsT95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AraujoM95,
  author       = {Guido Araujo and
                  Sharad Malik},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Optimal code generation for embedded memory non-homogeneous register
                  architectures},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {36--41},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224493},
  doi          = {10.1145/224486.224493},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/AraujoM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChaudhuriBW95,
  author       = {Samit Chaudhuri and
                  Stephen A. Blythe and
                  Robert A. Walker},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {An exact methodology for scheduling in a 3D design space},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {78--83},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224505},
  doi          = {10.1145/224486.224505},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChaudhuriBW95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChouOB95,
  author       = {Pai H. Chou and
                  Ross B. Ortega and
                  Gaetano Borriello},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {The Chinook hardware/software co-synthesis system},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {22--27},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224491},
  doi          = {10.1145/224486.224491},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChouOB95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DaveauIJ95,
  author       = {Jean{-}Marc Daveau and
                  Tarek Ben Ismail and
                  Ahmed Amine Jerraya},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Synthesis of system-level communication by an allocation-based approach},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {150--155},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224534},
  doi          = {10.1145/224486.224534},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/DaveauIJ95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GenoeVW95,
  author       = {Mark Genoe and
                  Paul Vanoostende and
                  Geert van Wauwe},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {On the use of VHDL-based behavioral synthesis for telecom {ASIC} design},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {96--103},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224514},
  doi          = {10.1145/224486.224514},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GenoeVW95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HenkelE95,
  author       = {J{\"{o}}rg Henkel and
                  Rolf Ernst},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {A path-based technique for estimating hardware runtime in HW/SW-cosynthesis},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {116--121},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224527},
  doi          = {10.1145/224486.224527},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HenkelE95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KolsonNDK95,
  author       = {David J. Kolson and
                  Alexandru Nicolau and
                  Nikil D. Dutt and
                  Ken Kennedy},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Optimal register assignment to loops for embedded code generation},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {42--47},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224494},
  doi          = {10.1145/224486.224494},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KolsonNDK95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeeTMF95,
  author       = {Mike Tien{-}Chien Lee and
                  Vivek Tiwari and
                  Sharad Malik and
                  Masahiro Fujita},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Power analysis and low-power scheduling techniques for embedded {DSP}
                  software},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {110--115},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224525},
  doi          = {10.1145/224486.224525},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/LeeTMF95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersM95,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Time-constrained code compaction for DSPs},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {54--59},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224498},
  doi          = {10.1145/224486.224498},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LiemPCJ95,
  author       = {Clifford Liem and
                  Pierre G. Paulin and
                  Marco Cornero and
                  Ahmed Amine Jerraya},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Industrial experience using rule-driven retargetable code generation
                  for multimedia applications},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {60--68},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224499},
  doi          = {10.1145/224486.224499},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LiemPCJ95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MadsenH95,
  author       = {Jan Madsen and
                  Bjarne Hald},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {An approach to interface synthesis},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {16--21},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224490},
  doi          = {10.1145/224486.224490},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MadsenH95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MusollC95,
  author       = {Enric Musoll and
                  Jordi Cortadella},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Scheduling and resource binding for low power},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {104--109},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224523},
  doi          = {10.1145/224486.224523},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MusollC95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/OhmKDX95,
  author       = {Seong Yong Ohm and
                  Fadi J. Kurdahi and
                  Nikil D. Dutt and
                  Min Xu},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {A comprehensive estimation technique for high-level synthesis},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {122--127},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224528},
  doi          = {10.1145/224486.224528},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/OhmKDX95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PandaD95,
  author       = {Preeti Ranjan Panda and
                  Nikil D. Dutt},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {1995 high level synthesis design repository},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {170--174},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224537},
  doi          = {10.1145/224486.224537},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PandaD95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ParkinsonP95,
  author       = {Matthew F. Parkinson and
                  Sri Parameswaran},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Profiling in the {ASP} codesign environment},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {128--133},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224531},
  doi          = {10.1145/224486.224531},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ParkinsonP95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PlogerWLC95,
  author       = {Paul{-}Gerhard Pl{\"{o}}ger and
                  J{\"{o}}rg Wilberg and
                  Michel Langevin and
                  Raul Camposano},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {{WWW} based structuring of codesigns},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {138--143},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224532},
  doi          = {10.1145/224486.224532},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PlogerWLC95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SamsomFCM95,
  author       = {Hans Samsom and
                  Frank H. M. Franssen and
                  Francky Catthoor and
                  Hugo De Man},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {System level verification of video and image processing specifications},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {144--149},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224533},
  doi          = {10.1145/224486.224533},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SamsomFCM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SchaumontVBM95,
  author       = {Patrick Schaumont and
                  Bart Vanthournout and
                  Ivo Bolsens and
                  Hugo De Man},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Synthesis of pipelined {DSP} accelerators with dynamic scheduling},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {72--77},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224503},
  doi          = {10.1145/224486.224503},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SchaumontVBM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SchmitT95,
  author       = {Herman Schmit and
                  Donald E. Thomas},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Array mapping in behavioral synthesis},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {90--95},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224508},
  doi          = {10.1145/224486.224508},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SchmitT95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SchwiegershausenP95,
  author       = {Markus Schwiegershausen and
                  Peter Pirsch},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {A system level design methodology for the optimization of heterogeneous
                  multiprocessors},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {162--169},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224536},
  doi          = {10.1145/224486.224536},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SchwiegershausenP95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Sifakis95,
  author       = {Joseph Sifakis},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Real-time systems specification and verification},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {69},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224502},
  doi          = {10.1145/224486.224502},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Sifakis95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/TeichTL95,
  author       = {J{\"{u}}rgen Teich and
                  Lothar Thiele and
                  Edward A. Lee},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Modeling and simulation of heterogeneous real-time systems based on
                  a deterministic discrete event model},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {156--161},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224535},
  doi          = {10.1145/224486.224535},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/TeichTL95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ThoenCGM95,
  author       = {Filip Thoen and
                  Marco Cornero and
                  Gert Goossens and
                  Hugo De Man},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Real-time multi-tasking in software synthesis for information processing
                  systems},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {48--53},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224496},
  doi          = {10.1145/224486.224496},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ThoenCGM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Vahid95,
  author       = {Frank Vahid},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Procedure exlining: a transformation for improved system and behavioral
                  synthesis},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {84--89},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224506},
  doi          = {10.1145/224486.224506},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Vahid95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/VahidG95,
  author       = {Frank Vahid and
                  Daniel D. Gajski},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Clustering for improved system-level functional partitioning},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {28--35},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224492},
  doi          = {10.1145/224486.224492},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/VahidG95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/YenW95,
  author       = {Ti{-}Yen Yen and
                  Wayne H. Wolf},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Sensitivity-driven co-synthesis of distributed embedded systems},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {4--9},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224488},
  doi          = {10.1145/224486.224488},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/YenW95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1995,
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486},
  doi          = {10.1145/224486},
  isbn         = {0-89791-771-5},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1995.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/AngD94,
  author       = {Roger P. Ang and
                  Nikil D. Dutt},
  editor       = {Pierre G. Paulin},
  title        = {An algorithm for the allocation of functional units from realistic
                  {RT} component libraries},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {164--169},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302325},
  doi          = {10.1109/ISHLS.1994.302325},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/AngD94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ArnsteinT94,
  author       = {Lawrence F. Arnstein and
                  Donald E. Thomas},
  editor       = {Pierre G. Paulin},
  title        = {Applications of attributed-behavior synthesis},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {29--34},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302345},
  doi          = {10.1109/ISHLS.1994.302345},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ArnsteinT94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChaudhuriW94,
  author       = {Samit Chaudhuri and
                  Robert A. Walker},
  editor       = {Pierre G. Paulin},
  title        = {Computing lower bounds on functional units before scheduling},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {36--41},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302344},
  doi          = {10.1109/ISHLS.1994.302344},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChaudhuriW94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChenP94,
  author       = {Chih{-}Tung Chen and
                  Alice C. Parker},
  editor       = {Pierre G. Paulin},
  title        = {A hybrid numeric/symbolic program for checking functional and timing
                  compatibility of synthesized designs},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {112--117},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302333},
  doi          = {10.1109/ISHLS.1994.302333},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChenP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/ChengL94,
  author       = {Wei{-}Kai Cheng and
                  Youn{-}Long Lin},
  editor       = {Pierre G. Paulin},
  title        = {Code generation for a {DSP} processor},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {82--87},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302337},
  doi          = {10.1109/ISHLS.1994.302337},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/ChengL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/EscalanteD94,
  author       = {Marco A. Escalante and
                  Nikitas J. Dimopoulos},
  editor       = {Pierre G. Paulin},
  title        = {Timing analysis for synthesis in microprocessor interface design},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {23--28},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302346},
  doi          = {10.1109/ISHLS.1994.302346},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/EscalanteD94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GuptaP94,
  author       = {Pravil Gupta and
                  Alice C. Parker},
  editor       = {Pierre G. Paulin},
  title        = {{SMASH:} a program for scheduling memory-intensive application-specific
                  hardware},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {54--59},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302341},
  doi          = {10.1109/ISHLS.1994.302341},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GuptaP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/GutberletR94,
  author       = {Peter Gutberlet and
                  Wolfgang Rosenstiel},
  editor       = {Pierre G. Paulin},
  title        = {Specification of interface components for synchronous data paths},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {134--139},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302330},
  doi          = {10.1109/ISHLS.1994.302330},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/GutberletR94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HuangW94,
  author       = {Steve C.{-}Y. Huang and
                  Wayne H. Wolf},
  editor       = {Pierre G. Paulin},
  title        = {How datapath allocation affects controller delay},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {158--163},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302326},
  doi          = {10.1109/ISHLS.1994.302326},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/HuangW94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/JanssenCM94,
  author       = {Martin Janssen and
                  Francky Catthoor and
                  Hugo De Man},
  editor       = {Pierre G. Paulin},
  title        = {A specification invariant technique for operation cost minimisation
                  in flow-graphs},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {146--151},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302328},
  doi          = {10.1109/ISHLS.1994.302328},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/JanssenCM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KalavadeL94,
  author       = {Asawaree Kalavade and
                  Edward A. Lee},
  editor       = {Pierre G. Paulin},
  title        = {A methodology for simulation and synthesis of mixed hardware/software
                  systems},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {10},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302349},
  doi          = {10.1109/ISHLS.1994.302349},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KalavadeL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KarriHO94,
  author       = {Ramesh Karri and
                  Karin H{\"{o}}gstedt and
                  Alex Orailoglu},
  editor       = {Pierre G. Paulin},
  title        = {Rapid prototyping of fault-tolerant {VLSI} systems},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {126--131},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302331},
  doi          = {10.1109/ISHLS.1994.302331},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KarriHO94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/KudvaA94,
  author       = {Prabhakar Kudva and
                  Venkatesh Akella},
  editor       = {Pierre G. Paulin},
  title        = {Testing two-phase transition signaling based self-timed circuits in
                  a synthesis environment},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {104--111},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302334},
  doi          = {10.1109/ISHLS.1994.302334},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/KudvaA94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LanneerCGM94,
  author       = {Dirk Lanneer and
                  Marco Cornero and
                  Gert Goossens and
                  Hugo De Man},
  editor       = {Pierre G. Paulin},
  title        = {Data routing: a paradigm for efficient data-path synthesis and code
                  generation},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {17--22},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302347},
  doi          = {10.1109/ISHLS.1994.302347},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LanneerCGM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersSM94,
  author       = {Rainer Leupers and
                  Wolfgang Schenk and
                  Peter Marwedel},
  editor       = {Pierre G. Paulin},
  title        = {Retargetable assembly code generation by bootstrapping},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {88--93},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302336},
  doi          = {10.1109/ISHLS.1994.302336},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersSM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Mancini94,
  author       = {Giovanni Mancini},
  editor       = {Pierre G. Paulin},
  title        = {Hardware/software co-verification in {ATM}},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {1--7},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302350},
  doi          = {10.1109/ISHLS.1994.302350},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Mancini94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Marwedel94,
  author       = {Peter Marwedel},
  editor       = {Pierre G. Paulin},
  title        = {ASICs vs ASIPs (panel)},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {132},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=254455},
  timestamp    = {Wed, 06 Aug 2014 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/Marwedel94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/MintzD94,
  author       = {Doron Mintz and
                  Carlos Dangelo},
  editor       = {Pierre G. Paulin},
  title        = {Timing estimation for behavioral descriptions},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {42--47},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302343},
  doi          = {10.1109/ISHLS.1994.302343},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/MintzD94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PaulinLMS94,
  author       = {Pierre G. Paulin and
                  Clifford Liem and
                  Trevor C. May and
                  Shailesh Sutarwala},
  editor       = {Pierre G. Paulin},
  title        = {CodeSyn: a retargetable code synthesis system (abstract)},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {94},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=254241},
  timestamp    = {Wed, 06 Aug 2014 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/PaulinLMS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PraetGLM94,
  author       = {Johan Van Praet and
                  Gert Goossens and
                  Dirk Lanneer and
                  Hugo De Man},
  editor       = {Pierre G. Paulin},
  title        = {Instruction set definition and instruction selection for ASIPs},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {11--16},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302348},
  doi          = {10.1109/ISHLS.1994.302348},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PraetGLM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/PuriG94,
  author       = {Ruchir Puri and
                  Jun Gu},
  editor       = {Pierre G. Paulin},
  title        = {A divide-and-conquer approach for asynchronous interface synthesis},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {118--125},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302332},
  doi          = {10.1109/ISHLS.1994.302332},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/PuriG94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RadivojevicB94,
  author       = {Ivan P. Radivojevic and
                  Forrest Brewer},
  editor       = {Pierre G. Paulin},
  title        = {Ensemble representation and techniques for exact control-dependent
                  scheduling},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {60--65},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302340},
  doi          = {10.1109/ISHLS.1994.302340},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RadivojevicB94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RaoK94,
  author       = {D. Sreenivasa Rao and
                  Fadi J. Kurdahi},
  editor       = {Pierre G. Paulin},
  title        = {Controller and datapath trade-offs in hierarchical RT-level synthesis},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {152--157},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302327},
  doi          = {10.1109/ISHLS.1994.302327},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/RaoK94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SchoofsGM94,
  author       = {Koen Schoofs and
                  Gert Goossens and
                  Hugo De Man},
  editor       = {Pierre G. Paulin},
  title        = {Bit-alignment for retargetable code generators},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {76--81},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302338},
  doi          = {10.1109/ISHLS.1994.302338},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SchoofsGM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SheligaS94,
  author       = {Michael Sheliga and
                  Edwin Hsing{-}Mean Sha},
  editor       = {Pierre G. Paulin},
  title        = {Global node reduction of linear systems using ratio analysis},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {140--145},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302329},
  doi          = {10.1109/ISHLS.1994.302329},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SheligaS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/SinghK94,
  author       = {Ravibala Singh and
                  John Knight},
  editor       = {Pierre G. Paulin},
  title        = {Concurrent testing in high-level synthesis},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {96--103},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302335},
  doi          = {10.1109/ISHLS.1994.302335},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/SinghK94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Stok94,
  author       = {Leon Stok},
  editor       = {Pierre G. Paulin},
  title        = {Is high-level synthesis marketable? (panel)},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {66},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=254230},
  timestamp    = {Wed, 06 Aug 2014 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/Stok94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WerfMAVL94,
  author       = {Albert van der Werf and
                  Jef L. van Meerbergen and
                  Emile H. L. Aarts and
                  Wim F. J. Verhaegh and
                  Paul E. R. Lippens},
  editor       = {Pierre G. Paulin},
  title        = {Efficient timing constraint derivation for optimal retiming high speed
                  processing units},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {48--53},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302342},
  doi          = {10.1109/ISHLS.1994.302342},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WerfMAVL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WilsonGHB94,
  author       = {Thomas Charles Wilson and
                  Gary Gr{\'{e}}wal and
                  Ben Halley and
                  Dilip K. Banerji},
  editor       = {Pierre G. Paulin},
  title        = {An integrated approach to retargetable code generation},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {70--75},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302339},
  doi          = {10.1109/ISHLS.1994.302339},
  timestamp    = {Mon, 26 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/WilsonGHB94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Zadeck94,
  author       = {F. Kenneth Zadeck},
  editor       = {Pierre G. Paulin},
  title        = {State-of-the-art compiler optimization},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {67--68},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=254231},
  timestamp    = {Wed, 06 Aug 2014 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/Zadeck94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isss/1994,
  editor       = {Pierre G. Paulin},
  title        = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/974/proceeding},
  isbn         = {0-8186-5785-5},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/1994.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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