:facetid:toc:\"db/journals/taco/taco12.bht\"
OK
:facetid:toc:db/journals/taco/taco12.bht
Tomi ÄijöPekka JääskeläinenTapio ElomaaHeikki KultalaJarmo TakalaInteger Linear Programming-Based Scheduling for Transport Triggered Architectures.ACM Trans. Archit. Code Optim.12459:1-59:222016Journal Articlesopenjournals/taco/AijoJEKT1610.1145/2845082https://doi.org/10.1145/2845082https://dblp.org/rec/journals/taco/AijoJEKT16
URL#3178232
Andrew Anderson 0001Avinash MalikDavid GreggAutomatic Vectorization of Interleaved Data Revisited.ACM Trans. Archit. Code Optim.12450:1-50:252016Journal Articlesopenjournals/taco/AndersonMG1610.1145/2838735https://doi.org/10.1145/2838735https://dblp.org/rec/journals/taco/AndersonMG16
URL#3178236
Ehsan K. ArdestaniRafael Trapani PossignoloJosé Luis BrizJose RenauManaging Mismatches in Voltage Stacking with CoreUnfolding.ACM Trans. Archit. Code Optim.12443:1-43:262016Journal Articlesopenjournals/taco/ArdestaniPBR1610.1145/2835178https://doi.org/10.1145/2835178https://dblp.org/rec/journals/taco/ArdestaniPBR16
URL#3178238
Unnikrishnan C.Rupesh NasreY. N. SrikantFalcon: A Graph Manipulation Language for Heterogeneous Systems.ACM Trans. Archit. Code Optim.12454:1-54:272016Journal Articlesopenjournals/taco/CNS1610.1145/2842618https://doi.org/10.1145/2842618https://dblp.org/rec/journals/taco/CNS16
URL#3178242
Riccardo CattaneoGiuseppe NataleCarlo SicignanoDonatella SciutoMarco Domenico SantambrogioOn How to Accelerate Iterative Stencil Loops: A Scalable Streaming-Based Approach.ACM Trans. Archit. Code Optim.12453:1-53:262016Journal Articlesopenjournals/taco/CattaneoNSSS1610.1145/2842615https://doi.org/10.1145/2842615https://dblp.org/rec/journals/taco/CattaneoNSSS16
URL#3178243
Dimitrios ChasapisMarc CasasMiquel MoretóRaul VidalEduard AyguadéJesús LabartaMateo ValeroPARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite.ACM Trans. Archit. Code Optim.12441:1-41:222016Journal Articlesopenjournals/taco/ChasapisCMVALV1610.1145/2829952https://doi.org/10.1145/2829952https://dblp.org/rec/journals/taco/ChasapisCMVALV16
URL#3178244
Sandeep D'SouzaSoumya J.Santanu ChattopadhyayIntegrated Mapping and Synthesis Techniques for Network-on-Chip Topologies with Express Channels.ACM Trans. Archit. Code Optim.12440:1-40:262016Journal Articlesopenjournals/taco/DSouzaJC1610.1145/2831233https://doi.org/10.1145/2831233https://dblp.org/rec/journals/taco/DSouzaJC16
URL#3178250
Subhasis DasTor M. AamodtWilliam J. DallyReuse Distance-Based Probabilistic Cache Replacement.ACM Trans. Archit. Code Optim.12433:1-33:222016Journal Articlesopenjournals/taco/DasAD1610.1145/2818374https://doi.org/10.1145/2818374https://dblp.org/rec/journals/taco/DasAD16
URL#3178253
Etem DenizAlper Sen 0001MINIME-GPU: Multicore Benchmark Synthesizer for GPUs.ACM Trans. Archit. Code Optim.12434:1-34:252016Journal Articlesopenjournals/taco/Deniz01610.1145/2818693https://doi.org/10.1145/2818693https://dblp.org/rec/journals/taco/Deniz016
URL#3178255
Jesse ElwellRyan RileyNael B. Abu-GhazalehDmitry V. PonomarevIliano CervesatoRethinking Memory Permissions for Protection Against Cross-Layer Attacks.ACM Trans. Archit. Code Optim.12456:1-56:272016Journal Articlesopenjournals/taco/ElwellRAPC1610.1145/2842621https://doi.org/10.1145/2842621https://dblp.org/rec/journals/taco/ElwellRAPC16
URL#3178258
Francisco GasparLuís TaniçaPedro TomásAleksandar IlicLeonel SousaA Framework for Application-Guided Task Management on Heterogeneous Embedded Systems.ACM Trans. Archit. Code Optim.12442:1-42:252016Journal Articlesopenjournals/taco/GasparTTIS1610.1145/2835177https://doi.org/10.1145/2835177https://dblp.org/rec/journals/taco/GasparTTIS16
URL#3178261
Ding-Yong HongChun-Chen HsuCheng-Yi ChouWei-Chung HsuPangfeng LiuJan-Jan WuOptimizing Control Transfer and Memory Virtualization in Full System Emulators.ACM Trans. Archit. Code Optim.12447:1-47:242016Journal Articlesopenjournals/taco/HongHCHLW1610.1145/2837027https://doi.org/10.1145/2837027https://dblp.org/rec/journals/taco/HongHCHLW16
URL#3178265
Morteza HoseinzadehMohammad ArjomandHamid Sarbazi-AzadSPCM: The Striped Phase Change Memory.ACM Trans. Archit. Code Optim.12438:1-38:252016Journal Articlesopenjournals/taco/HoseinzadehAS1610.1145/2829951https://doi.org/10.1145/2829951https://dblp.org/rec/journals/taco/HoseinzadehAS16
URL#3178266
Chuntao JiangZhibin Yu 0001Lieven EeckhoutHai Jin 0001Xiaofei LiaoCheng-Zhong Xu 0001Two-Level Hybrid Sampled Simulation of Multithreaded Applications.ACM Trans. Archit. Code Optim.12439:1-39:252016Journal Articlesopenjournals/taco/JiangYEJLX1610.1145/2818353https://doi.org/10.1145/2818353https://dblp.org/rec/journals/taco/JiangYEJLX16
URL#3178268
Morteza Mohajjel KafshdoozMohammadkazem TaramSepehr AssadiAlireza EjlaliA Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block Formation.ACM Trans. Archit. Code Optim.12466:1-66:252016Journal Articlesopenjournals/taco/KafshdoozTAE1610.1145/2845083https://doi.org/10.1145/2845083https://dblp.org/rec/journals/taco/KafshdoozTAE16
URL#3178269
Rajshekar KalayappanSmruti R. SarangiFluidCheck: A Redundant Threading-Based Approach for Reliable Execution in Manycore Processors.ACM Trans. Archit. Code Optim.12455:1-55:262016Journal Articlesopenjournals/taco/KalayappanS1610.1145/2842620https://doi.org/10.1145/2842620https://dblp.org/rec/journals/taco/KalayappanS16
URL#3178270
Byeongcheol LeeAdaptive Correction of Sampling Bias in Dynamic Call Graphs.ACM Trans. Archit. Code Optim.12445:1-45:242016Journal Articlesopenjournals/taco/Lee1610.1145/2840806https://doi.org/10.1145/2840806https://dblp.org/rec/journals/taco/Lee16
URL#3178273
Donghyuk LeeSaugata GhoseGennady PekhimenkoSamira Manabi KhanOnur MutluSimultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost.ACM Trans. Archit. Code Optim.12463:1-63:292016Journal Articlesopenjournals/taco/LeeGPKM1610.1145/2832911https://doi.org/10.1145/2832911https://dblp.org/rec/journals/taco/LeeGPKM16
URL#3178274
Qixiao LiuMiquel MoretóJaume Abella 0001Francisco J. CazorlaDaniel A. JiménezMateo ValeroSensible Energy Accounting with Abstract Metering for Multicore Systems.ACM Trans. Archit. Code Optim.12460:1-60:262016Journal Articlesopenjournals/taco/LiuMACJV1610.1145/2842616https://doi.org/10.1145/2842616https://dblp.org/rec/journals/taco/LiuMACJV16
URL#3178277
Andrew J. McPhersonVijay NagarajanSusmit SarkarMarcelo CintraFence Placement for Legacy Data-Race-Free Programs via Synchronization Read Detection.ACM Trans. Archit. Code Optim.12446:1-46:232016Journal Articlesopenjournals/taco/McPhersonNSC1610.1145/2835179https://doi.org/10.1145/2835179https://dblp.org/rec/journals/taco/McPhersonNSC16
URL#3178280
Amir MoradLeonid YavitsShahar KvatinskyRan GinosarResistive GP-SIMD Processing-In-Memory.ACM Trans. Archit. Code Optim.12457:1-57:222016Journal Articlesopenjournals/taco/MoradYKG1610.1145/2845084https://doi.org/10.1145/2845084https://dblp.org/rec/journals/taco/MoradYKG16
URL#3178283
Yeoul NaSeon Wook KimYoungsun HanJavaScript Parallelizing Compiler for Exploiting Parallelism from Data-Parallel HTML5 Applications.ACM Trans. Archit. Code Optim.12464:1-64:252016Journal Articlesopenjournals/taco/NaKH1610.1145/2846098https://doi.org/10.1145/2846098https://dblp.org/rec/journals/taco/NaKH16
URL#3178285
Prashant J. NairDavid A. RobertsMoinuddin K. QureshiFaultSim: A Fast, Configurable Memory-Reliability Simulator for Conventional and 3D-Stacked Systems.ACM Trans. Archit. Code Optim.12444:1-44:242016Journal Articlesopenjournals/taco/NairRQ1610.1145/2831234https://doi.org/10.1145/2831234https://dblp.org/rec/journals/taco/NairRQ16
URL#3178286
Prashant J. NairDavid A. RobertsMoinuddin K. QureshiCitadel: Efficiently Protecting Stacked Memory from TSV and Large Granularity Failures.ACM Trans. Archit. Code Optim.12449:1-49:242016Journal Articlesopenjournals/taco/NairRQ16a10.1145/2840807https://doi.org/10.1145/2840807https://dblp.org/rec/journals/taco/NairRQ16a
URL#3178287
Kishore Kumar PusukuriRajiv Gupta 0001Laxmi N. BhuyanTumbler: An Effective Load-Balancing Technique for Multi-CPU Multicore Systems.ACM Trans. Archit. Code Optim.12436:1-36:242016Journal Articlesopenjournals/taco/PusukuriGB1610.1145/2827698https://doi.org/10.1145/2827698https://dblp.org/rec/journals/taco/PusukuriGB16
URL#3178289
Olivier SerresAbdullah KayiAhmad AnbarTarek A. El-GhazawiEnabling PGAS Productivity with Hardware Support for Shared Address Mapping: A UPC Case Study.ACM Trans. Archit. Code Optim.12452:1-52:262016Journal Articlesopenjournals/taco/SerresKAE1610.1145/2842686https://doi.org/10.1145/2842686https://dblp.org/rec/journals/taco/SerresKAE16
URL#3178293
Aravind Sukumaran-RajamPhilippe ClaussThe Polyhedral Model of Nonlinear Loops.ACM Trans. Archit. Code Optim.12448:1-48:272016Journal Articlesopenjournals/taco/Sukumaran-Rajam1610.1145/2838734https://doi.org/10.1145/2838734https://dblp.org/rec/journals/taco/Sukumaran-Rajam16
URL#3178296
Li TanZizhong ChenShuaiwen Leon SongScalable Energy Efficiency with Resilience for High Performance Computing Systems: A Quantitative Methodology.ACM Trans. Archit. Code Optim.12435:1-35:272016Journal Articlesopenjournals/taco/TanCS1610.1145/2822893https://doi.org/10.1145/2822893https://dblp.org/rec/journals/taco/TanCS16
URL#3178298
Erik TomuskChristophe DubachMichael F. P. O'BoyleFour Metrics to Evaluate Heterogeneous Multicores.ACM Trans. Archit. Code Optim.12437:1-37:252016Journal Articlesopenjournals/taco/TomuskDO1610.1145/2829950https://doi.org/10.1145/2829950https://dblp.org/rec/journals/taco/TomuskDO16
URL#3178300
Hiroyuki UsuiLavanya SubramanianKevin Kai-Wei ChangOnur MutluDASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators.ACM Trans. Archit. Code Optim.12465:1-65:282016Journal Articlesopenjournals/taco/UsuiSCM1610.1145/2847255https://doi.org/10.1145/2847255https://dblp.org/rec/journals/taco/UsuiSCM16
URL#3178302
Yaohua WangDong WangShuming ChenZonglin LiuShenggang ChenXiaowen ChenXu ZhouIteration Interleaving-Based SIMD Lane Partition.ACM Trans. Archit. Code Optim.12458:1-58:182016Journal Articlesopenjournals/taco/WangWCLCCZ1610.1145/2847253https://doi.org/10.1145/2847253https://dblp.org/rec/journals/taco/WangWCLCCZ16
URL#3178307
Amir YazdanbakhshGennady PekhimenkoBradley ThwaitesHadi EsmaeilzadehOnur MutluTodd C. MowryRFVP: Rollback-Free Value Prediction with Safe-to-Approximate Loads.ACM Trans. Archit. Code Optim.12462:1-62:262016Journal Articlesopenjournals/taco/YazdanbakhshPTE1610.1145/2836168https://doi.org/10.1145/2836168https://dblp.org/rec/journals/taco/YazdanbakhshPTE16
URL#3178311
Lihang ZhaoLizhong ChenWoojin ChoiJeffrey T. DraperA Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction Execution.ACM Trans. Archit. Code Optim.12451:1-51:262016Journal Articlesopenjournals/taco/ZhaoCCD1610.1145/2837028https://doi.org/10.1145/2837028https://dblp.org/rec/journals/taco/ZhaoCCD16
URL#3178314
Miao ZhouYu DuBruce R. ChildersDaniel MosséRami G. MelhemSymmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems.ACM Trans. Archit. Code Optim.12461:1-61:262016Journal Articlesopenjournals/taco/ZhouDCMM1610.1145/2847254https://doi.org/10.1145/2847254https://dblp.org/rec/journals/taco/ZhouDCMM16
URL#3178315
Raghuraman BalasubramanianVinay GangadharZiliang GuoChen-Han HoCherin JosephJaikrishnan MenonMario Paulo DrumondRobin PaulSharath PrasadPradip ValatholKarthikeyan SankaralingamEnabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU.ACM Trans. Archit. Code Optim.12221:21:1-21:21:252015Journal Articlesopenjournals/taco/Balasubramanian1510.1145/2764908https://doi.org/10.1145/2764908https://dblp.org/rec/journals/taco/Balasubramanian15
URL#3487958
Pablo de Oliveira CastroChadi AkelEric Petit 0002Mihail PopovWilliam JalbyCERE: LLVM-Based Codelet Extractor and REplayer for Piecewise Benchmarking and Optimization.ACM Trans. Archit. Code Optim.1216:1-6:242015Journal Articlesopenjournals/taco/CastroAPPJ1510.1145/2724717https://doi.org/10.1145/2724717https://dblp.org/rec/journals/taco/CastroAPPJ15
URL#3487959
Quan Chen 0002Minyi GuoLocality-Aware Work Stealing Based on Online Profiling and Auto-Tuning for Multisocket Multicore Architectures.ACM Trans. Archit. Code Optim.12222:1-22:242015Journal Articlesopenjournals/taco/ChenG1510.1145/2766450https://doi.org/10.1145/2766450https://dblp.org/rec/journals/taco/ChenG15
URL#3487960
Hsiang-Yun ChengMatt PorembaNarges ShahidiIvan StalevMary Jane IrwinMahmut T. KandemirJack SampsonYuan Xie 0001EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors.ACM Trans. Archit. Code Optim.12217:1-17:222015Journal Articlesopenjournals/taco/ChengPSSIKS01510.1145/2756552https://doi.org/10.1145/2756552https://dblp.org/rec/journals/taco/ChengPSSIKS015
URL#3487961
Madan Mohan DasGabriel SouthernJose RenauSection-Based Program Analysis to Reduce Overhead of Detecting Unsynchronized Thread Communication.ACM Trans. Archit. Code Optim.12223:23:1-23:23:262015Journal Articlesopenjournals/taco/DasSR1510.1145/2766451https://doi.org/10.1145/2766451https://dblp.org/rec/journals/taco/DasSR15
URL#3487962
Mahdad DavariAlberto Ros 0001Erik HagerstenStefanos KaxirasThe Effects of Granularity and Adaptivity on Private/Shared Classification for Coherence.ACM Trans. Archit. Code Optim.12326:1-26:212015Journal Articlesopenjournals/taco/DavariRHK1510.1145/2790301https://doi.org/10.1145/2790301https://dblp.org/rec/journals/taco/DavariRHK15
URL#3487963
Shuangde FangWenwen XuYang ChenLieven EeckhoutOlivier TemamYunji ChenChengyong WuXiaobing Feng 0002Practical Iterative Optimization for the Data Center.ACM Trans. Archit. Code Optim.12215:1-15:262015Journal Articlesopenjournals/taco/FangXCETCW01510.1145/2739048https://doi.org/10.1145/2739048https://dblp.org/rec/journals/taco/FangXCETCW015
URL#3487964
Benedict R. GasterDerek HowerLee W. HowesHRF-Relaxed: Adapting HRF to the Complexities of Industrial Heterogeneous Memory Models.ACM Trans. Archit. Code Optim.1217:1-7:262015Journal Articlesopenjournals/taco/GasterHH1510.1145/2701618https://doi.org/10.1145/2701618https://dblp.org/rec/journals/taco/GasterHH15
URL#3487965
Mark GottschoAbbas BanaiyanMofradNikil D. DuttAlex NicolauPuneet Gupta 0001DPCS: Dynamic Power/Capacity Scaling for SRAM Caches in the Nanoscale Era.ACM Trans. Archit. Code Optim.12327:1-27:262015Journal Articlesopenjournals/taco/GottschoBDNG1510.1145/2792982https://doi.org/10.1145/2792982https://dblp.org/rec/journals/taco/GottschoBDNG15
URL#3487966
Beayna GrigorianGlenn ReinmanAccelerating Divergent Applications on SIMD Architectures Using Neural Networks.ACM Trans. Archit. Code Optim.1212:1-2:232015Journal Articlesopenjournals/taco/GrigorianR1510.1145/2717311https://doi.org/10.1145/2717311https://dblp.org/rec/journals/taco/GrigorianR15
URL#3487967
Anup HoleyVineeth MekkatPen-Chung YewAntonia ZhaiPerformance-Energy Considerations for Shared Cache Management in a Heterogeneous Multicore Processor.ACM Trans. Archit. Code Optim.1213:1-3:292015Journal Articlesopenjournals/taco/HoleyMYZ1510.1145/2710019https://doi.org/10.1145/2710019https://dblp.org/rec/journals/taco/HoleyMYZ15
URL#3487968
Wenhao JiaElba GarzaKelly A. Shaw 0001Margaret MartonosiGPU Performance and Power Tuning Using Regression Trees.ACM Trans. Archit. Code Optim.12213:1-13:262015Journal Articlesopenjournals/taco/JiaGSM1510.1145/2736287https://doi.org/10.1145/2736287https://dblp.org/rec/journals/taco/JiaGSM15
URL#3487969
Morteza Mohajjel KafshdoozAlireza EjlaliDynamic Shared SPM Reuse for Real-Time Multicore Embedded Systems.ACM Trans. Archit. Code Optim.12212:1-12:252015Journal Articlesopenjournals/taco/KafshdoozE1510.1145/2738051https://doi.org/10.1145/2738051https://dblp.org/rec/journals/taco/KafshdoozE15
URL#3487970
Arun K. KanuparthiRamesh KarriReliable Integrity Checking in Multicore Processors.ACM Trans. Archit. Code Optim.12210:1-10:232015Journal Articlesopenjournals/taco/KanuparthiK1510.1145/2738052https://doi.org/10.1145/2738052https://dblp.org/rec/journals/taco/KanuparthiK15
URL#3487971
Naghmeh KarimiArun Karthik KanuparthiXueyang WangOzgur SinanogluRamesh KarriMAGIC: Malicious Aging in Circuits/Cores.ACM Trans. Archit. Code Optim.1215:1-5:252015Journal Articlesopenjournals/taco/KarimiKWSK1510.1145/2724718https://doi.org/10.1145/2724718https://dblp.org/rec/journals/taco/KarimiKWSK15
URL#3487972
Do-Heon LeeSu-Kyung YoonJung-Geun KimCharles C. WeemsShin-Dug KimA New Memory-Disk Integrated System with HW Optimizer.ACM Trans. Archit. Code Optim.12211:1-11:232015Journal Articlesopenjournals/taco/LeeYKWK1510.1145/2738053https://doi.org/10.1145/2738053https://dblp.org/rec/journals/taco/LeeYKWK15
URL#3487973
Chung-Hsiang LinDe-Yu ShenYi-Jung ChenChia-Lin YangCheng-Yuan Michael WangSECRET: A Selective Error Correction Framework for Refresh Energy Reduction in DRAMs.ACM Trans. Archit. Code Optim.12219:19:1-19:19:242015Journal Articlesopenjournals/taco/LinSCYW1510.1145/2747876https://doi.org/10.1145/2747876https://dblp.org/rec/journals/taco/LinSCYW15
URL#3487974
Atieh LotfiAbbas RahimiLuca BeniniRajesh K. Gupta 0001Aging-Aware Compilation for GP-GPUs.ACM Trans. Archit. Code Optim.12224:1-24:202015Journal Articlesopenjournals/taco/LotfiRBG1510.1145/2778984https://doi.org/10.1145/2778984https://dblp.org/rec/journals/taco/LotfiRBG15
URL#3487975
Jan LucasMichael AnderschMauricio Alvarez-MesaBen H. H. JuurlinkSpatiotemporal SIMT and Scalarization for Improving GPU Efficiency.ACM Trans. Archit. Code Optim.12332:1-32:262015Journal Articlesopenjournals/taco/LucasAMJ1510.1145/2811402https://doi.org/10.1145/2811402https://dblp.org/rec/journals/taco/LucasAMJ15
URL#3487976
Pierre MichaudAndrea MondelliAndré SeznecRevisiting Clustered Microarchitecture for Future Superscalar Cores: A Case for Wide Issue Clusters.ACM Trans. Archit. Code Optim.12328:1-28:222015Journal Articlesopenjournals/taco/MichaudMS1510.1145/2800787https://doi.org/10.1145/2800787https://dblp.org/rec/journals/taco/MichaudMS15
URL#3487977
Ragavendra NatarajanAntonia ZhaiLeveraging Transactional Execution for Memory Consistency Model Emulation.ACM Trans. Archit. Code Optim.12329:1-29:242015Journal Articlesopenjournals/taco/NatarajanZ1510.1145/2786980https://doi.org/10.1145/2786980https://dblp.org/rec/journals/taco/NatarajanZ15
URL#3487978
Irshad PananilathAravind AcharyaVinay VasistaUday BondhugulaAn Optimizing Code Generator for a Class of Lattice-Boltzmann Computations.ACM Trans. Archit. Code Optim.12214:1-14:232015Journal Articlesopenjournals/taco/PananilathAVB1510.1145/2739047https://doi.org/10.1145/2739047https://dblp.org/rec/journals/taco/PananilathAVB15
URL#3487979
Biswabandan PandaShankar BalachandranCAFFEINE: A Utility-Driven Prefetcher Aggressiveness Engine for Multicores.ACM Trans. Archit. Code Optim.12330:1-30:252015Journal Articlesopenjournals/taco/PandaB1510.1145/2806891https://doi.org/10.1145/2806891https://dblp.org/rec/journals/taco/PandaB15
URL#3487980
Brian P. RailingEric R. HeinThomas M. ConteContech: Efficiently Generating Dynamic Task Graphs for Arbitrary Parallel Programs.ACM Trans. Archit. Code Optim.12225:1-25:242015Journal Articlesopenjournals/taco/RailingHC1510.1145/2776893https://doi.org/10.1145/2776893https://dblp.org/rec/journals/taco/RailingHC15
URL#3487981
Doug SimonChristian WimmerBernhard UrbanGilles DuboscqLukas StadlerThomas WürthingerSnippets: Taking the High Road to a Low Level.ACM Trans. Archit. Code Optim.12220:20:1-20:20:252015Journal Articlesopenjournals/taco/SimonWUDSW1510.1145/2764907https://doi.org/10.1145/2764907https://dblp.org/rec/journals/taco/SimonWUDSW15
URL#3487982
Kevin StreitJohannes DoerfertClemens HammacherAndreas ZellerSebastian HackGeneralized Task Parallelism.ACM Trans. Archit. Code Optim.1218:1-8:252015Journal Articlesopenjournals/taco/StreitDHZH1510.1145/2723164https://doi.org/10.1145/2723164https://dblp.org/rec/journals/taco/StreitDHZH15
URL#3487983
Jinho SuhChieh-Ting HuangMichel Dubois 0001Dynamic MIPS Rate Stabilization for Complex Processors.ACM Trans. Archit. Code Optim.1214:1-4:252015Journal Articlesopenjournals/taco/SuhHD1510.1145/2714575https://doi.org/10.1145/2714575https://dblp.org/rec/journals/taco/SuhHD15
URL#3487984
Arjun SureshBharath Narasimha SwamyErven RohouAndré SeznecIntercepting Functions for Memoization: A Case Study Using Transcendental Functions.ACM Trans. Archit. Code Optim.12218:18:1-18:18:232015Journal Articlesopenjournals/taco/SureshSRS1510.1145/2751559https://doi.org/10.1145/2751559https://dblp.org/rec/journals/taco/SureshSRS15
URL#3487985
Hamed TabkhiGunar SchirnerA Joint SW/HW Approach for Reducing Register File Vulnerability.ACM Trans. Archit. Code Optim.1229:1-9:282015Journal Articlesopenjournals/taco/TabkhiS1510.1145/2733378https://doi.org/10.1145/2733378https://dblp.org/rec/journals/taco/TabkhiS15
URL#3487986
Tao Zhang 0046Naifeng JingKaiming JiangWei ShuMin-You WuXiaoyao LiangBuddy SM: Sharing Pipeline Front-End for Improved Energy Efficiency in GPGPUs.ACM Trans. Archit. Code Optim.12216:1-16:232015Journal Articlesopenjournals/taco/ZhangJJSWL1510.1145/2744202https://doi.org/10.1145/2744202https://dblp.org/rec/journals/taco/ZhangJJSWL15
URL#3487987
Jishen ZhaoSheng Li 0007Jichuan ChangJohn L. ByrneLaura L. RamirezKevin T. LimYuan Xie 0001Paolo FaraboschiBuri: Scaling Big-Memory Computing with Hardware-Based Memory Expansion.ACM Trans. Archit. Code Optim.12331:1-31:242015Journal Articlesopenjournals/taco/ZhaoLCBRL0F1510.1145/2808233https://doi.org/10.1145/2808233https://dblp.org/rec/journals/taco/ZhaoLCBRL0F15
URL#3487988
Christopher Zimmer 0001Frank Mueller 0001NoCMsg: A Scalable Message-Passing Abstraction for Network-on-Chips.ACM Trans. Archit. Code Optim.1211:1-1:242015Journal Articlesopenjournals/taco/ZimmerM1510.1145/2701426https://doi.org/10.1145/2701426https://dblp.org/rec/journals/taco/ZimmerM15
URL#3487989