callback( { "result":{ "query":":facetid:toc:\"db/conf/iccad/iccad2019.bht\"", "status":{ "@code":"200", "text":"OK" }, "time":{ "@unit":"msecs", "text":"222.52" }, "completions":{ "@total":"1", "@computed":"1", "@sent":"1", "c":{ "@sc":"134", "@dc":"134", "@oc":"134", "@id":"43387276", "text":":facetid:toc:db/conf/iccad/iccad2019.bht" } }, "hits":{ "@total":"134", "@computed":"134", "@sent":"134", "@first":"0", "hit":[{ "@score":"1", "@id":"2184874", "info":{"authors":{"author":[{"@pid":"221/2864","text":"Anthony Agnesina"},{"@pid":"78/9802","text":"Etienne Lepercq"},{"@pid":"277/8449","text":"Jose Escobedo"},{"@pid":"58/2235","text":"Sung Kyu Lim"}]},"title":"Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/AgnesinaLEL19","doi":"10.1109/ICCAD45719.2019.8942091","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942091","url":"https://dblp.org/rec/conf/iccad/AgnesinaLEL19"}, "url":"URL#2184874" }, { "@score":"1", "@id":"2184875", "info":{"authors":{"author":[{"@pid":"169/2344","text":"Alric Althoff"},{"@pid":"184/6168","text":"Jeremy Blackstone"},{"@pid":"15/3231","text":"Ryan Kastner"}]},"title":"Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/AlthoffBK19","doi":"10.1109/ICCAD45719.2019.8942098","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942098","url":"https://dblp.org/rec/conf/iccad/AlthoffBK19"}, "url":"URL#2184875" }, { "@score":"1", "@id":"2184876", "info":{"authors":{"author":[{"@pid":"149/0425","text":"Shaahin Angizi"},{"@pid":"129/1701","text":"Deliang Fan"}]},"title":"ReDRAM: A Reconfigurable Processing-in-DRAM Platform for Accelerating Bulk Bit-Wise Operations.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/AngiziF19","doi":"10.1109/ICCAD45719.2019.8942101","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942101","url":"https://dblp.org/rec/conf/iccad/AngiziF19"}, "url":"URL#2184876" }, { "@score":"1", "@id":"2184877", "info":{"authors":{"author":[{"@pid":"37/5204","text":"Scott Best"},{"@pid":"15/1040","text":"Xiaolin Xu"}]},"title":"An All-Digital True Random Number Generator Based on Chaotic Cellular Automata Topology.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/BestX19","doi":"10.1109/ICCAD45719.2019.8942050","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942050","url":"https://dblp.org/rec/conf/iccad/BestX19"}, "url":"URL#2184877" }, { "@score":"1", "@id":"2184878", "info":{"authors":{"author":[{"@pid":"160/7918","text":"Debjyoti Bhattacharjee"},{"@pid":"234/1490","text":"Abdullah Ash-Saki"},{"@pid":"142/7359","text":"Mahabubul Alam"},{"@pid":"99/4535","text":"Anupam Chattopadhyay"},{"@pid":"91/2072","text":"Swaroop Ghosh"}]},"title":"MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/BhattacharjeeAA19","doi":"10.1109/ICCAD45719.2019.8942132","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942132","url":"https://dblp.org/rec/conf/iccad/BhattacharjeeAA19"}, "url":"URL#2184878" }, { "@score":"1", "@id":"2184879", "info":{"authors":{"author":[{"@pid":"58/3467-3","text":"Yi Cai 0003"},{"@pid":"72/2676-3","text":"Xiaoming Chen 0003"},{"@pid":"48/913","text":"Lu Tian"},{"@pid":"w/YuWang2","text":"Yu Wang 0002"},{"@pid":"94/1128","text":"Huazhong Yang"}]},"title":"Enabling Secure in-Memory Neural Network Computing by Sparse Fast Gradient Encryption.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/CaiCTWY19","doi":"10.1109/ICCAD45719.2019.8942041","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942041","url":"https://dblp.org/rec/conf/iccad/CaiCTWY19"}, "url":"URL#2184879" }, { "@score":"1", "@id":"2184880", "info":{"authors":{"author":[{"@pid":"258/6343","text":"Alejandro J. Calderón"},{"@pid":"118/0818","text":"Leonidas Kosmidis"},{"@pid":"86/9203","text":"Carlos F. Nicolás"},{"@pid":"52/1629","text":"Francisco J. Cazorla"},{"@pid":"228/2455","text":"Peio Onaindia"}]},"title":"Understanding and Exploiting the Internals of GPU Resource Allocation for Critical Systems.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/CalderonKNCO19","doi":"10.1109/ICCAD45719.2019.8942170","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942170","url":"https://dblp.org/rec/conf/iccad/CalderonKNCO19"}, "url":"URL#2184880" }, { "@score":"1", "@id":"2184881", "info":{"authors":{"author":[{"@pid":"61/5251","text":"Weidong Cao"},{"@pid":"179/7574-1","text":"Liu Ke 0001"},{"@pid":"68/5758","text":"Ayan Chakrabarti"},{"@pid":"36/31-1","text":"Xuan Zhang 0001"}]},"title":"Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/CaoKCZ19","doi":"10.1109/ICCAD45719.2019.8942099","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942099","url":"https://dblp.org/rec/conf/iccad/CaoKCZ19"}, "url":"URL#2184881" }, { "@score":"1", "@id":"2184882", "info":{"authors":{"author":[{"@pid":"06/5143-2","text":"Peng Cao 0002"},{"@pid":"53/3245-11","text":"Zhiyuan Liu 0011"},{"@pid":"240/9243","text":"Jiangping Wu"},{"@pid":"65/7760","text":"Jingjing Guo"},{"@pid":"y/JunYang6","text":"Jun Yang 0006"},{"@pid":"89/1700","text":"Longxing Shi"}]},"title":"A Statistical Timing Model for Low Voltage Design Considering Process Variation.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/CaoLWGYS19","doi":"10.1109/ICCAD45719.2019.8942081","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942081","url":"https://dblp.org/rec/conf/iccad/CaoLWGYS19"}, "url":"URL#2184882" }, { "@score":"1", "@id":"2184883", "info":{"authors":{"author":[{"@pid":"02/1806","text":"Yu-Hsuan Chang"},{"@pid":"221/2899","text":"Hsiang-Ting Wen"},{"@pid":"c/YaoWenChang","text":"Yao-Wen Chang"}]},"title":"Obstacle-Aware Group-Based Length-Matching Routing for Pre-Assignment Area-I/O Flip-Chip Designs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChangWC19","doi":"10.1109/ICCAD45719.2019.8942123","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942123","url":"https://dblp.org/rec/conf/iccad/ChangWC19"}, "url":"URL#2184883" }, { "@score":"1", "@id":"2184884", "info":{"authors":{"author":[{"@pid":"63/5986","text":"Wei-Ming Chen"},{"@pid":"12/5268","text":"Yi-Ting Chen"},{"@pid":"73/4832","text":"Pi-Cheng Hsiu"},{"@pid":"07/3181","text":"Tei-Wei Kuo"}]},"title":"Multiversion Concurrency Control on Intermittent Systems.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenCHK19","doi":"10.1109/ICCAD45719.2019.8942154","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942154","url":"https://dblp.org/rec/conf/iccad/ChenCHK19"}, "url":"URL#2184884" }, { "@score":"1", "@id":"2184885", "info":{"authors":{"author":[{"@pid":"122/1230","text":"Huili Chen"},{"@pid":"49/2759","text":"Cheng Fu"},{"@pid":"66/8314","text":"Jishen Zhao"},{"@pid":"k/FarinazKoushanfar","text":"Farinaz Koushanfar"}]},"title":"GenUnlock: An Automated Genetic Algorithm Framework for Unlocking Logic Encryption.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenFZK19","doi":"10.1109/ICCAD45719.2019.8942134","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942134","url":"https://dblp.org/rec/conf/iccad/ChenFZK19"}, "url":"URL#2184885" }, { "@score":"1", "@id":"2184886", "info":{"authors":{"author":[{"@pid":"68/9945","text":"Jianli Chen"},{"@pid":"96/1943","text":"Iris Hui-Ru Jiang"},{"@pid":"37/5841","text":"Jinwook Jung"},{"@pid":"k/AndrewBKahng","text":"Andrew B. Kahng"},{"@pid":"55/2821","text":"Victor N. Kravets"},{"@pid":"28/915","text":"Yih-Lang Li"},{"@pid":"166/6509","text":"Shih-Ting Lin"},{"@pid":"211/0031","text":"Mingyu Woo"}]},"title":"DATC RDF-2019: Towards a Complete Academic Reference Design Flow.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenJJKKLLW19","doi":"10.1109/ICCAD45719.2019.8942120","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942120","url":"https://dblp.org/rec/conf/iccad/ChenJJKKLLW19"}, "url":"URL#2184886" }, { "@score":"1", "@id":"2184887", "info":{"authors":{"author":[{"@pid":"55/3324","text":"Yu-Guang Chen"},{"@pid":"53/2026","text":"Ing-Chao Lin"},{"@pid":"258/6722","text":"Jian-Ting Ke"}]},"title":"ROAD: Improving Reliability of Multi-core System via Asymmetric Aging.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenLK19","doi":"10.1109/ICCAD45719.2019.8942178","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942178","url":"https://dblp.org/rec/conf/iccad/ChenLK19"}, "url":"URL#2184887" }, { "@score":"1", "@id":"2184888", "info":{"authors":{"author":[{"@pid":"236/6631","text":"Hongzheng Chen"},{"@pid":"170/0149","text":"Minghua Shen"}]},"title":"A Deep-Reinforcement-Learning-Based Scheduler for FPGA HLS.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenS19","doi":"10.1109/ICCAD45719.2019.8942126","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942126","url":"https://dblp.org/rec/conf/iccad/ChenS19"}, "url":"URL#2184888" }, { "@score":"1", "@id":"2184889", "info":{"authors":{"author":[{"@pid":"38/4539-1","text":"Fan Chen 0001"},{"@pid":"21/6891","text":"Wei Wen"},{"@pid":"163/3673","text":"Linghao Song"},{"@pid":"205/0387","text":"Jingchi Zhang"},{"@pid":"30/5330-1","text":"Hai Helen Li"},{"@pid":"80/1641","text":"Yiran Chen 0001"}]},"title":"How to Obtain and Run Light and Efficient Deep Learning Networks.","venue":"ICCAD","pages":"1-5","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenWSZLC19","doi":"10.1109/ICCAD45719.2019.8942106","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942106","url":"https://dblp.org/rec/conf/iccad/ChenWSZLC19"}, "url":"URL#2184889" }, { "@score":"1", "@id":"2184890", "info":{"authors":{"author":[{"@pid":"68/9945","text":"Jianli Chen"},{"@pid":"80/773","text":"Wenxing Zhu"},{"@pid":"50/5754-10","text":"Jun Yu 0010"},{"@pid":"75/5673-1","text":"Lei He 0001"},{"@pid":"c/YaoWenChang","text":"Yao-Wen Chang"}]},"title":"Analytical Placement with 3D Poisson's Equation and ADMM Based Optimization for Large-Scale 2.5D Heterogeneous FPGAs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChenZYHC19","doi":"10.1109/ICCAD45719.2019.8942158","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942158","url":"https://dblp.org/rec/conf/iccad/ChenZYHC19"}, "url":"URL#2184890" }, { "@score":"1", "@id":"2184891", "info":{"authors":{"author":[{"@pid":"64/3701","text":"Chih-Hong Cheng"},{"@pid":"07/9299","text":"Chung-Hao Huang"},{"@pid":"200/8211","text":"Georg Nührenberg"}]},"title":"nn-dependability-kit: Engineering Neural Networks for Safety-Critical Autonomous Driving Systems.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChengHN19","doi":"10.1109/ICCAD45719.2019.8942153","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942153","url":"https://dblp.org/rec/conf/iccad/ChengHN19"}, "url":"URL#2184891" }, { "@score":"1", "@id":"2184892", "info":{"authors":{"author":[{"@pid":"15/5135","text":"Yuan Cheng"},{"@pid":"96/5894","text":"Guangya Li"},{"@pid":"88/3656","text":"Ngai Wong"},{"@pid":"94/10821","text":"Hai-Bao Chen"},{"@pid":"64/4832-1","text":"Hao Yu 0001"}]},"title":"DEEPEYE: A Deeply Tensor-Compressed Neural Network Hardware Accelerator: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChengLWCY19","doi":"10.1109/ICCAD45719.2019.8942052","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942052","url":"https://dblp.org/rec/conf/iccad/ChengLWCY19"}, "url":"URL#2184892" }, { "@score":"1", "@id":"2184893", "info":{"authors":{"author":[{"@pid":"201/5754","text":"Hao-Yu Chi"},{"@pid":"244/8688","text":"Zi-Jun Lin"},{"@pid":"258/6886","text":"Chia-Hao Hung"},{"@pid":"74/3882","text":"Chien-Nan Jimmy Liu"},{"@pid":"70/3994","text":"Hung-Ming Chen"}]},"title":"Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChiLHLC19","doi":"10.1109/ICCAD45719.2019.8942088","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942088","url":"https://dblp.org/rec/conf/iccad/ChiLHLC19"}, "url":"URL#2184893" }, { "@score":"1", "@id":"2184894", "info":{"authors":{"author":[{"@pid":"258/6304","text":"Po-Chun Chien"},{"@pid":"13/2622","text":"Jie-Hong R. Jiang"}]},"title":"Time-Frame Folding: Back to the Sequentiality.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ChienJ19","doi":"10.1109/ICCAD45719.2019.8942078","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942078","url":"https://dblp.org/rec/conf/iccad/ChienJ19"}, "url":"URL#2184894" }, { "@score":"1", "@id":"2184895", "info":{"authors":{"author":[{"@pid":"156/5140","text":"Chunfeng Cui"},{"@pid":"227/2428","text":"Cole Hawkins"},{"@pid":"181/2621-5","text":"Zheng Zhang 0005"}]},"title":"Tensor Methods for Generating Compact Uncertainty Quantification and Deep Learning Models.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/CuiHZ19","doi":"10.1109/ICCAD45719.2019.8942121","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942121","url":"https://dblp.org/rec/conf/iccad/CuiHZ19"}, "url":"URL#2184895" }, { "@score":"1", "@id":"2184896", "info":{"authors":{"author":[{"@pid":"231/1180","text":"Siad Daboul"},{"@pid":"87/2401","text":"Stephan Held"},{"@pid":"255/7588","text":"Bento Natura"},{"@pid":"127/1199","text":"Daniel Rotter"}]},"title":"Global Interconnect Optimization.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DaboulHNR19","doi":"10.1109/ICCAD45719.2019.8942155","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942155","url":"https://dblp.org/rec/conf/iccad/DaboulHNR19"}, "url":"URL#2184896" }, { "@score":"1", "@id":"2184897", "info":{"authors":{"author":[{"@pid":"155/9822","text":"Marvin Damschen"},{"@pid":"55/2100","text":"Lars Bauer"},{"@pid":"h/JorgHenkel","text":"Jörg Henkel"}]},"title":"WCET Guarantees for Opportunistic Runtime Reconfiguration.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DamschenBH19","doi":"10.1109/ICCAD45719.2019.8942065","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942065","url":"https://dblp.org/rec/conf/iccad/DamschenBH19"}, "url":"URL#2184897" }, { "@score":"1", "@id":"2184898", "info":{"authors":{"author":[{"@pid":"169/0680","text":"Chunhua Deng"},{"@pid":"199/1982","text":"Miao Yin"},{"@pid":"125/9849","text":"Xiao-Yang Liu"},{"@pid":"07/1021-1","text":"Xiaodong Wang 0001"},{"@pid":"41/1662-1","text":"Bo Yuan 0001"}]},"title":"High-performance Hardware Architecture for Tensor Singular Value Decomposition: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DengYLWY19","doi":"10.1109/ICCAD45719.2019.8942082","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942082","url":"https://dblp.org/rec/conf/iccad/DengYLWY19"}, "url":"URL#2184898" }, { "@score":"1", "@id":"2184899", "info":{"authors":{"author":[{"@pid":"42/160","text":"Jyotirmoy V. Deshmukh"},{"@pid":"27/532","text":"James Kapinski"},{"@pid":"48/8717-1","text":"Tomoya Yamaguchi 0001"},{"@pid":"74/5147","text":"Danil V. Prokhorov"}]},"title":"Learning Deep Neural Network Controllers for Dynamical Systems with Safety Guarantees: Invited Paper.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DeshmukhKYP19","doi":"10.1109/ICCAD45719.2019.8942130","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942130","url":"https://dblp.org/rec/conf/iccad/DeshmukhKYP19"}, "url":"URL#2184899" }, { "@score":"1", "@id":"2184900", "info":{"authors":{"author":[{"@pid":"153/0574","text":"Ghada Dessouky"},{"@pid":"137/9430","text":"Shaza Zeitouni"},{"@pid":"23/5695-2","text":"Ahmad Ibrahim 0002"},{"@pid":"73/7564","text":"Lucas Davi"},{"@pid":"s/AhmadRezaSadeghi","text":"Ahmad-Reza Sadeghi"}]},"title":"CHASE: A Configurable Hardware-Assisted Security Extension for Real-Time Systems.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DessoukyZIDS19","doi":"10.1109/ICCAD45719.2019.8942142","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942142","url":"https://dblp.org/rec/conf/iccad/DessoukyZIDS19"}, "url":"URL#2184900" }, { "@score":"1", "@id":"2184901", "info":{"authors":{"author":[{"@pid":"258/6750","text":"Sergei Dolgov"},{"@pid":"86/9554","text":"Alexander Volkov"},{"@pid":"187/8350","text":"Lutong Wang"},{"@pid":"187/8244","text":"Bangqi Xu"}]},"title":"2019 CAD Contest: LEF/DEF Based Global Routing.","venue":"ICCAD","pages":"1-4","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/DolgovVWX19","doi":"10.1109/ICCAD45719.2019.8942107","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942107","url":"https://dblp.org/rec/conf/iccad/DolgovVWX19"}, "url":"URL#2184901" }, { "@score":"1", "@id":"2184902", "info":{"authors":{"author":[{"@pid":"196/7836","text":"Jiameng Fan"},{"@pid":"18/4087-15","text":"Chao Huang 0015"},{"@pid":"23/5721-1","text":"Wenchao Li 0001"},{"@pid":"24/1518-2","text":"Xin Chen 0002"},{"@pid":"66/5923-2","text":"Qi Zhu 0002"}]},"title":"Towards Verification-Aware Knowledge Distillation for Neural-Network Controlled Systems: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/FanHLCZ19","doi":"10.1109/ICCAD45719.2019.8942059","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942059","url":"https://dblp.org/rec/conf/iccad/FanHLCZ19"}, "url":"URL#2184902" }, { "@score":"1", "@id":"2184903", "info":{"authors":{"author":[{"@pid":"133/1691","text":"Liangda Fang"},{"@pid":"204/3023","text":"Biqing Fang"},{"@pid":"54/977","text":"Hai Wan"},{"@pid":"258/6654","text":"Zeqi Zheng"},{"@pid":"72/6746-3","text":"Liang Chang 0003"},{"@pid":"47/2918","text":"Quan Yu"}]},"title":"Tagged Sentential Decision Diagrams: Combining Standard and Zero-suppressed Compression and Trimming Rules.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/FangFWZCY19","doi":"10.1109/ICCAD45719.2019.8942114","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942114","url":"https://dblp.org/rec/conf/iccad/FangFWZCY19"}, "url":"URL#2184903" }, { "@score":"1", "@id":"2184904", "info":{"authors":{"author":[{"@pid":"228/1729","text":"Haowen Fang"},{"@pid":"185/5772","text":"Amar Shrestha"},{"@pid":"153/1796","text":"Ziyi Zhao"},{"@pid":"195/1186","text":"Yilan Li"},{"@pid":"64/1120","text":"Qinru Qiu"}]},"title":"An Event-driven Neuromorphic System with Biologically Plausible Temporal Dynamics.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/FangSZLQ19","doi":"10.1109/ICCAD45719.2019.8942083","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942083","url":"https://dblp.org/rec/conf/iccad/FangSZLQ19"}, "url":"URL#2184904" }, { "@score":"1", "@id":"2184905", "info":{"authors":{"author":[{"@pid":"256/9403","text":"Zhengqi Gao"},{"@pid":"35/5170-1","text":"Jun Tao 0001"},{"@pid":"29/3081-1","text":"Fan Yang 0001"},{"@pid":"47/4503","text":"Yangfeng Su"},{"@pid":"73/6801","text":"Dian Zhou"},{"@pid":"58/5418-1","text":"Xuan Zeng 0001"}]},"title":"Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/GaoTYSZZ19","doi":"10.1109/ICCAD45719.2019.8942174","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942174","url":"https://dblp.org/rec/conf/iccad/GaoTYSZZ19"}, "url":"URL#2184905" }, { "@score":"1", "@id":"2184906", "info":{"authors":{"author":[{"@pid":"209/4862","text":"ChengYue Gong"},{"@pid":"258/6469","text":"Zixuan Jiang"},{"@pid":"142/7035","text":"Dilin Wang"},{"@pid":"98/8892","text":"Yibo Lin"},{"@pid":"61/3234-1","text":"Qiang Liu 0001"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}]},"title":"Mixed Precision Neural Architecture Search for Energy Efficient Deep Learning.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/GongJWLLP19","doi":"10.1109/ICCAD45719.2019.8942147","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942147","url":"https://dblp.org/rec/conf/iccad/GongJWLLP19"}, "url":"URL#2184906" }, { "@score":"1", "@id":"2184907", "info":{"authors":{"author":[{"@pid":"190/5148","text":"Marleson Graf"},{"@pid":"49/10784","text":"Olav P. Henschel"},{"@pid":"258/6354","text":"Rafael P. Alevato"},{"@pid":"121/4418","text":"Luiz C. V. dos Santos"}]},"title":"Spec&Check: An Approach to the Building of Shared-Memory Runtime Checkers for Multicore Chip Design Verification.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/GrafHAS19","doi":"10.1109/ICCAD45719.2019.8942040","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942040","url":"https://dblp.org/rec/conf/iccad/GrafHAS19"}, "url":"URL#2184907" }, { "@score":"1", "@id":"2184908", "info":{"authors":{"author":[{"@pid":"77/7214","text":"Nicolai Hähnle"},{"@pid":"258/6316","text":"Pietro Saccardi"}]},"title":"Global routing on rhomboidal tiles.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HahnleS19","doi":"10.1109/ICCAD45719.2019.8942116","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942116","url":"https://dblp.org/rec/conf/iccad/HahnleS19"}, "url":"URL#2184908" }, { "@score":"1", "@id":"2184909", "info":{"authors":{"author":[{"@pid":"241/4322","text":"Kourosh Hakhamaneshi"},{"@pid":"241/4318","text":"Nick Werblun"},{"@pid":"a/PieterAbbeel","text":"Pieter Abbeel"},{"@pid":"17/6937","text":"Vladimir Stojanovic"}]},"title":"BagNet: Berkeley Analog Generator with Layout Optimizer Boosted with Deep Neural Networks.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HakhamaneshiWAS19","doi":"10.1109/ICCAD45719.2019.8942062","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942062","url":"https://dblp.org/rec/conf/iccad/HakhamaneshiWAS19"}, "url":"URL#2184909" }, { "@score":"1", "@id":"2184910", "info":{"authors":{"author":[{"@pid":"129/2059","text":"Cong Hao"},{"@pid":"70/3621-8","text":"Yao Chen 0008"},{"@pid":"175/6186","text":"Xinheng Liu"},{"@pid":"254/1553","text":"Atif Sarwari"},{"@pid":"254/1296","text":"Daryl Sew"},{"@pid":"161/0907","text":"Ashutosh Dhar"},{"@pid":"254/1414","text":"Bryan Wu"},{"@pid":"92/4323","text":"Dongdong Fu"},{"@pid":"81/1130","text":"Jinjun Xiong"},{"@pid":"03/4630","text":"Wen-Mei Hwu"},{"@pid":"18/9613","text":"Junli Gu"},{"@pid":"37/1234","text":"Deming Chen"}]},"title":"NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HaoCLSSDWFXHGC19","doi":"10.1109/ICCAD45719.2019.8942055","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942055","url":"https://dblp.org/rec/conf/iccad/HaoCLSSDWFXHGC19"}, "url":"URL#2184910" }, { "@score":"1", "@id":"2184911", "info":{"authors":{"author":[{"@pid":"119/5963-3","text":"Jiayuan He 0003"},{"@pid":"93/903","text":"Martin Burtscher"},{"@pid":"m/RajitManohar","text":"Rajit Manohar"},{"@pid":"71/5735","text":"Keshav Pingali"}]},"title":"SPRoute: A Scalable Parallel Negotiation-based Global Router.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HeBMP19","doi":"10.1109/ICCAD45719.2019.8942105","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942105","url":"https://dblp.org/rec/conf/iccad/HeBMP19"}, "url":"URL#2184911" }, { "@score":"1", "@id":"2184912", "info":{"authors":{"author":[{"@pid":"198/0474","text":"Zichang He"},{"@pid":"201/7948","text":"Weilong Cui"},{"@pid":"156/5140","text":"Chunfeng Cui"},{"@pid":"23/3778","text":"Timothy Sherwood"},{"@pid":"181/2621-5","text":"Zheng Zhang 0005"}]},"title":"Efficient Uncertainty Modeling for System Design via Mixed Integer Programming.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HeCCSZ19","doi":"10.1109/ICCAD45719.2019.8942139","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942139","url":"https://dblp.org/rec/conf/iccad/HeCCSZ19"}, "url":"URL#2184912" }, { "@score":"1", "@id":"2184913", "info":{"authors":{"author":[{"@pid":"258/6414","text":"Yintao He"},{"@pid":"94/3104-1","text":"Ying Wang 0001"},{"@pid":"188/2383","text":"Yongchen Wang"},{"@pid":"70/576-1","text":"Huawei Li 0001"},{"@pid":"37/5372-1","text":"Xiaowei Li 0001"}]},"title":"An Agile Precision-Tunable CNN Accelerator based on ReRAM.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HeWWLL19","doi":"10.1109/ICCAD45719.2019.8942163","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942163","url":"https://dblp.org/rec/conf/iccad/HeWWLL19"}, "url":"URL#2184913" }, { "@score":"1", "@id":"2184914", "info":{"authors":{"author":[{"@pid":"h/JorgHenkel","text":"Jörg Henkel"},{"@pid":"94/10663","text":"Hussam Amrouch"},{"@pid":"223/9604","text":"Martin Rapp"},{"@pid":"241/0864","text":"Sami Salamin"},{"@pid":"223/9620","text":"Dayane Reis"},{"@pid":"68/11533","text":"Di Gao"},{"@pid":"179/2993","text":"Xunzhao Yin"},{"@pid":"62/3778","text":"Michael T. Niemier"},{"@pid":"05/853","text":"Cheng Zhuo"},{"@pid":"h/XiaoboSharonHu","text":"Xiaobo Sharon Hu"},{"@pid":"19/9032","text":"Hsiang-Yun Cheng"},{"@pid":"03/711","text":"Chia-Lin Yang"}]},"title":"The Impact of Emerging Technologies on Architectures and System-level Management: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HenkelARSRGYNZH19","doi":"10.1109/ICCAD45719.2019.8942102","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942102","url":"https://dblp.org/rec/conf/iccad/HenkelARSRGYNZH19"}, "url":"URL#2184914" }, { "@score":"1", "@id":"2184915", "info":{"authors":{"author":[{"@pid":"143/4616","text":"Chia-Tung Ho"},{"@pid":"k/AndrewBKahng","text":"Andrew B. Kahng"}]},"title":"IncPIRD: Fast Learning-Based Prediction of Incremental IR Drop.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HoK19","doi":"10.1109/ICCAD45719.2019.8942110","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942110","url":"https://dblp.org/rec/conf/iccad/HoK19"}, "url":"URL#2184915" }, { "@score":"1", "@id":"2184916", "info":{"authors":{"author":[{"@pid":"18/2169","text":"Xing Huang"},{"@pid":"258/6729","text":"Chi-Chun Liang"},{"@pid":"23/6950","text":"Jia Li"},{"@pid":"63/4181","text":"Tsung-Yi Ho"},{"@pid":"126/5928-1","text":"Chang-Jin Kim 0001"}]},"title":"Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HuangLLHK19","doi":"10.1109/ICCAD45719.2019.8942172","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942172","url":"https://dblp.org/rec/conf/iccad/HuangLLHK19"}, "url":"URL#2184916" }, { "@score":"1", "@id":"2184917", "info":{"authors":{"author":[{"@pid":"84/10509","text":"Ching-Yi Huang"},{"@pid":"77/5152","text":"Chi-An (Rocky) Wu"},{"@pid":"11/11434","text":"Tung-Yuan Lee"},{"@pid":"25/8358","text":"Chih-Jen (Jacky) Hsu"},{"@pid":"96/2491","text":"Kei-Yong Khoo"}]},"title":"2019 CAD Contest: Logic Regression on High Dimensional Boolean Space.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HuangWLHK19","doi":"10.1109/ICCAD45719.2019.8942137","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942137","url":"https://dblp.org/rec/conf/iccad/HuangWLHK19"}, "url":"URL#2184917" }, { "@score":"1", "@id":"2184918", "info":{"authors":{"author":[{"@pid":"131/4868","text":"Qijing Huang 0001"},{"@pid":"186/8803","text":"Christopher Yarp"},{"@pid":"145/2275","text":"Sagar Karandikar"},{"@pid":"223/7706","text":"Nathan Pemberton"},{"@pid":"151/6708","text":"Benjamin Brock"},{"@pid":"83/5831-3","text":"Liang Ma 0003"},{"@pid":"147/1470","text":"Guohao Dai"},{"@pid":"258/6388","text":"Robert Quitt"},{"@pid":"a/KrsteAsanovic","text":"Krste Asanovic"},{"@pid":"w/JohnWawrzynek","text":"John Wawrzynek"}]},"title":"Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HuangYKPBMDQAW19","doi":"10.1109/ICCAD45719.2019.8942048","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942048","url":"https://dblp.org/rec/conf/iccad/HuangYKPBMDQAW19"}, "url":"URL#2184918" }, { "@score":"1", "@id":"2184919", "info":{"authors":{"author":[{"@pid":"227/2207","text":"Shehzeen Hussain"},{"@pid":"229/4177","text":"Mojan Javaheripi"},{"@pid":"194/3168","text":"Paarth Neekhara"},{"@pid":"15/3231","text":"Ryan Kastner"},{"@pid":"k/FarinazKoushanfar","text":"Farinaz Koushanfar"}]},"title":"FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HussainJNKK19","doi":"10.1109/ICCAD45719.2019.8942122","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942122","url":"https://dblp.org/rec/conf/iccad/HussainJNKK19"}, "url":"URL#2184919" }, { "@score":"1", "@id":"2184920", "info":{"authors":{"author":[{"@pid":"63/2765","text":"Gyoung-Hwan Hyun"},{"@pid":"50/6842","text":"Taewhan Kim"}]},"title":"Flip-flop State Driven Clock Gating: Concept, Design, and Methodology.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HyunK19","doi":"10.1109/ICCAD45719.2019.8942061","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942061","url":"https://dblp.org/rec/conf/iccad/HyunK19"}, "url":"URL#2184920" }, { "@score":"1", "@id":"2184921", "info":{"authors":{"author":[{"@pid":"63/2765","text":"Gyoung-Hwan Hyun"},{"@pid":"50/6842","text":"Taewhan Kim"}]},"title":"Allocation of State Retention Registers Boosting Practical Applicability to Power Gated Circuits.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/HyunK19a","doi":"10.1109/ICCAD45719.2019.8942064","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942064","url":"https://dblp.org/rec/conf/iccad/HyunK19a"}, "url":"URL#2184921" }, { "@score":"1", "@id":"2184922", "info":{"authors":{"author":[{"@pid":"80/6266-2","text":"Mohamed Ibrahim 0002"},{"@pid":"58/7552","text":"Maria Gorlatova"},{"@pid":"c/KrishnenduChakrabarty","text":"Krishnendu Chakrabarty"}]},"title":"The Internet of Microfluidic Things: Perspectives on System Architecture and Design Challenges: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/IbrahimGC19","doi":"10.1109/ICCAD45719.2019.8942080","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942080","url":"https://dblp.org/rec/conf/iccad/IbrahimGC19"}, "url":"URL#2184922" }, { "@score":"1", "@id":"2184923", "info":{"authors":{"author":[{"@pid":"139/8964","text":"Mohsen Imani"},{"@pid":"160/3326","text":"Samuel Bosch"},{"@pid":"229/4177","text":"Mojan Javaheripi"},{"@pid":"157/9224","text":"Bita Darvish Rouhani"},{"@pid":"21/1079","text":"Xinyu Wu"},{"@pid":"k/FarinazKoushanfar","text":"Farinaz Koushanfar"},{"@pid":"s/TajanaSimunic","text":"Tajana Rosing"}]},"title":"SemiHD: Semi-Supervised Learning Using Hyperdimensional Computing.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ImaniBJRWKR19","doi":"10.1109/ICCAD45719.2019.8942165","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942165","url":"https://dblp.org/rec/conf/iccad/ImaniBJRWKR19"}, "url":"URL#2184923" }, { "@score":"1", "@id":"2184924", "info":{"authors":{"author":[{"@pid":"78/5250-10","text":"Muhammad Imran 0010"},{"@pid":"52/4815","text":"Taehyun Kwon"},{"@pid":"218/1162","text":"Jung Min You"},{"@pid":"18/5332","text":"Joon-Sung Yang"}]},"title":"Flipcy: Efficient Pattern Redistribution for Enhancing MLC PCM Reliability and Storage Density.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ImranKYY19","doi":"10.1109/ICCAD45719.2019.8942113","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942113","url":"https://dblp.org/rec/conf/iccad/ImranKYY19"}, "url":"URL#2184924" }, { "@score":"1", "@id":"2184925", "info":{"authors":{"author":[{"@pid":"143/7503","text":"Darshana Jayasinghe"},{"@pid":"i/AleksandarIgnjatovic","text":"Aleksandar Ignjatovic"},{"@pid":"38/622","text":"Sri Parameswaran"}]},"title":"SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/JayasingheIP19","doi":"10.1109/ICCAD45719.2019.8942112","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942112","url":"https://dblp.org/rec/conf/iccad/JayasingheIP19"}, "url":"URL#2184925" }, { "@score":"1", "@id":"2184926", "info":{"authors":{"author":[{"@pid":"258/6751","text":"Youngbeom Jung"},{"@pid":"176/6127","text":"Yeongjae Choi"},{"@pid":"71/11469","text":"Jaehyeong Sim"},{"@pid":"75/34","text":"Lee-Sup Kim"}]},"title":"eSRCNN: A Framework for Optimizing Super-Resolution Tasks on Diverse Embedded CNN Accelerators.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/JungCSK19","doi":"10.1109/ICCAD45719.2019.8942086","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942086","url":"https://dblp.org/rec/conf/iccad/JungCSK19"}, "url":"URL#2184926" }, { "@score":"1", "@id":"2184927", "info":{"authors":{"author":{"@pid":"k/AndrewBKahng","text":"Andrew B. Kahng"}},"title":"Looking Into the Mirror of Open Source: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/Kahng19","doi":"10.1109/ICCAD45719.2019.8942131","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942131","url":"https://dblp.org/rec/conf/iccad/Kahng19"}, "url":"URL#2184927" }, { "@score":"1", "@id":"2184928", "info":{"authors":{"author":[{"@pid":"174/2066","text":"Manupa Karunaratne"},{"@pid":"253/1649","text":"Dhananjaya Wijerathne"},{"@pid":"22/5985","text":"Tulika Mitra"},{"@pid":"86/2160","text":"Li-Shiuan Peh"}]},"title":"4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/KarunaratneWMP19","doi":"10.1109/ICCAD45719.2019.8942148","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942148","url":"https://dblp.org/rec/conf/iccad/KarunaratneWMP19"}, "url":"URL#2184928" }, { "@score":"1", "@id":"2184929", "info":{"authors":{"author":[{"@pid":"258/6535","text":"Kyeonghan Kim"},{"@pid":"258/6650","text":"Hyein Shin"},{"@pid":"71/11469","text":"Jaehyeong Sim"},{"@pid":"217/8569","text":"Myeonggu Kang"},{"@pid":"75/34","text":"Lee-Sup Kim"}]},"title":"An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/KimSSKK19","doi":"10.1109/ICCAD45719.2019.8942129","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942129","url":"https://dblp.org/rec/conf/iccad/KimSSKK19"}, "url":"URL#2184929" }, { "@score":"1", "@id":"2184930", "info":{"authors":{"author":[{"@pid":"236/4940","text":"Gaurav Kolhe"},{"@pid":"182/4036","text":"Hadi Mardani Kamali"},{"@pid":"258/6831","text":"Miklesh Naicker"},{"@pid":"220/6877","text":"Tyler David Sheaves"},{"@pid":"m/HamidMahmoodi","text":"Hamid Mahmoodi"},{"@pid":"127/9058","text":"Sai Manoj P. D."},{"@pid":"63/3012","text":"Houman Homayoun"},{"@pid":"99/7115","text":"Setareh Rafatirad"},{"@pid":"83/7356","text":"Avesta Sasan"}]},"title":"Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/KolheKNSMDHRS19","doi":"10.1109/ICCAD45719.2019.8942100","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942100","url":"https://dblp.org/rec/conf/iccad/KolheKNSMDHRS19"}, "url":"URL#2184930" }, { "@score":"1", "@id":"2184931", "info":{"authors":{"author":[{"@pid":"228/7701","text":"Jonas Krautter"},{"@pid":"161/0101","text":"Dennis R. E. Gnad"},{"@pid":"133/2274","text":"Falk Schellenberg"},{"@pid":"38/3348","text":"Amir Moradi 0001"},{"@pid":"55/3589","text":"Mehdi Baradaran Tahoori"}]},"title":"Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/KrautterGSMT19","doi":"10.1109/ICCAD45719.2019.8942094","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942094","url":"https://dblp.org/rec/conf/iccad/KrautterGSMT19"}, "url":"URL#2184931" }, { "@score":"1", "@id":"2184932", "info":{"authors":{"author":[{"@pid":"139/7034-2","text":"Yonghwi Kwon 0002"},{"@pid":"03/9257","text":"Inhak Han"},{"@pid":"81/750","text":"Youngsoo Shin"}]},"title":"Clock Gating Synthesis of Netlist with Cyclic Logic Paths.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/KwonHS19","doi":"10.1109/ICCAD45719.2019.8942042","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942042","url":"https://dblp.org/rec/conf/iccad/KwonHS19"}, "url":"URL#2184932" }, { "@score":"1", "@id":"2184933", "info":{"authors":{"author":[{"@pid":"258/6490","text":"Tingshen Lan"},{"@pid":"193/3128","text":"Xingquan Li"},{"@pid":"68/9945","text":"Jianli Chen"},{"@pid":"50/5754-10","text":"Jun Yu 0010"},{"@pid":"75/5673-1","text":"Lei He 0001"},{"@pid":"258/6645","text":"Senhua Dong"},{"@pid":"80/773","text":"Wenxing Zhu"},{"@pid":"c/YaoWenChang","text":"Yao-Wen Chang"}]},"title":"Timing-Aware Fill Insertions with Design-Rule and Density Constraints.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LanLCYHDZC19","doi":"10.1109/ICCAD45719.2019.8942079","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942079","url":"https://dblp.org/rec/conf/iccad/LanLCYHDZC19"}, "url":"URL#2184933" }, { "@score":"1", "@id":"2184934", "info":{"authors":{"author":[{"@pid":"229/4357","text":"Siang-Yun Lee"},{"@pid":"154/3010","text":"Nian-Ze Lee"},{"@pid":"13/2622","text":"Jie-Hong R. Jiang"}]},"title":"Searching Parallel Separating Hyperplanes for Effective Compression of Threshold Logic Networks.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LeeLJ19","doi":"10.1109/ICCAD45719.2019.8942143","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942143","url":"https://dblp.org/rec/conf/iccad/LeeLJ19"}, "url":"URL#2184934" }, { "@score":"1", "@id":"2184935", "info":{"authors":{"author":[{"@pid":"258/6499","text":"Cheongwon Lee"},{"@pid":"199/8590","text":"Youngsoo Song"},{"@pid":"81/750","text":"Youngsoo Shin"}]},"title":"Endurance Enhancement of Multi-Level Cell Phase Change Memory.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LeeSS19","doi":"10.1109/ICCAD45719.2019.8942175","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942175","url":"https://dblp.org/rec/conf/iccad/LeeSS19"}, "url":"URL#2184935" }, { "@score":"1", "@id":"2184936", "info":{"authors":{"author":[{"@pid":"90/7312","text":"Haocheng Li"},{"@pid":"163/2323","text":"Gengjie Chen"},{"@pid":"233/8123","text":"Bentian Jiang"},{"@pid":"192/1239","text":"Jingsong Chen"},{"@pid":"y/EFYYoung","text":"Evangeline F. Y. Young"}]},"title":"Dr. CU 2.0: A Scalable Detailed Routing Framework with Correct-by-Construction Design Rule Satisfaction.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiCJCY19","doi":"10.1109/ICCAD45719.2019.8942074","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942074","url":"https://dblp.org/rec/conf/iccad/LiCJCY19"}, "url":"URL#2184936" }, { "@score":"1", "@id":"2184937", "info":{"authors":{"author":[{"@pid":"167/9945","text":"Bingzhe Li"},{"@pid":"169/0680","text":"Chunhua Deng"},{"@pid":"67/5782","text":"Jinfeng Yang"},{"@pid":"38/5692","text":"David J. Lilja"},{"@pid":"41/1662-1","text":"Bo Yuan 0001"},{"@pid":"d/DHCDu","text":"David H. C. Du"}]},"title":"HAML-SSD: A Hardware Accelerated Hotness-Aware Machine Learning based SSD Management.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiDYLYD19","doi":"10.1109/ICCAD45719.2019.8942140","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942140","url":"https://dblp.org/rec/conf/iccad/LiDYLYD19"}, "url":"URL#2184937" }, { "@score":"1", "@id":"2184938", "info":{"authors":{"author":[{"@pid":"149/4660","text":"Wuxi Li"},{"@pid":"98/8892","text":"Yibo Lin"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}]},"title":"elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiLP19","doi":"10.1109/ICCAD45719.2019.8942075","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942075","url":"https://dblp.org/rec/conf/iccad/LiLP19"}, "url":"URL#2184938" }, { "@score":"1", "@id":"2184939", "info":{"authors":{"author":[{"@pid":"57/2281","text":"Shuai Li"},{"@pid":"11/4740-1","text":"Wei Tong 0001"},{"@pid":"97/6737","text":"Jingning Liu"},{"@pid":"75/1956-1","text":"Bing Wu 0001"},{"@pid":"199/8685","text":"Yazhi Feng"}]},"title":"Accelerating garbage collection for 3D MLC flash memory with SLC blocks.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiTLWF19","doi":"10.1109/ICCAD45719.2019.8942097","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942097","url":"https://dblp.org/rec/conf/iccad/LiTLWF19"}, "url":"URL#2184939" }, { "@score":"1", "@id":"2184940", "info":{"authors":{"author":[{"@pid":"179/2965","text":"Mengchu Li"},{"@pid":"65/8358","text":"Tsun-Ming Tseng"},{"@pid":"258/6609","text":"Yanlu Ma"},{"@pid":"63/4181","text":"Tsung-Yi Ho"},{"@pid":"07/6841","text":"Ulf Schlichtmann"}]},"title":"VOM: Flow-Path Validation and Control-Sequence Optimization for Multilayered Continuous-Flow Microfluidic Biochips.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiTMHS19","doi":"10.1109/ICCAD45719.2019.8942066","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942066","url":"https://dblp.org/rec/conf/iccad/LiTMHS19"}, "url":"URL#2184940" }, { "@score":"1", "@id":"2184941", "info":{"authors":{"author":[{"@pid":"206/9107","text":"Tingyuan Liang"},{"@pid":"211/0078","text":"Jieru Zhao"},{"@pid":"07/5681-1","text":"Liang Feng 0001"},{"@pid":"24/9978","text":"Sharad Sinha"},{"@pid":"10/4661-12","text":"Wei Zhang 0012"}]},"title":"Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiangZFSZ19","doi":"10.1109/ICCAD45719.2019.8942136","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942136","url":"https://dblp.org/rec/conf/iccad/LiangZFSZ19"}, "url":"URL#2184941" }, { "@score":"1", "@id":"2184942", "info":{"authors":{"author":[{"@pid":"243/2883","text":"Nimisha Limaye"},{"@pid":"150/7414","text":"Abhrajit Sengupta"},{"@pid":"207/6599","text":"Mohammed Nabeel 0001"},{"@pid":"13/3403","text":"Ozgur Sinanoglu"}]},"title":"Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LimayeSNS19","doi":"10.1109/ICCAD45719.2019.8942047","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942047","url":"https://dblp.org/rec/conf/iccad/LimayeSNS19"}, "url":"URL#2184942" }, { "@score":"1", "@id":"2184943", "info":{"authors":{"author":[{"@pid":"80/1342","text":"Jai-Ming Lin"},{"@pid":"233/0368","text":"You-Lun Deng"},{"@pid":"258/6686","text":"Ya-Chu Yang"},{"@pid":"258/6317","text":"Jia-Jian Chen"},{"@pid":"258/6377","text":"Yao-Chieh Chen"}]},"title":"A Novel Macro Placement Approach based on Simulated Evolution Algorithm.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LinDYCC19","doi":"10.1109/ICCAD45719.2019.8942168","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942168","url":"https://dblp.org/rec/conf/iccad/LinDYCC19"}, "url":"URL#2184943" }, { "@score":"1", "@id":"2184944", "info":{"authors":{"author":[{"@pid":"177/9028","text":"Zheyu Liu"},{"@pid":"203/5643","text":"Kaige Jia"},{"@pid":"03/2089-1","text":"Weiqiang Liu 0001"},{"@pid":"43/2782-1","text":"Qi Wei 0001"},{"@pid":"34/4515","text":"Fei Qiao"},{"@pid":"94/1128","text":"Huazhong Yang"}]},"title":"INA: Incremental Network Approximation Algorithm for Limited Precision Deep Neural Networks.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiuJLWQY19","doi":"10.1109/ICCAD45719.2019.8942054","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942054","url":"https://dblp.org/rec/conf/iccad/LiuJLWQY19"}, "url":"URL#2184944" }, { "@score":"1", "@id":"2184945", "info":{"authors":{"author":[{"@pid":"43/656-23","text":"Tao Liu 0023"},{"@pid":"70/11466","text":"Wujie Wen"}]},"title":"Making the Fault-Tolerance of Emerging Neural Network Accelerators Scalable.","venue":"ICCAD","pages":"1-5","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LiuW19","doi":"10.1109/ICCAD45719.2019.8942073","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942073","url":"https://dblp.org/rec/conf/iccad/LiuW19"}, "url":"URL#2184945" }, { "@score":"1", "@id":"2184946", "info":{"authors":{"author":[{"@pid":"85/828","text":"Florian Lonsing"},{"@pid":"83/6972-1","text":"Karthik Ganesan 0001"},{"@pid":"233/0746","text":"Makai Mann"},{"@pid":"166/3056","text":"Srinivasa Shashank Nuthakki"},{"@pid":"05/9680","text":"Eshan Singh"},{"@pid":"215/5239","text":"Mario Srouji"},{"@pid":"131/7592","text":"Yahan Yang"},{"@pid":"30/4561","text":"Subhasish Mitra"},{"@pid":"b/ClarkWBarrett","text":"Clark W. Barrett"}]},"title":"Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LonsingGMNSSYMB19","doi":"10.1109/ICCAD45719.2019.8942096","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942096","url":"https://dblp.org/rec/conf/iccad/LonsingGMNSSYMB19"}, "url":"URL#2184946" }, { "@score":"1", "@id":"2184947", "info":{"authors":{"author":[{"@pid":"149/4699","text":"Yi-Chen Lu"},{"@pid":"83/367-2","text":"Jeehyun Lee 0002"},{"@pid":"221/2864","text":"Anthony Agnesina"},{"@pid":"87/3499","text":"Kambiz Samadi"},{"@pid":"58/2235","text":"Sung Kyu Lim"}]},"title":"GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LuLASL19","doi":"10.1109/ICCAD45719.2019.8942063","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942063","url":"https://dblp.org/rec/conf/iccad/LuLASL19"}, "url":"URL#2184947" }, { "@score":"1", "@id":"2184948", "info":{"authors":{"author":[{"@pid":"31/6932","text":"Kai Lu"},{"@pid":"193/3911","text":"Zhaoshi Li"},{"@pid":"55/17","text":"Leibo Liu"},{"@pid":"98/7308","text":"Jiawei Wang"},{"@pid":"98/3428","text":"Shouyi Yin"},{"@pid":"39/6160","text":"Shaojun Wei"}]},"title":"ReDESK: A Reconfigurable Dataflow Engine for Sparse Kernels on Heterogeneous Platforms.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/LuLLWYW19","doi":"10.1109/ICCAD45719.2019.8942089","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942089","url":"https://dblp.org/rec/conf/iccad/LuLLWYW19"}, "url":"URL#2184948" }, { "@score":"1", "@id":"2184949", "info":{"authors":{"author":[{"@pid":"211/0066","text":"Albert Magyar"},{"@pid":"158/8197","text":"David Biancolin"},{"@pid":"147/5420","text":"John Koenig"},{"@pid":"s/SanjitASeshia","text":"Sanjit Seshia"},{"@pid":"92/2089","text":"Jonathan Bachrach"},{"@pid":"a/KrsteAsanovic","text":"Krste Asanovic"}]},"title":"Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/MagyarBKSBA19","doi":"10.1109/ICCAD45719.2019.8942087","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942087","url":"https://dblp.org/rec/conf/iccad/MagyarBKSBA19"}, "url":"URL#2184949" }, { "@score":"1", "@id":"2184950", "info":{"authors":{"author":[{"@pid":"214/9886","text":"Giulia Meuli"},{"@pid":"20/3466","text":"Mathias Soeken"},{"@pid":"07/8413","text":"Earl T. Campbell"},{"@pid":"r/MartinRottler","text":"Martin Roetteler"},{"@pid":"d/GDeMicheli","text":"Giovanni De Micheli"}]},"title":"The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/MeuliSCRM19","doi":"10.1109/ICCAD45719.2019.8942093","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942093","url":"https://dblp.org/rec/conf/iccad/MeuliSCRM19"}, "url":"URL#2184950" }, { "@score":"1", "@id":"2184951", "info":{"authors":{"author":[{"@pid":"160/1646","text":"Zahi Moudallal"},{"@pid":"30/612","text":"Valeriy Sukharev"},{"@pid":"n/FaridNNajm","text":"Farid N. Najm"}]},"title":"Power Grid Fixing for Electromigration-induced Voltage Failures.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/MoudallalSN19","doi":"10.1109/ICCAD45719.2019.8942141","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942141","url":"https://dblp.org/rec/conf/iccad/MoudallalSN19"}, "url":"URL#2184951" }, { "@score":"1", "@id":"2184952", "info":{"authors":{"author":[{"@pid":"157/1370","text":"Vojtech Mrazek"},{"@pid":"07/1601","text":"Zdenek Vasícek"},{"@pid":"49/5896","text":"Lukás Sekanina"},{"@pid":"191/2451","text":"Muhammad Abdullah Hanif"},{"@pid":"s/MuhammadShafique","text":"Muhammad Shafique 0001"}]},"title":"ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/MrazekVSHS19","doi":"10.1109/ICCAD45719.2019.8942068","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942068","url":"https://dblp.org/rec/conf/iccad/MrazekVSHS19"}, "url":"URL#2184952" }, { "@score":"1", "@id":"2184953", "info":{"authors":{"author":[{"@pid":"217/2457","text":"Monal Narasimhamurthy"},{"@pid":"218/2829","text":"Taisa Kushner"},{"@pid":"190/5924","text":"Souradeep Dutta"},{"@pid":"82/1542","text":"Sriram Sankaranarayanan 0001"}]},"title":"Verifying Conformance of Neural Network Models: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/Narasimhamurthy19","doi":"10.1109/ICCAD45719.2019.8942151","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942151","url":"https://dblp.org/rec/conf/iccad/Narasimhamurthy19"}, "url":"URL#2184953" }, { "@score":"1", "@id":"2184954", "info":{"authors":{"author":[{"@pid":"188/8998","text":"Walter Lau Neto"},{"@pid":"249/3113","text":"Max Austin"},{"@pid":"258/6383","text":"Scott Temple"},{"@pid":"129/7719","text":"Luca G. Amarù"},{"@pid":"133/5914","text":"Xifan Tang"},{"@pid":"48/9513","text":"Pierre-Emmanuel Gaillardon"}]},"title":"LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/NetoATATG19","doi":"10.1109/ICCAD45719.2019.8942145","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942145","url":"https://dblp.org/rec/conf/iccad/NetoATATG19"}, "url":"URL#2184954" }, { "@score":"1", "@id":"2184955", "info":{"authors":{"author":[{"@pid":"173/5375","text":"Ivan De Oliveira Nunes"},{"@pid":"01/4656","text":"Karim Eldefrawy"},{"@pid":"198/1339","text":"Norrathep Rattanavipanon"},{"@pid":"08/1183","text":"Gene Tsudik"}]},"title":"PURE: Using Verified Remote Attestation to Obtain Proofs of Update, Reset and Erasure in low-End Embedded Systems.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/NunesERT19","doi":"10.1109/ICCAD45719.2019.8942118","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942118","url":"https://dblp.org/rec/conf/iccad/NunesERT19"}, "url":"URL#2184955" }, { "@score":"1", "@id":"2184956", "info":{"authors":{"author":[{"@pid":"92/7649","text":"Indranil Palit"},{"@pid":"154/2991","text":"Qiuwen Lou"},{"@pid":"10/10064","text":"Robert Perricone"},{"@pid":"62/3778","text":"Michael T. Niemier"},{"@pid":"h/XiaoboSharonHu","text":"Xiaobo Sharon Hu"}]},"title":"A Uniform Modeling Methodology for Benchmarking DNN Accelerators.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/PalitLPNH19","doi":"10.1109/ICCAD45719.2019.8942095","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942095","url":"https://dblp.org/rec/conf/iccad/PalitLPNH19"}, "url":"URL#2184956" }, { "@score":"1", "@id":"2184957", "info":{"authors":{"author":[{"@pid":"34/10557","text":"Jungmin Park"},{"@pid":"258/6697","text":"Seongjoon Cho"},{"@pid":"258/6871","text":"Taejin Lim"},{"@pid":"75/4629","text":"Swarup Bhunia"},{"@pid":"t/MohammadTehranipoor","text":"Mark M. Tehranipoor"}]},"title":"SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ParkCLBT19","doi":"10.1109/ICCAD45719.2019.8942152","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942152","url":"https://dblp.org/rec/conf/iccad/ParkCLBT19"}, "url":"URL#2184957" }, { "@score":"1", "@id":"2184958", "info":{"authors":{"author":[{"@pid":"121/0617","text":"Maryam Parsa"},{"@pid":"186/7935","text":"Aayush Ankit"},{"@pid":"146/1050","text":"Amirkoushyar Ziabari"},{"@pid":"r/KaushikRoy","text":"Kaushik Roy 0001"}]},"title":"PABO: Pseudo Agent-Based Multi-Objective Bayesian Hyperparameter Optimization for Efficient Neural Accelerator Design.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ParsaAZR19","doi":"10.1109/ICCAD45719.2019.8942046","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942046","url":"https://dblp.org/rec/conf/iccad/ParsaAZR19"}, "url":"URL#2184958" }, { "@score":"1", "@id":"2184959", "info":{"authors":{"author":[{"@pid":"169/9032","text":"Ghasem Pasandi"},{"@pid":"p/MassoudPedram","text":"Massoud Pedram"}]},"title":"A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area Minimization.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/PasandiP19","doi":"10.1109/ICCAD45719.2019.8942053","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942053","url":"https://dblp.org/rec/conf/iccad/PasandiP19"}, "url":"URL#2184959" }, { "@score":"1", "@id":"2184960", "info":{"authors":{"author":[{"@pid":"258/6301","text":"James Pond"},{"@pid":"181/2815","text":"Xu Wang"},{"@pid":"189/6515","text":"Zeqin Lu"},{"@pid":"258/6282","text":"Ellen Schelew"},{"@pid":"07/1008","text":"Gilles Lamant"},{"@pid":"258/6678","text":"Ahmadreza Farsaei"}]},"title":"Latest Advancements to the Industry-Leading EPDA Design Flow for Silicon Photonics: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/PondWLSLF19","doi":"10.1109/ICCAD45719.2019.8942039","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942039","url":"https://dblp.org/rec/conf/iccad/PondWLSLF19"}, "url":"URL#2184960" }, { "@score":"1", "@id":"2184961", "info":{"authors":{"author":[{"@pid":"180/3697","text":"Chak-Wa Pui"},{"@pid":"y/EFYYoung","text":"Evangeline F. Y. Young"}]},"title":"Lagrangian Relaxation-Based Time-Division Multiplexing Optimization for Multi-FPGA Systems.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/PuiY19","doi":"10.1109/ICCAD45719.2019.8942125","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942125","url":"https://dblp.org/rec/conf/iccad/PuiY19"}, "url":"URL#2184961" }, { "@score":"1", "@id":"2184962", "info":{"authors":{"author":[{"@pid":"62/8379","text":"Zhiqiang Que"},{"@pid":"214/1044","text":"Daniel Holanda Noronha"},{"@pid":"130/9004","text":"Ruizhe Zhao"},{"@pid":"w/StevenJEWilton","text":"Steven J. E. Wilton"},{"@pid":"l/WayneLuk","text":"Wayne Luk"}]},"title":"Towards In-Circuit Tuning of Deep Learning Designs.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/QueNZWL19","doi":"10.1109/ICCAD45719.2019.8942117","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942117","url":"https://dblp.org/rec/conf/iccad/QueNZWL19"}, "url":"URL#2184962" }, { "@score":"1", "@id":"2184963", "info":{"authors":{"author":[{"@pid":"190/5200","text":"Gaurav Rajavendra Reddy"},{"@pid":"143/0411","text":"Kareem Madkour"},{"@pid":"17/5884","text":"Yiorgos Makris"}]},"title":"Machine Learning-Based Hotspot Detection: Fallacies, Pitfalls and Marching Orders.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ReddyMM19","doi":"10.1109/ICCAD45719.2019.8942128","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942128","url":"https://dblp.org/rec/conf/iccad/ReddyMM19"}, "url":"URL#2184963" }, { "@score":"1", "@id":"2184964", "info":{"authors":{"author":[{"@pid":"137/3727","text":"Bastian Richter 0001"},{"@pid":"131/3329","text":"Alexander Wild"},{"@pid":"38/3348","text":"Amir Moradi 0001"}]},"title":"Automated Probe Repositioning for On-Die EM Measurements.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/RichterWM19","doi":"10.1109/ICCAD45719.2019.8942157","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942157","url":"https://dblp.org/rec/conf/iccad/RichterWM19"}, "url":"URL#2184964" }, { "@score":"1", "@id":"2184965", "info":{"authors":{"author":[{"@pid":"199/8680","text":"Simon Rokicki"},{"@pid":"258/6703","text":"Davide Pala"},{"@pid":"258/6547","text":"Joseph Paturel"},{"@pid":"28/4014","text":"Olivier Sentieys"}]},"title":"What You Simulate Is What You Synthesize: Designing a Processor Core from C++ Specifications.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/RokickiPPS19","doi":"10.1109/ICCAD45719.2019.8942177","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942177","url":"https://dblp.org/rec/conf/iccad/RokickiPPS19"}, "url":"URL#2184965" }, { "@score":"1", "@id":"2184966", "info":{"authors":{"author":[{"@pid":"179/3270","text":"Debayan Roy"},{"@pid":"144/4482","text":"Swaminathan Narayanaswamy"},{"@pid":"31/10461","text":"Alma Pröbstl"},{"@pid":"c/SamarjitChakraborty","text":"Samarjit Chakraborty"}]},"title":"Multi-Stage Optimization for Energy-Efficient Active Cell Balancing in Battery Packs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/RoyNPC19","doi":"10.1109/ICCAD45719.2019.8942166","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942166","url":"https://dblp.org/rec/conf/iccad/RoyNPC19"}, "url":"URL#2184966" }, { "@score":"1", "@id":"2184967", "info":{"authors":{"author":[{"@pid":"204/5398","text":"Zhenyuan Ruan"},{"@pid":"02/1554","text":"Tong He"},{"@pid":"c/JasonCong","text":"Jason Cong"}]},"title":"Analyzing and Modeling In-Storage Computing Workloads On EISC - An FPGA-Based System-Level Emulation Platform.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/RuanHC19","doi":"10.1109/ICCAD45719.2019.8942135","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942135","url":"https://dblp.org/rec/conf/iccad/RuanHC19"}, "url":"URL#2184967" }, { "@score":"1", "@id":"2184968", "info":{"authors":{"author":[{"@pid":"145/7783","text":"Patanjali SLPSK"},{"@pid":"195/5786","text":"Prasanna Karthik Vairam"},{"@pid":"37/4129","text":"Chester Rebeiro"},{"@pid":"25/3336","text":"V. Kamakoti 0001"}]},"title":"Karna: A Gate-Sizing based Security Aware EDA Flow for Improved Power Side-Channel Attack Protection.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SLPSKVRK19","doi":"10.1109/ICCAD45719.2019.8942173","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942173","url":"https://dblp.org/rec/conf/iccad/SLPSKVRK19"}, "url":"URL#2184968" }, { "@score":"1", "@id":"2184969", "info":{"authors":{"author":[{"@pid":"258/6841","text":"Ramesh Kumar Sah"},{"@pid":"62/6023-1","text":"Hassan Ghasemzadeh 0001"}]},"title":"Adar: Adversarial Activity Recognition in Wearables.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SahG19","doi":"10.1109/ICCAD45719.2019.8942124","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942124","url":"https://dblp.org/rec/conf/iccad/SahG19"}, "url":"URL#2184969" }, { "@score":"1", "@id":"2184970", "info":{"authors":{"author":[{"@pid":"199/6597","text":"Sahand Salamat"},{"@pid":"144/4477","text":"Behnam Khaleghi"},{"@pid":"139/8964","text":"Mohsen Imani"},{"@pid":"s/TajanaSimunic","text":"Tajana Rosing"}]},"title":"Workload-Aware Opportunistic Energy Efficiency in Multi-FPGA Platforms.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SalamatKIR19","doi":"10.1109/ICCAD45719.2019.8942115","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942115","url":"https://dblp.org/rec/conf/iccad/SalamatKIR19"}, "url":"URL#2184970" }, { "@score":"1", "@id":"2184971", "info":{"authors":{"author":[{"@pid":"231/9405","text":"Radhakrishna Sanka"},{"@pid":"129/2000","text":"Brian Crites"},{"@pid":"129/2080","text":"Jeffrey McDaniel"},{"@pid":"12/2711","text":"Philip Brisk"},{"@pid":"09/6011","text":"Douglas Densmore"}]},"title":"Specification, Integration, and Benchmarking of Continuous Flow Microfluidic Devices: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SankaCMBD19","doi":"10.1109/ICCAD45719.2019.8942171","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942171","url":"https://dblp.org/rec/conf/iccad/SankaCMBD19"}, "url":"URL#2184971" }, { "@score":"1", "@id":"2184972", "info":{"authors":{"author":[{"@pid":"07/6841","text":"Ulf Schlichtmann"},{"@pid":"177/9408","text":"Sabya Das"},{"@pid":"53/2026","text":"Ing-Chao Lin"},{"@pid":"71/7353","text":"Mark Po-Hung Lin"}]},"title":"Overview of 2019 CAD Contest at ICCAD.","venue":"ICCAD","pages":"1-2","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SchlichtmannDLL19","doi":"10.1109/ICCAD45719.2019.8942133","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942133","url":"https://dblp.org/rec/conf/iccad/SchlichtmannDLL19"}, "url":"URL#2184972" }, { "@score":"1", "@id":"2184973", "info":{"authors":{"author":[{"@pid":"173/7144","text":"Kaveh Shamsi"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"},{"@pid":"34/756","text":"Yier Jin"}]},"title":"IcySAT: Improved SAT-based Attacks on Cyclic Locked Circuits.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ShamsiPJ19","doi":"10.1109/ICCAD45719.2019.8942049","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942049","url":"https://dblp.org/rec/conf/iccad/ShamsiPJ19"}, "url":"URL#2184973" }, { "@score":"1", "@id":"2184974", "info":{"authors":{"author":[{"@pid":"179/9306","text":"Xiao Shi"},{"@pid":"77/6310-2","text":"Hao Yan 0002"},{"@pid":"08/267","text":"Jiajia Zhang"},{"@pid":"241/4315","text":"Qiancun Huang"},{"@pid":"89/1700","text":"Longxing Shi"},{"@pid":"75/5673-1","text":"Lei He 0001"}]},"title":"Efficient Yield Analysis for SRAM and Analog Circuits using Meta-Model based Importance Sampling Method.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ShiYZHSH19","doi":"10.1109/ICCAD45719.2019.8942069","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942069","url":"https://dblp.org/rec/conf/iccad/ShiYZHSH19"}, "url":"URL#2184974" }, { "@score":"1", "@id":"2184975", "info":{"authors":{"author":[{"@pid":"258/6650","text":"Hyein Shin"},{"@pid":"71/11469","text":"Jaehyeong Sim"},{"@pid":"166/2969","text":"Daewoong Lee"},{"@pid":"75/34","text":"Lee-Sup Kim"}]},"title":"A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ShinSLK19","doi":"10.1109/ICCAD45719.2019.8942072","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942072","url":"https://dblp.org/rec/conf/iccad/ShinSLK19"}, "url":"URL#2184975" }, { "@score":"1", "@id":"2184976", "info":{"authors":{"author":[{"@pid":"252/9888","text":"Jinhie Skarda"},{"@pid":"252/9883","text":"Logan Su"},{"@pid":"252/9700","text":"Ki Youl Yang"},{"@pid":"219/6935","text":"Dries Vercruysse"},{"@pid":"144/6915","text":"Neil V. Sapra"},{"@pid":"63/8825","text":"Jelena Vuckovic"}]},"title":"From Inverse Design to Implementation of Practical Photonics.","venue":"ICCAD","pages":"1-4","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SkardaSYVSV19","doi":"10.1109/ICCAD45719.2019.8942167","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942167","url":"https://dblp.org/rec/conf/iccad/SkardaSYVSV19"}, "url":"URL#2184976" }, { "@score":"1", "@id":"2184977", "info":{"authors":{"author":[{"@pid":"72/8236","text":"Yu-Hsuan Su"},{"@pid":"78/4772","text":"Richard Sun"},{"@pid":"15/835","text":"Pei-Hsin Ho"}]},"title":"2019 CAD Contest: System-level FPGA Routing with Timing Division Multiplexing Technique.","venue":"ICCAD","pages":"1-2","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SuSH19","doi":"10.1109/ICCAD45719.2019.8942051","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942051","url":"https://dblp.org/rec/conf/iccad/SuSH19"}, "url":"URL#2184977" }, { "@score":"1", "@id":"2184978", "info":{"authors":{"author":[{"@pid":"05/4187-2","text":"Qi Sun 0002"},{"@pid":"175/6569","text":"Tinghuan Chen"},{"@pid":"123/7053","text":"Jin Miao"},{"@pid":"28/4556-1","text":"Bei Yu 0001"}]},"title":"Power-Driven DNN Dataflow Optimization on FPGA.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/SunCMY19","doi":"10.1109/ICCAD45719.2019.8942085","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942085","url":"https://dblp.org/rec/conf/iccad/SunCMY19"}, "url":"URL#2184978" }, { "@score":"1", "@id":"2184979", "info":{"authors":{"author":[{"@pid":"121/4044","text":"Pai-Shun Ting"},{"@pid":"92/2628","text":"John P. Hayes"}]},"title":"Exploiting Randomness in Stochastic Computing.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/TingH19","doi":"10.1109/ICCAD45719.2019.8942138","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942138","url":"https://dblp.org/rec/conf/iccad/TingH19"}, "url":"URL#2184979" }, { "@score":"1", "@id":"2184980", "info":{"authors":{"author":[{"@pid":"216/8710","text":"Hakki Mert Torun"},{"@pid":"79/6142","text":"Huan Yu"},{"@pid":"241/4301","text":"Nihar Dasari"},{"@pid":"218/1176","text":"Venkata Chaitanya Krishna Chekuri"},{"@pid":"90/4842","text":"Arvind Singh"},{"@pid":"85/1809","text":"Jinwoo Kim"},{"@pid":"58/2235","text":"Sung Kyu Lim"},{"@pid":"66/1210","text":"Saibal Mukhopadhyay"},{"@pid":"84/2871","text":"Madhavan Swaminathan"}]},"title":"A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/TorunYDCSKLMS19","doi":"10.1109/ICCAD45719.2019.8942109","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942109","url":"https://dblp.org/rec/conf/iccad/TorunYDCSKLMS19"}, "url":"URL#2184980" }, { "@score":"1", "@id":"2184981", "info":{"authors":{"author":[{"@pid":"65/8358","text":"Tsun-Ming Tseng"},{"@pid":"179/2965","text":"Mengchu Li"},{"@pid":"258/6514","text":"Yushen Zhang"},{"@pid":"63/4181","text":"Tsung-Yi Ho"},{"@pid":"07/6841","text":"Ulf Schlichtmann"}]},"title":"Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/TsengLZHS19","doi":"10.1109/ICCAD45719.2019.8942104","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942104","url":"https://dblp.org/rec/conf/iccad/TsengLZHS19"}, "url":"URL#2184981" }, { "@score":"1", "@id":"2184982", "info":{"authors":{"author":[{"@pid":"65/8358","text":"Tsun-Ming Tseng"},{"@pid":"238/8002","text":"Alexandre Truppel"},{"@pid":"179/2965","text":"Mengchu Li"},{"@pid":"07/8314","text":"Mahdi Nikdast"},{"@pid":"07/6841","text":"Ulf Schlichtmann"}]},"title":"Wavelength-Routed Optical NoCs: Design and EDA - State of the Art and Future Directions: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/TsengTLNS19","doi":"10.1109/ICCAD45719.2019.8942092","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942092","url":"https://dblp.org/rec/conf/iccad/TsengTLNS19"}, "url":"URL#2184982" }, { "@score":"1", "@id":"2184983", "info":{"authors":{"author":[{"@pid":"227/2649","text":"Shashank Varshney"},{"@pid":"146/8510","text":"Hameedah Sultan"},{"@pid":"59/5009","text":"Palkesh Jain"},{"@pid":"s/SmrutiRSarangi","text":"Smruti R. Sarangi"}]},"title":"NanoTherm: An Analytical Fourier-Boltzmann Framework for Full Chip Thermal Simulations.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/VarshneySJS19","doi":"10.1109/ICCAD45719.2019.8942159","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942159","url":"https://dblp.org/rec/conf/iccad/VarshneySJS19"}, "url":"URL#2184983" }, { "@score":"1", "@id":"2184984", "info":{"authors":{"author":[{"@pid":"76/10051","text":"Rangharajan Venkatesan"},{"@pid":"133/9941","text":"Yakun Sophia Shao"},{"@pid":"175/8981","text":"Miaorong Wang"},{"@pid":"52/10063","text":"Jason Clemons"},{"@pid":"80/10397","text":"Steve Dai"},{"@pid":"85/9849","text":"Matthew Fojtik"},{"@pid":"145/1606","text":"Ben Keller"},{"@pid":"13/11177","text":"Alicia Klinefelter"},{"@pid":"28/3818","text":"Nathaniel Ross Pinckney"},{"@pid":"127/7770","text":"Priyanka Raina"},{"@pid":"342/9534-2","text":"Yanqing Zhang 0002"},{"@pid":"125/7922","text":"Brian Zimmer"},{"@pid":"d/WJDally","text":"William J. Dally"},{"@pid":"73/2231","text":"Joel S. Emer"},{"@pid":"k/StephenWKeckler","text":"Stephen W. Keckler"},{"@pid":"29/3580","text":"Brucek Khailany"}]},"title":"MAGNet: A Modular Accelerator Generator for Neural Networks.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/VenkatesanSWCDF19","doi":"10.1109/ICCAD45719.2019.8942127","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942127","url":"https://dblp.org/rec/conf/iccad/VenkatesanSWCDF19"}, "url":"URL#2184984" }, { "@score":"1", "@id":"2184985", "info":{"authors":{"author":[{"@pid":"231/4785","text":"Ankit Wagle"},{"@pid":"236/7066","text":"Elham Azari"},{"@pid":"60/2447","text":"Sarma B. K. Vrudhula"}]},"title":"Embedding Binary Perceptrons in FPGA to improve Area, Power and Performance.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WagleAV19","doi":"10.1109/ICCAD45719.2019.8942071","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942071","url":"https://dblp.org/rec/conf/iccad/WagleAV19"}, "url":"URL#2184985" }, { "@score":"1", "@id":"2184986", "info":{"authors":{"author":[{"@pid":"258/6837","text":"Zhan-Ling Wang"},{"@pid":"c/YaoWenChang","text":"Yao-Wen Chang"}]},"title":"Graph- and ILP-Based Cut Redistribution for Two-Dimensional Directed Self-Assembly.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangC19","doi":"10.1109/ICCAD45719.2019.8942090","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942090","url":"https://dblp.org/rec/conf/iccad/WangC19"}, "url":"URL#2184986" }, { "@score":"1", "@id":"2184987", "info":{"authors":{"author":[{"@pid":"43/8355-3","text":"Yuyang Wang 0003"},{"@pid":"c/KwangTingCheng","text":"Kwang-Ting Cheng"}]},"title":"Task Mapping-Assisted Laser Power Scaling for Optical Network-on-Chips.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangC19a","doi":"10.1109/ICCAD45719.2019.8942146","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942146","url":"https://dblp.org/rec/conf/iccad/WangC19a"}, "url":"URL#2184987" }, { "@score":"1", "@id":"2184988", "info":{"authors":{"author":[{"@pid":"75/7032","text":"Zhifei Wang"},{"@pid":"00/4883-8","text":"Jun Feng 0008"},{"@pid":"187/0876","text":"Xuanqi Chen"},{"@pid":"06/9981","text":"Zhehui Wang"},{"@pid":"244/8986","text":"Jiaxu Zhang"},{"@pid":"47/1018","text":"Shixi Chen"},{"@pid":"20/4396-1","text":"Jiang Xu 0001"}]},"title":"Systematic Exploration of High-Radix Integrated Silicon Photonic Switches for Datacenters.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangFCWZCX19","doi":"10.1109/ICCAD45719.2019.8942144","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942144","url":"https://dblp.org/rec/conf/iccad/WangFCWZCX19"}, "url":"URL#2184988" }, { "@score":"1", "@id":"2184989", "info":{"authors":{"author":[{"@pid":"96/8577-2","text":"Wei-Chen Wang 0002"},{"@pid":"01/1440","text":"Ping-Hsien Lin"},{"@pid":"139/2518","text":"Yung-Chun Li"},{"@pid":"137/1408","text":"Chien-Chung Ho"},{"@pid":"73/5531","text":"Yu-Ming Chang"},{"@pid":"49/2395","text":"Yuan-Hao Chang 0001"}]},"title":"Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangLLHCC19","doi":"10.1109/ICCAD45719.2019.8942084","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942084","url":"https://dblp.org/rec/conf/iccad/WangLLHCC19"}, "url":"URL#2184989" }, { "@score":"1", "@id":"2184990", "info":{"authors":{"author":[{"@pid":"w/LiCWang","text":"Li-C. Wang"},{"@pid":"180/6610","text":"Chuanhe Jay Shan"},{"@pid":"222/9571","text":"Ahmed Wahba"}]},"title":"Facilitating Deployment Of A Wafer-Based Analytic Software Using Tensor Methods: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangSW19","doi":"10.1109/ICCAD45719.2019.8942043","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942043","url":"https://dblp.org/rec/conf/iccad/WangSW19"}, "url":"URL#2184990" }, { "@score":"1", "@id":"2184991", "info":{"authors":{"author":[{"@pid":"75/5723","text":"Qian Wang"},{"@pid":"35/8397","text":"Tianyu Wang"},{"@pid":"150/0554","text":"Zhaoyan Shen"},{"@pid":"99/6654","text":"Zhiping Jia"},{"@pid":"73/11467","text":"Mengying Zhao"},{"@pid":"08/6845","text":"Zili Shao"}]},"title":"Re-Tangle: A ReRAM-based Processing-in-Memory Architecture for Transaction-based Blockchain.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WangWSJZS19","doi":"10.1109/ICCAD45719.2019.8942056","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942056","url":"https://dblp.org/rec/conf/iccad/WangWSJZS19"}, "url":"URL#2184991" }, { "@score":"1", "@id":"2184992", "info":{"authors":{"author":[{"@pid":"98/1744","text":"Robert Wille"},{"@pid":"97/6804","text":"Majid Haghparast"},{"@pid":"258/6369","text":"Smaran Adarsh"},{"@pid":"338/9382","text":"Tanmay Tanmay"}]},"title":"Towards HDL-based Synthesis of Reversible Circuits with No Additional Lines.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WilleHAT19","doi":"10.1109/ICCAD45719.2019.8942156","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942156","url":"https://dblp.org/rec/conf/iccad/WilleHAT19"}, "url":"URL#2184992" }, { "@score":"1", "@id":"2184993", "info":{"authors":{"author":[{"@pid":"194/2846","text":"Max Willsey"},{"@pid":"238/5424","text":"Ashley P. Stephenson"},{"@pid":"238/5416","text":"Chris Takahashi"},{"@pid":"199/2862","text":"Bichlien H. Nguyen"},{"@pid":"60/4729","text":"Karin Strauss"},{"@pid":"95/5263","text":"Luis Ceze"}]},"title":"Scaling Microfluidics to Complex, Dynamic Protocols: Invited Paper.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WillseySTNSC19","doi":"10.1109/ICCAD45719.2019.8942070","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942070","url":"https://dblp.org/rec/conf/iccad/WillseySTNSC19"}, "url":"URL#2184993" }, { "@score":"1", "@id":"2184994", "info":{"authors":{"author":[{"@pid":"258/6340","text":"Yannan Nellie Wu"},{"@pid":"73/2231","text":"Joel S. Emer"},{"@pid":"49/3209","text":"Vivienne Sze"}]},"title":"Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WuES19","doi":"10.1109/ICCAD45719.2019.8942149","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942149","url":"https://dblp.org/rec/conf/iccad/WuES19"}, "url":"URL#2184994" }, { "@score":"1", "@id":"2184995", "info":{"authors":{"author":[{"@pid":"258/6306","text":"Zhuanhao Wu"},{"@pid":"65/5699","text":"Hiren D. Patel"},{"@pid":"85/2923","text":"Manoj Sachdev"},{"@pid":"32/4329","text":"Mahesh V. Tripunitara"}]},"title":"Strengthening PUFs using Composition.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/WuPST19","doi":"10.1109/ICCAD45719.2019.8942176","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942176","url":"https://dblp.org/rec/conf/iccad/WuPST19"}, "url":"URL#2184995" }, { "@score":"1", "@id":"2184996", "info":{"authors":{"author":[{"@pid":"202/5867","text":"Qingcheng Xiao"},{"@pid":"83/2265","text":"Yun Liang 0001"}]},"title":"Zac: Towards Automatic Optimization and Deployment of Quantized Deep Neural Networks on Embedded Devices.","venue":"ICCAD","pages":"1-6","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/XiaoL19","doi":"10.1109/ICCAD45719.2019.8942058","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942058","url":"https://dblp.org/rec/conf/iccad/XiaoL19"}, "url":"URL#2184996" }, { "@score":"1", "@id":"2184997", "info":{"authors":{"author":[{"@pid":"139/1330","text":"Siyuan Xu"},{"@pid":"92/3091","text":"Benjamin Carrión Schäfer"}]},"title":"Approximating Behavioral HW Accelerators through Selective Partial Extractions onto Synthesizable Predictive Models.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/XuS19","doi":"10.1109/ICCAD45719.2019.8942119","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942119","url":"https://dblp.org/rec/conf/iccad/XuS19"}, "url":"URL#2184997" }, { "@score":"1", "@id":"2184998", "info":{"authors":{"author":[{"@pid":"21/4792","text":"Haobo Xu"},{"@pid":"94/3104-1","text":"Ying Wang 0001"},{"@pid":"00/8454","text":"Yujie Wang"},{"@pid":"86/8514","text":"Jiajun Li"},{"@pid":"124/4033","text":"Bosheng Liu"},{"@pid":"32/2695-1","text":"Yinhe Han 0001"}]},"title":"ACG-Engine: An Inference Accelerator for Content Generative Neural Networks.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/XuWWLLH19","doi":"10.1109/ICCAD45719.2019.8942169","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942169","url":"https://dblp.org/rec/conf/iccad/XuWWLLH19"}, "url":"URL#2184998" }, { "@score":"1", "@id":"2184999", "info":{"authors":{"author":[{"@pid":"170/0153","text":"Biying Xu"},{"@pid":"139/1776","text":"Keren Zhu 0001"},{"@pid":"97/9924","text":"Mingjie Liu"},{"@pid":"98/8892","text":"Yibo Lin"},{"@pid":"187/9213","text":"Shaolan Li"},{"@pid":"172/1912","text":"Xiyuan Tang"},{"@pid":"17/5023-1","text":"Nan Sun 0001"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}]},"title":"MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/XuZLLLTSP19","doi":"10.1109/ICCAD45719.2019.8942060","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942060","url":"https://dblp.org/rec/conf/iccad/XuZLLLTSP19"}, "url":"URL#2184999" }, { "@score":"1", "@id":"2185000", "info":{"authors":{"author":[{"@pid":"50/7693","text":"Muhammad Yasin"},{"@pid":"258/6681","text":"Chongzhi Zhao"},{"@pid":"79/9006","text":"Jeyavijayan (JV) Rajendran"}]},"title":"SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis.","venue":"ICCAD","pages":"1-4","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/YasinZR19","doi":"10.1109/ICCAD45719.2019.8942150","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942150","url":"https://dblp.org/rec/conf/iccad/YasinZR19"}, "url":"URL#2185000" }, { "@score":"1", "@id":"2185001", "info":{"authors":{"author":[{"@pid":"178/4486-2","text":"Kaiqi Zhang 0002"},{"@pid":"137/9583-3","text":"Xiyuan Zhang 0003"},{"@pid":"181/2621-5","text":"Zheng Zhang 0005"}]},"title":"Tucker Tensor Decomposition on FPGA.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZhangZZ19","doi":"10.1109/ICCAD45719.2019.8942103","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942103","url":"https://dblp.org/rec/conf/iccad/ZhangZZ19"}, "url":"URL#2185001" }, { "@score":"1", "@id":"2185002", "info":{"authors":{"author":[{"@pid":"75/6680-3","text":"Zheng Zhao 0003"},{"@pid":"147/1190","text":"Jiaqi Gu"},{"@pid":"212/7473","text":"Zhoufeng Ying"},{"@pid":"241/0902","text":"Chenghao Feng"},{"@pid":"53/4318","text":"Ray T. Chen"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}]},"title":"Design Technology for Scalable and Robust Photonic Integrated Circuits: Invited Paper.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZhaoGYFCP19","doi":"10.1109/ICCAD45719.2019.8942045","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942045","url":"https://dblp.org/rec/conf/iccad/ZhaoGYFCP19"}, "url":"URL#2185002" }, { "@score":"1", "@id":"2185003", "info":{"authors":{"author":[{"@pid":"z/HaiZhou","text":"Hai Zhou 0001"},{"@pid":"151/8281","text":"Amin Rezaei 0001"},{"@pid":"155/5569","text":"Yuanqi Shen"}]},"title":"Resolving the Trilemma in Logic Encryption.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZhouRS19","doi":"10.1109/ICCAD45719.2019.8942076","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942076","url":"https://dblp.org/rec/conf/iccad/ZhouRS19"}, "url":"URL#2185003" }, { "@score":"1", "@id":"2185004", "info":{"authors":{"author":[{"@pid":"139/1776","text":"Keren Zhu 0001"},{"@pid":"97/9924","text":"Mingjie Liu"},{"@pid":"98/8892","text":"Yibo Lin"},{"@pid":"170/0153","text":"Biying Xu"},{"@pid":"187/9213","text":"Shaolan Li"},{"@pid":"172/1912","text":"Xiyuan Tang"},{"@pid":"17/5023-1","text":"Nan Sun 0001"},{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}]},"title":"GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZhuLLXLTSP19","doi":"10.1109/ICCAD45719.2019.8942164","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942164","url":"https://dblp.org/rec/conf/iccad/ZhuLLXLTSP19"}, "url":"URL#2185004" }, { "@score":"1", "@id":"2185005", "info":{"authors":{"author":[{"@pid":"07/4259","text":"Zhenhua Zhu"},{"@pid":"210/2509","text":"Mingyuan Ma"},{"@pid":"179/1693","text":"Jialong Liu"},{"@pid":"15/7017","text":"Liying Xu"},{"@pid":"72/2676-3","text":"Xiaoming Chen 0003"},{"@pid":"212/7311","text":"Yuchao Yang"},{"@pid":"w/YuWang2","text":"Yu Wang 0002"},{"@pid":"94/1128","text":"Huazhong Yang"}]},"title":"A General Logic Synthesis Framework for Memristor-based Logic Design.","venue":"ICCAD","pages":"1-8","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZhuMLXCYWY19","doi":"10.1109/ICCAD45719.2019.8942111","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942111","url":"https://dblp.org/rec/conf/iccad/ZhuMLXCYWY19"}, "url":"URL#2185005" }, { "@score":"1", "@id":"2185006", "info":{"authors":{"author":[{"@pid":"199/1732","text":"Alwin Zulehner"},{"@pid":"179/2938","text":"Stefan Hillmich"},{"@pid":"98/1744","text":"Robert Wille"}]},"title":"How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing.","venue":"ICCAD","pages":"1-7","year":"2019","type":"Conference and Workshop Papers","access":"closed","key":"conf/iccad/ZulehnerHW19","doi":"10.1109/ICCAD45719.2019.8942057","ee":"https://doi.org/10.1109/ICCAD45719.2019.8942057","url":"https://dblp.org/rec/conf/iccad/ZulehnerHW19"}, "url":"URL#2185006" }, { "@score":"1", "@id":"2295703", "info":{"authors":{"author":{"@pid":"p/DavidZhigangPan","text":"David Z. Pan"}},"title":"Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019","venue":"ICCAD","publisher":"ACM","year":"2019","type":"Editorship","key":"conf/iccad/2019","doi":"10.1109/ICCAD45719.2019","ee":"https://doi.org/10.1109/ICCAD45719.2019","url":"https://dblp.org/rec/conf/iccad/2019"}, "url":"URL#2295703" } ] } } } )