:facetid:toc:\"db/conf/dac/dac2008.bht\"OK:facetid:toc:db/conf/dac/dac2008.bhtAfshin AbdollahiSignature based Boolean matching in the presence of don't cares.DAC642-6472008Conference and Workshop Papersclosedconf/dac/Abdollahi0810.1145/1391469.1391635https://doi.org/10.1145/1391469.1391635https://dblp.org/rec/conf/dac/Abdollahi08URL#5338022Mohamed H. Abu-RahmaKinshuk ChowdhuryJoseph WangZhiqin ChenSei Seung YoonMohab AnisA methodology for statistical estimation of read access yield in SRAMs.DAC205-2102008Conference and Workshop Papersclosedconf/dac/Abu-RahmaCWCYA0810.1145/1391469.1391522https://doi.org/10.1145/1391469.1391522https://dblp.org/rec/conf/dac/Abu-RahmaCWCYA08URL#5338023Arash AhmadiMark ZwolinskiSymbolic noise analysis approach to computational hardware optimization.DAC391-3962008Conference and Workshop Papersclosedconf/dac/AhmadiZ0810.1145/1391469.1391573https://doi.org/10.1145/1391469.1391573https://dblp.org/rec/conf/dac/AhmadiZ08URL#5338024Yousra AlkabaniFarinaz KoushanfarN-variant IC design: methodology and applications.DAC546-5512008Conference and Workshop Papersclosedconf/dac/AlkabaniK0810.1145/1391469.1391606https://doi.org/10.1145/1391469.1391606https://dblp.org/rec/conf/dac/AlkabaniK08URL#5338025Yousra AlkabaniTammara MasseyFarinaz KoushanfarMiodrag PotkonjakInput vector control for post-silicon leakage current minimization in the presence of manufacturing variability.DAC606-6092008Conference and Workshop Papersclosedconf/dac/AlkabaniMKP0810.1145/1391469.1391624https://doi.org/10.1145/1391469.1391624https://dblp.org/rec/conf/dac/AlkabaniMKP08URL#5338026Rogier BaertEddy de GreefErik BrockmeyerAn automatic scratch pad memory management tool and MPEG-4 encoder case study.DAC201-2042008Conference and Workshop Papersclosedconf/dac/BaertGB0810.1145/1391469.1391520https://doi.org/10.1145/1391469.1391520https://dblp.org/rec/conf/dac/BaertGB08URL#5338027Aydin O. BalkanGang Qu 0001Uzi VishkinAn area-efficient high-throughput hybrid interconnection network for single-chip parallel processing.DAC435-4402008Conference and Workshop Papersclosedconf/dac/BalkanQV0810.1145/1391469.1391583https://doi.org/10.1145/1391469.1391583https://dblp.org/rec/conf/dac/BalkanQV08URL#5338028Pouria BastaniNicholas CallegariLi-C. WangMagdy S. AbadirStatistical diagnosis of unmodeled systematic timing effects.DAC355-3602008Conference and Workshop Papersclosedconf/dac/BastaniCWA0810.1145/1391469.1391566https://doi.org/10.1145/1391469.1391566https://dblp.org/rec/conf/dac/BastaniCWA08URL#5338029Pouria BastaniKip KillpackLi-C. WangEli ChiproutSpeedpath prediction based on learning from a small set of examples.DAC217-2222008Conference and Workshop Papersclosedconf/dac/BastaniKWC0810.1145/1391469.1391524https://doi.org/10.1145/1391469.1391524https://dblp.org/rec/conf/dac/BastaniKWC08URL#5338030Lars BauerMuhammad Shafique 0001Jörg HenkelRun-time instruction set selection in a transmutable embedded processor.DAC56-612008Conference and Workshop Papersclosedconf/dac/BauerSH0810.1145/1391469.1391486https://doi.org/10.1145/1391469.1391486https://dblp.org/rec/conf/dac/BauerSH08URL#5338031Jerry BautistaTera-scale computing and interconnect challenges.DAC665-6672008Conference and Workshop Papersclosedconf/dac/Bautista0810.1145/1391469.1391641https://doi.org/10.1145/1391469.1391641https://dblp.org/rec/conf/dac/Bautista08URL#5338032Robert BeersPre-RTL formal verification: an intel experience.DAC806-8112008Conference and Workshop Papersclosedconf/dac/Beers0810.1145/1391469.1391675https://doi.org/10.1145/1391469.1391675https://dblp.org/rec/conf/dac/Beers08URL#5338033Krishna BharathEge EnginMadhavan SwaminathanAutomatic package and board decoupling capacitor placement using genetic algorithms and M-FDM.DAC560-5652008Conference and Workshop Papersclosedconf/dac/BharathES0810.1145/1391469.1391611https://doi.org/10.1145/1391469.1391611https://dblp.org/rec/conf/dac/BharathES08URL#5338034Stephen BijanskyAdnan AzizTuneFPGA: post-silicon tuning of dual-Vdd FPGAs.DAC796-7992008Conference and Workshop Papersclosedconf/dac/BijanskyA0810.1145/1391469.1391672https://doi.org/10.1145/1391469.1391672https://dblp.org/rec/conf/dac/BijanskyA08URL#5338035Garo BournoutianAlex OrailogluMiss reduction in embedded processors through dynamic, power-friendly cache design.DAC304-3092008Conference and Workshop Papersclosedconf/dac/BournoutianO0810.1145/1391469.1391546https://doi.org/10.1145/1391469.1391546https://dblp.org/rec/conf/dac/BournoutianO08URL#5338036Jay B. BrockmanSheng Li 0007Peter M. KoggeAmit KashyapMohammad M. MojarradiDesign of a mask-programmable memory/multiplier array using G4-FET technology.DAC337-3382008Conference and Workshop Papersclosedconf/dac/BrockmanLKKM0810.1145/1391469.1391555https://doi.org/10.1145/1391469.1391555https://dblp.org/rec/conf/dac/BrockmanLKKM08URL#5338037Zhen CaoBrian FooLei He 0001Mihaela van der SchaarOptimality and improvement of dynamic voltage scaling algorithms for multimedia applications.DAC179-1842008Conference and Workshop Papersclosedconf/dac/CaoFHS0810.1145/1391469.1391516https://doi.org/10.1145/1391469.1391516https://dblp.org/rec/conf/dac/CaoFHS08URL#5338038Michael L. CaseVictor N. KravetsAlan MishchenkoRobert K. BraytonMerging nodes under sequential observability.DAC540-5452008Conference and Workshop Papersclosedconf/dac/CaseKMB0810.1145/1391469.1391605https://doi.org/10.1145/1391469.1391605https://dblp.org/rec/conf/dac/CaseKMB08URL#5338039Bryan CatanzaroKurt KeutzerBor-Yiing SuParallelizing CAD: a timely research agenda for EDA.DAC12-172008Conference and Workshop Papersclosedconf/dac/CatanzaroKS0810.1145/1391469.1391475https://doi.org/10.1145/1391469.1391475https://dblp.org/rec/conf/dac/CatanzaroKS08URL#5338040Jianjiang CengJerónimo CastrillónWeihua ShengHanno ScharwächterRainer LeupersGerd AscheidHeinrich MeyrTsuyoshi IsshikiHiroaki KuniedaMAPS: an integrated framework for MPSoC application parallelization.DAC754-7592008Conference and Workshop Papersclosedconf/dac/CengCSSLAMIK0810.1145/1391469.1391663https://doi.org/10.1145/1391469.1391663https://dblp.org/rec/conf/dac/CengCSSLAMIK08URL#5338041Chia-Ming Chang 0002Shih-Hsu HuangYuan-Kai HoJia-Zong LinHsin-Po Wang 0002Yu-Sheng LuType-matching clock tree for zero skew clock gating.DAC714-7192008Conference and Workshop Papersclosedconf/dac/ChangHHLWL0810.1145/1391469.1391653https://doi.org/10.1145/1391469.1391653https://dblp.org/rec/conf/dac/ChangHHLWL08URL#5338042Po-Chun ChangI-Wei WuJean Jyh-Jiun ShannChung-Ping ChungETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor.DAC776-7792008Conference and Workshop Papersclosedconf/dac/ChangWSC0810.1145/1391469.1391667https://doi.org/10.1145/1391469.1391667https://dblp.org/rec/conf/dac/ChangWSC08URL#5338043Sumanta ChaudhuriSylvain GuilleyFlorent FlamentPhilippe HoogvorstJean-Luc DangerAn 8x8 run-time reconfigurable FPGA embedded in a SoC.DAC120-1252008Conference and Workshop Papersclosedconf/dac/ChaudhuriGFHD0810.1145/1391469.1391500https://doi.org/10.1145/1391469.1391500https://dblp.org/rec/conf/dac/ChaudhuriGFHD08URL#5338044Yuen-Hui CheeMike KoplowMichael MarkNathan PletcherMike SeemanFred L. BurghardtDan SteingartJan M. RabaeyPaul K. WrightSeth SandersPicoCube: a 1 cm3 sensor node powered by harvested energy.DAC114-1192008Conference and Workshop Papersclosedconf/dac/CheeKMPSBSRWS0810.1145/1391469.1391499https://doi.org/10.1145/1391469.1391499https://dblp.org/rec/conf/dac/CheeKMPSBSRWS08URL#5338045Tung-Chieh ChenAshutosh ChakrabortyDavid Z. PanAn integrated nonlinear placement framework with congestion and porosity aware buffer planning.DAC702-7072008Conference and Workshop Papersclosedconf/dac/ChenCP0810.1145/1391469.1391651https://doi.org/10.1145/1391469.1391651https://dblp.org/rec/conf/dac/ChenCP08URL#5338046Tai-Chen ChenGuang-Wan LiaoYao-Wen ChangPredictive formulae for OPC with applications to lithography-friendly routing.DAC510-5152008Conference and Workshop Papersclosedconf/dac/ChenLC0810.1145/1391469.1391599https://doi.org/10.1145/1391469.1391599https://dblp.org/rec/conf/dac/ChenLC08URL#5338047Guangyu ChenFeihui LiSeung Woo Son 0001Mahmut T. KandemirApplication mapping for chip multiprocessors.DAC620-6252008Conference and Workshop Papersclosedconf/dac/ChenLSK0810.1145/1391469.1391628https://doi.org/10.1145/1391469.1391628https://dblp.org/rec/conf/dac/ChenLSK08URL#5338048Yan Chen 0001Fei XieJin Yang 0006Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation.DAC143-1482008Conference and Workshop Papersclosedconf/dac/ChenXY0810.1145/1391469.1391508https://doi.org/10.1145/1391469.1391508https://dblp.org/rec/conf/dac/ChenXY08URL#5338049Chih-Chi ChengChia-Hua LinChung-Te LiSamuel C. ChangLiang-Gee CheniVisual: an intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processor.DAC90-952008Conference and Workshop Papersclosedconf/dac/ChengLLCC0810.1145/1391469.1391495https://doi.org/10.1145/1391469.1391495https://dblp.org/rec/conf/dac/ChengLLCC08URL#5338050Taeg Sang ChoKyeong-Jae LeeJing KongAnantha P. ChandrakasanThe design of a low power carbon nanotube chemical sensor system.DAC84-892008Conference and Workshop Papersclosedconf/dac/ChoLKC0810.1145/1391469.1391494https://doi.org/10.1145/1391469.1391494https://dblp.org/rec/conf/dac/ChoLKC08URL#5338051Minsik ChoKun YuanYongchan BanDavid Z. PanELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction.DAC504-5092008Conference and Workshop Papersclosedconf/dac/ChoYBP0810.1145/1391469.1391598https://doi.org/10.1145/1391469.1391598https://dblp.org/rec/conf/dac/ChoYBP08URL#5338052Yee Jern ChongSri ParameswaranRapid application specific floating-point unit generation with bit-alignment.DAC62-672008Conference and Workshop Papersclosedconf/dac/ChongP0810.1145/1391469.1391487https://doi.org/10.1145/1391469.1391487https://dblp.org/rec/conf/dac/ChongP08URL#5338053Mihir R. ChoudhuryYoungki YoonJing GuoKartik MohanramTechnology exploration for graphene nanoribbon FETs.DAC272-2772008Conference and Workshop Papersclosedconf/dac/ChoudhuryYGM0810.1145/1391469.1391539https://doi.org/10.1145/1391469.1391539https://dblp.org/rec/conf/dac/ChoudhuryYGM08URL#5338054Henry CookKevin SkadronPredictive design space exploration using genetically programmed response surfaces.DAC960-9652008Conference and Workshop Papersclosedconf/dac/CookS0810.1145/1391469.1391711https://doi.org/10.1145/1391469.1391711https://dblp.org/rec/conf/dac/CookS08URL#5338055Ayse Kivilcim CoskunTajana Simunic RosingKenny C. GrossTemperature management in multiprocessor SoCs using online learning.DAC890-8932008Conference and Workshop Papersclosedconf/dac/CoskunRG0810.1145/1391469.1391693https://doi.org/10.1145/1391469.1391693https://dblp.org/rec/conf/dac/CoskunRG08URL#5338056Clifford E. CummingsSystemVerilog implicit port enhancements accelerate system design & verification.DAC231-2362008Conference and Workshop Papersclosedconf/dac/Cummings0810.1145/1391469.1391528https://doi.org/10.1145/1391469.1391528https://dblp.org/rec/conf/dac/Cummings08URL#5338057Tomasz S. CzajkowskiStephen Dean BrownFunctionally linear decomposition and synthesis of logic circuits for FPGAs.DAC18-232008Conference and Workshop Papersclosedconf/dac/CzajkowskiB0810.1145/1391469.1391477https://doi.org/10.1145/1391469.1391477https://dblp.org/rec/conf/dac/CzajkowskiB08URL#5338058Paul T. DargaKarem A. SakallahIgor L. MarkovFaster symmetry discovery using sparsity of symmetries.DAC149-1542008Conference and Workshop Papersclosedconf/dac/DargaSM0810.1145/1391469.1391509https://doi.org/10.1145/1391469.1391509https://dblp.org/rec/conf/dac/DargaSM08URL#5338059Angan DasRanga VemuriTopology synthesis of analog circuits based on adaptively generated building blocks.DAC44-492008Conference and Workshop Papersclosedconf/dac/DasV0810.1145/1391469.1391483https://doi.org/10.1145/1391469.1391483https://dblp.org/rec/conf/dac/DasV08URL#5338060Ganesh S. DasikaShidhartha DasKevin FanScott A. MahlkeDavid M. BullDVFS in loop accelerators using BLADES.DAC894-8972008Conference and Workshop Papersclosedconf/dac/DasikaDFMB0810.1145/1391469.1391694https://doi.org/10.1145/1391469.1391694https://dblp.org/rec/conf/dac/DasikaDFMB08URL#5338061John D. DavisZhangxi TanFang Yu 0002Lintao ZhangA practical reconfigurable hardware accelerator for Boolean satisfiability solvers.DAC780-7852008Conference and Workshop Papersclosedconf/dac/DavisTYZ0810.1145/1391469.1391669https://doi.org/10.1145/1391469.1391669https://dblp.org/rec/conf/dac/DavisTYZ08URL#5338062Wei Dong 0002Peng Li 0001Xiaoji YeWavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines.DAC238-2432008Conference and Workshop Papersclosedconf/dac/DongLY0810.1145/1391469.1391531https://doi.org/10.1145/1391469.1391531https://dblp.org/rec/conf/dac/DongLY08URL#5338063Xiangyu DongXiaoxia WuGuangyu Sun 0003Yuan Xie 0001Hai Li 0001Yiran Chen 0001Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement.DAC554-5592008Conference and Workshop Papersclosedconf/dac/DongWSXLC0810.1145/1391469.1391610https://doi.org/10.1145/1391469.1391610https://dblp.org/rec/conf/dac/DongWSXLC08URL#5338064Chunjie DuanChengyu ZhuSunil P. KhatriForbidden transition free crosstalk avoidance CODEC design.DAC986-9912008Conference and Workshop Papersclosedconf/dac/DuanZK0810.1145/1391469.1391717https://doi.org/10.1145/1391469.1391717https://dblp.org/rec/conf/dac/DuanZK08URL#5338065Kenneth EguroScott HauckEnhancing timing-driven FPGA placement for pipelined netlists.DAC34-372008Conference and Workshop Papersclosedconf/dac/EguroH0810.1145/1391469.1391480https://doi.org/10.1145/1391469.1391480https://dblp.org/rec/conf/dac/EguroH08URL#5338066Tarek A. El-MoselhyIbrahim M. ElfadelDavid WidigerEfficient algorithm for the computation of on-chip capacitance sensitivities with respect to a large set of parameters.DAC906-9112008Conference and Workshop Papersclosedconf/dac/El-MoselhyEW0810.1145/1391469.1391699https://doi.org/10.1145/1391469.1391699https://dblp.org/rec/conf/dac/El-MoselhyEW08URL#5338067Melanie ElmHans-Joachim WunderlichMichael E. ImhofChristian G. ZoellinJens LeenstraNicolas MädingScan chain clustering for test power reduction.DAC828-8332008Conference and Workshop Papersclosedconf/dac/ElmWIZLM0810.1145/1391469.1391680https://doi.org/10.1145/1391469.1391680https://dblp.org/rec/conf/dac/ElmWIZLM08URL#5338068Mohammad Abdullah Al FaruqueRudolf KristJörg HenkelADAM: run-time agent-based distributed application mapping for on-chip communication.DAC760-7652008Conference and Workshop Papersclosedconf/dac/FaruqueKH0810.1145/1391469.1391664https://doi.org/10.1145/1391469.1391664https://dblp.org/rec/conf/dac/FaruqueKH08URL#5338069Claudio FaviEdoardo CharbonTechniques for fully integrated intra-/inter-chip optical communication.DAC343-3442008Conference and Workshop Papersclosedconf/dac/FaviC0810.1145/1391469.1391558https://doi.org/10.1145/1391469.1391558https://dblp.org/rec/conf/dac/FaviC08URL#5338070Peter FeldmannSoroush AbbaspourTowards a more physical approach to gate modeling for timing, noise, and power.DAC453-4552008Conference and Workshop Papersclosedconf/dac/FeldmannA0810.1145/1391469.1391587https://doi.org/10.1145/1391469.1391587https://dblp.org/rec/conf/dac/FeldmannA08URL#5338071Peter FeldmannSoroush AbbaspourDebjit SinhaGregory SchaefferRevanta BanerjiHemlata GuptaDriver waveform computation for timing analysis with multiple voltage threshold driver models.DAC425-4282008Conference and Workshop Papersclosedconf/dac/FeldmannASSBG0810.1145/1391469.1391580https://doi.org/10.1145/1391469.1391580https://dblp.org/rec/conf/dac/FeldmannASSBG08URL#5338072Ranan FraerGila KamhiMuhammad K. MhameedA new paradigm for synthesis and propagation of clock gating conditions.DAC658-6632008Conference and Workshop Papersclosedconf/dac/FraerKM0810.1145/1391469.1391638https://doi.org/10.1145/1391469.1391638https://dblp.org/rec/conf/dac/FraerKM08URL#5338073Paul D. FranzonW. Rhett DavisMichael B. SteerSteve LipaEun Chu OhThorlindur ThorolfssonSamson MelamedSonali LuniyaTad DoxseeStephen BerkeleyBen ShaniKurt ObermillerDesign and CAD for 3D integrated circuits.DAC668-6732008Conference and Workshop Papersclosedconf/dac/FranzonDSLOTMLDBSO0810.1145/1391469.1391642https://doi.org/10.1145/1391469.1391642https://dblp.org/rec/conf/dac/FranzonDSLOTMLDBSO08URL#5338074Malay K. GanaiAarti GuptaTunneling and slicing: towards scalable BMC.DAC137-1422008Conference and Workshop Papersclosedconf/dac/GanaiG0810.1145/1391469.1391507https://doi.org/10.1145/1391469.1391507https://dblp.org/rec/conf/dac/GanaiG08URL#5338075Ravikishore GandikotaDavid T. BlaauwDennis SylvesterModeling crosstalk in statistical static timing analysis.DAC974-9792008Conference and Workshop Papersclosedconf/dac/GandikotaBS0810.1145/1391469.1391715https://doi.org/10.1145/1391469.1391715https://dblp.org/rec/conf/dac/GandikotaBS08URL#5338076Lei GaoKingshuk KaruriStefan KraemerRainer LeupersGerd AscheidHeinrich MeyrMultiprocessor performance estimation using hybrid simulation.DAC325-3302008Conference and Workshop Papersclosedconf/dac/GaoKKLAM0810.1145/1391469.1391552https://doi.org/10.1145/1391469.1391552https://dblp.org/rec/conf/dac/GaoKKLAM08URL#5338077Rajesh GargCharu NagpalSunil P. KhatriA fast, analytical estimator for the SEU-induced pulse width in combinational designs.DAC918-9232008Conference and Workshop Papersclosedconf/dac/GargNK0810.1145/1391469.1391702https://doi.org/10.1145/1391469.1391702https://dblp.org/rec/conf/dac/GargNK08URL#5338078Michael GarlandSparse matrix computations on manycore GPU's.DAC2-62008Conference and Workshop Papersclosedconf/dac/Garland0810.1145/1391469.1391473https://doi.org/10.1145/1391469.1391473https://dblp.org/rec/conf/dac/Garland08URL#5338079Andreas GerstlauerJunyu PengDongwan ShinDaniel GajskiAtsushi NakamuraDai ArakiYuuji NishiharaSpecify-explore-refine (SER): from specification to implementation.DAC586-5912008Conference and Workshop Papersclosedconf/dac/GerstlauerPSGNAN0810.1145/1391469.1391617https://doi.org/10.1145/1391469.1391617https://dblp.org/rec/conf/dac/GerstlauerPSGNAN08URL#5338080Brian P. GinsburgAnantha P. ChandrakasanThe mixed signal optimum energy point: voltage and parallelism.DAC244-2492008Conference and Workshop Papersclosedconf/dac/GinsburgC0810.1145/1391469.1391532https://doi.org/10.1145/1391469.1391532https://dblp.org/rec/conf/dac/GinsburgC08URL#5338081Amit GoelSarma B. K. VrudhulaStatistical waveform and current source based standard cell models for accurate timing analysis.DAC227-2302008Conference and Workshop Papersclosedconf/dac/GoelV0810.1145/1391469.1391526https://doi.org/10.1145/1391469.1391526https://dblp.org/rec/conf/dac/GoelV08URL#5338082Steve GolsonPete ChurchillFlow engineering for physical implementation: theory and practice.DAC12008Conference and Workshop Papersclosedconf/dac/GolsonC0810.1145/1391469.1391471https://doi.org/10.1145/1391469.1391471https://dblp.org/rec/conf/dac/GolsonC08URL#5338083Michel GoraczkoJie Liu 0001Dimitrios LymberopoulosSlobodan MaticBodhi PriyanthaFeng Zhao 0001Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems.DAC191-1962008Conference and Workshop Papersclosedconf/dac/GoraczkoLLMPZ0810.1145/1391469.1391518https://doi.org/10.1145/1391469.1391518https://dblp.org/rec/conf/dac/GoraczkoLLMPZ08URL#5338084Bita GorjiaraDaniel GajskiAutomatic architecture refinement techniques for customizing processing elements.DAC379-3842008Conference and Workshop Papersclosedconf/dac/GorjiaraG0810.1145/1391469.1391571https://doi.org/10.1145/1391469.1391571https://dblp.org/rec/conf/dac/GorjiaraG08URL#5338085Yan Gu 0003Samarjit ChakrabortyControl theory-based DVS for interactive 3D games.DAC740-7452008Conference and Workshop Papersclosedconf/dac/GuC0810.1145/1391469.1391659https://doi.org/10.1145/1391469.1391659https://dblp.org/rec/conf/dac/GuC08URL#5338086Kanupriya GulatiSunil P. KhatriTowards acceleration of fault simulation using graphics processing units.DAC822-8272008Conference and Workshop Papersclosedconf/dac/GulatiK0810.1145/1391469.1391679https://doi.org/10.1145/1391469.1391679https://dblp.org/rec/conf/dac/GulatiK08URL#5338087Puneet Gupta 0001Andrew B. KahngBounded-lifetime integrated circuits.DAC347-3482008Conference and Workshop Papersclosedconf/dac/GuptaK0810.1145/1391469.1391560https://doi.org/10.1145/1391469.1391560https://dblp.org/rec/conf/dac/GuptaK08URL#5338088Onur GuzeyLi-C. WangJeremy R. LevittHarry FosterFunctional test selection based on unsupervised support vector analysis.DAC262-2672008Conference and Workshop Papersclosedconf/dac/GuzeyWLF0810.1145/1391469.1391536https://doi.org/10.1145/1391469.1391536https://dblp.org/rec/conf/dac/GuzeyWLF08URL#5338089Wilfried HaenschWhy should we do 3D integration?DAC674-6752008Conference and Workshop Papersclosedconf/dac/Haensch0810.1145/1391469.1391643https://doi.org/10.1145/1391469.1391643https://dblp.org/rec/conf/dac/Haensch08URL#5338090Malay HaldarGagandeep SinghSaurabh PrabhakarBasant DwivediAntara GhoshConstruction of concrete verification models from C++.DAC942-9472008Conference and Workshop Papersclosedconf/dac/HaldarSPDG0810.1145/1391469.1391707https://doi.org/10.1145/1391469.1391707https://dblp.org/rec/conf/dac/HaldarSPDG08URL#5338091Juan HamersLieven EeckhoutAutomated hardware-independent scenario identification.DAC954-9592008Conference and Workshop Papersclosedconf/dac/HamersE0810.1145/1391469.1391710https://doi.org/10.1145/1391469.1391710https://dblp.org/rec/conf/dac/HamersE08URL#5338092Ki Jin HanMadhavan SwaminathanEge EnginElectric field integral equation combined with cylindrical conduction mode basis functions for electrical modeling of three-dimensional interconnects.DAC421-4242008Conference and Workshop Papersclosedconf/dac/HanSE0810.1145/1391469.1391579https://doi.org/10.1145/1391469.1391579https://dblp.org/rec/conf/dac/HanSE08URL#5338093Eshel HaritanToshihiro HattoriHiroyuki YagiPierre G. PaulinWayne H. WolfAchim NohlDrew WingardMike MullerMulticore design is the challenge! what is the solution?DAC128-1302008Conference and Workshop Papersclosedconf/dac/HaritanHYPWNWM0810.1145/1391469.1391504https://doi.org/10.1145/1391469.1391504https://dblp.org/rec/conf/dac/HaritanHYPWNWM08URL#5338094Christian HaubeltThomas SchlichterJoachim KeinertMichael MeredithSystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models.DAC580-5852008Conference and Workshop Papersclosedconf/dac/HaubeltSKM0810.1145/1391469.1391616https://doi.org/10.1145/1391469.1391616https://dblp.org/rec/conf/dac/HaubeltSKM08URL#5338095Khaled R. HeloueFarid N. NajmParameterized timing analysis with general delay models and arbitrary variation sources.DAC403-4082008Conference and Workshop Papersclosedconf/dac/HeloueN0810.1145/1391469.1391576https://doi.org/10.1145/1391469.1391576https://dblp.org/rec/conf/dac/HeloueN08URL#5338096Sebastian HerbertDiana MarculescuCharacterizing chip-multiprocessor variability-tolerance.DAC313-3182008Conference and Workshop Papersclosedconf/dac/HerbertM0810.1145/1391469.1391550https://doi.org/10.1145/1391469.1391550https://dblp.org/rec/conf/dac/HerbertM08URL#5338097C. Richard HoMichael TheobaldMartin M. DeneroffRon O. DrorJoseph GagliardoDavid E. ShawEarly formal verification of conditional coverage points to identify intrinsically hard-to-verify logic.DAC268-2712008Conference and Workshop Papersclosedconf/dac/HoTDDGS0810.1145/1391469.1391537https://doi.org/10.1145/1391469.1391537https://dblp.org/rec/conf/dac/HoTDDGS08URL#5338098Houman HomayounSudeep PasrichaMohammad A. MakhzanAlexander V. VeidenbaumDynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency.DAC68-712008Conference and Workshop Papersclosedconf/dac/HomayounPMV0810.1145/1391469.1391488https://doi.org/10.1145/1391469.1391488https://dblp.org/rec/conf/dac/HomayounPMV08URL#5338099Ming-Chang HsiehChih-Tsun HuangAn embedded infrastructure of debug and trace interface for the DSP platform.DAC866-8712008Conference and Workshop Papersclosedconf/dac/HsiehH0810.1145/1391469.1391688https://doi.org/10.1145/1391469.1391688https://dblp.org/rec/conf/dac/HsiehH08URL#5338100Chia-Jui HsuJosé Luis PinoShuvra S. BhattacharyyaMultithreaded simulation for synchronous dataflow graphs.DAC331-3362008Conference and Workshop Papersclosedconf/dac/HsuPB0810.1145/1391469.1391553https://doi.org/10.1145/1391469.1391553https://dblp.org/rec/conf/dac/HsuPB08URL#5338101Tien-Yuan HsuTing-Chi WangA generalized network flow based algorithm for power-aware FPGA memory mapping.DAC30-332008Conference and Workshop Papersclosedconf/dac/HsuW0810.1145/1391469.1391479https://doi.org/10.1145/1391469.1391479https://dblp.org/rec/conf/dac/HsuW08URL#5338102Yu Hu 0002Victor ShihRupak MajumdarLei He 0001FPGA area reduction by multi-output function based sequential resynthesis.DAC24-292008Conference and Workshop Papersclosedconf/dac/HuSMH0810.1145/1391469.1391478https://doi.org/10.1145/1391469.1391478https://dblp.org/rec/conf/dac/HuSMH08URL#5338103Wei Huang 0004Mircea R. StanKarthik SankaranarayananRobert J. RibandoKevin SkadronMany-core design from a thermal perspective.DAC746-7492008Conference and Workshop Papersclosedconf/dac/HuangSSRS0810.1145/1391469.1391660https://doi.org/10.1145/1391469.1391660https://dblp.org/rec/conf/dac/HuangSSRS08URL#5338104Lin Huang 0002Feng YuanQiang Xu 0001On reliable modular testing with vulnerable test access mechanisms.DAC834-8392008Conference and Workshop Papersclosedconf/dac/HuangYX0810.1145/1391469.1391681https://doi.org/10.1145/1391469.1391681https://dblp.org/rec/conf/dac/HuangYX08URL#5338105Aaron P. HurstAutomatic synthesis of clock gating logic with controlled netlist perturbation.DAC654-6572008Conference and Workshop Papersclosedconf/dac/Hurst0810.1145/1391469.1391637https://doi.org/10.1145/1391469.1391637https://dblp.org/rec/conf/dac/Hurst08URL#5338106Aaron P. HurstAlan MishchenkoRobert K. BraytonScalable min-register retiming under timing and initializability constraints.DAC534-5392008Conference and Workshop Papersclosedconf/dac/HurstMB0810.1145/1391469.1391604https://doi.org/10.1145/1391469.1391604https://dblp.org/rec/conf/dac/HurstMB08URL#5338107Masanori ImaiTakashi SatoNoriaki NakayamaKazuya MasuNon-parametric statistical static timing analysis: an SSTA framework for arbitrary distribution.DAC698-7012008Conference and Workshop Papersclosedconf/dac/ImaiSNM0810.1145/1391469.1391649https://doi.org/10.1145/1391469.1391649https://dblp.org/rec/conf/dac/ImaiSNM08URL#5338108M. Haykel Ben JamaaDavid AtienzaYusuf LeblebiciGiovanni De MicheliProgrammable logic circuits based on ambipolar CNFET.DAC339-3402008Conference and Workshop Papersclosedconf/dac/JamaaALM0810.1145/1391469.1391556https://doi.org/10.1145/1391469.1391556https://dblp.org/rec/conf/dac/JamaaALM08URL#5338109Kwangok JeongAndrew B. KahngChul-Hong ParkHailong YaoDose map and placement co-optimization for timing yield enhancement and leakage power reduction.DAC516-5212008Conference and Workshop Papersclosedconf/dac/JeongKPY0810.1145/1391469.1391600https://doi.org/10.1145/1391469.1391600https://dblp.org/rec/conf/dac/JeongKPY08URL#5338110Hailin JiangMalgorzata Marek-SadowskaPower gating scheduling for power/ground noise reduction.DAC980-9852008Conference and Workshop Papersclosedconf/dac/JiangM0810.1145/1391469.1391716https://doi.org/10.1145/1391469.1391716https://dblp.org/rec/conf/dac/JiangM08URL#5338111Zhanyuan JiangWeiping ShiCircuit-wise buffer insertion and gate sizing algorithm with scalability.DAC708-7132008Conference and Workshop Papersclosedconf/dac/JiangS0810.1145/1391469.1391652https://doi.org/10.1145/1391469.1391652https://dblp.org/rec/conf/dac/JiangS08URL#5338112Zhe-Wei JiangBor-Yiing SuYao-Wen ChangRoutability-driven analytical placement by net overlapping removal for large-scale mixed-size designs.DAC167-1722008Conference and Workshop Papersclosedconf/dac/JiangSC0810.1145/1391469.1391513https://doi.org/10.1145/1391469.1391513https://dblp.org/rec/conf/dac/JiangSC08URL#5338113Zhanpeng JinAllen C. ChengImprove simulation efficiency using statistical benchmark subsetting: an ImplantBench case study.DAC970-9732008Conference and Workshop Papersclosedconf/dac/JinC0810.1145/1391469.1391713https://doi.org/10.1145/1391469.1391713https://dblp.org/rec/conf/dac/JinC08URL#5338114Vivek JoshiBrian ClineDennis SylvesterDavid T. BlaauwKanak AgarwalLeakage power reduction using stress-enhanced layouts.DAC912-9172008Conference and Workshop Papersclosedconf/dac/JoshiCSBA0810.1145/1391469.1391700https://doi.org/10.1145/1391469.1391700https://dblp.org/rec/conf/dac/JoshiCSBA08URL#5338115Hwisung JungPeng RongMassoud PedramStochastic modeling of a thermally-managed multi-core system.DAC728-7332008Conference and Workshop Papersclosedconf/dac/JungRP0810.1145/1391469.1391657https://doi.org/10.1145/1391469.1391657https://dblp.org/rec/conf/dac/JungRP08URL#5338116Igor KellerKing Ho TamVinod KariatChallenges in gate level modeling for delay and SI at 65nm and below.DAC468-4732008Conference and Workshop Papersclosedconf/dac/KellerTK0810.1145/1391469.1391590https://doi.org/10.1145/1391469.1391590https://dblp.org/rec/conf/dac/KellerTK08URL#5338117Daeik D. KimChoongyeun ChoJonghae KimAnalog parallelism in ring-based VCOs.DAC341-3422008Conference and Workshop Papersclosedconf/dac/KimCK0810.1145/1391469.1391557https://doi.org/10.1145/1391469.1391557https://dblp.org/rec/conf/dac/KimCK08URL#5338118Donghyun KimKwanho KimJoo-Young Kim 0001Seungjin Lee 0001Hoi-Jun YooVision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor.DAC96-1012008Conference and Workshop Papersclosedconf/dac/KimKKLY0810.1145/1391469.1391496https://doi.org/10.1145/1391469.1391496https://dblp.org/rec/conf/dac/KimKKLY08URL#5338119Smita KrishnaswamyIgor L. MarkovJohn P. HayesOn the role of timing masking in reliable logic circuit design.DAC924-9292008Conference and Workshop Papersclosedconf/dac/KrishnaswamyMH0810.1145/1391469.1391703https://doi.org/10.1145/1391469.1391703https://dblp.org/rec/conf/dac/KrishnaswamyMH08URL#5338120Chaitanya KshirsagarMohamed N. El-ZeftawiKaustav BanerjeeAnalysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube FETs.DAC250-2552008Conference and Workshop Papersclosedconf/dac/KshirsagarEB0810.1145/1391469.1391533https://doi.org/10.1145/1391469.1391533https://dblp.org/rec/conf/dac/KshirsagarEB08URL#5338121Andreas KuehlmannAnjan BoseDavid E. CormanRob A. RutenbarRobert M. ManningAnna NewmanVerifying really complex systems: on earth and beyond.DAC552-5532008Conference and Workshop Papersclosedconf/dac/KuehlmannBCRMN0810.1145/1391469.1391608https://doi.org/10.1145/1391469.1391608https://dblp.org/rec/conf/dac/KuehlmannBCRMN08URL#5338122Jaydeep P. KulkarniKeejong KimSang Phill ParkKaushik Roy 0001Process variation tolerant SRAM array for ultra low voltage applications.DAC108-1132008Conference and Workshop Papersclosedconf/dac/KulkarniKPR0810.1145/1391469.1391498https://doi.org/10.1145/1391469.1391498https://dblp.org/rec/conf/dac/KulkarniKPR08URL#5338123Sanjay V. KumarChandramouli V. KashyapSachin S. SapatnekarA framework for block-based timing sensitivity analysis.DAC688-6932008Conference and Workshop Papersclosedconf/dac/KumarKS0810.1145/1391469.1391647https://doi.org/10.1145/1391469.1391647https://dblp.org/rec/conf/dac/KumarKS08URL#5338124Sudipta KunduMalay K. GanaiRajesh Gupta 0001Partial order reduction for scalable testing of systemC TLM designs.DAC936-9412008Conference and Workshop Papersclosedconf/dac/KunduGG0810.1145/1391469.1391706https://doi.org/10.1145/1391469.1391706https://dblp.org/rec/conf/dac/KunduGG08URL#5338125Ian KuonJonathan RoseAutomated transistor sizing for FPGA architecture exploration.DAC792-7952008Conference and Workshop Papersclosedconf/dac/KuonR0810.1145/1391469.1391671https://doi.org/10.1145/1391469.1391671https://dblp.org/rec/conf/dac/KuonR08URL#5338126Masanori KurimotoHiroaki SuzukiRei AkiyamaTadao YamanakaHaruyuki OhkumaHidehiro TakataHirofumi ShinoharaPhase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling.DAC884-8892008Conference and Workshop Papersclosedconf/dac/KurimotoSAYOTS0810.1145/1391469.1391692https://doi.org/10.1145/1391469.1391692https://dblp.org/rec/conf/dac/KurimotoSAYOTS08URL#5338127Woo-Cheol KwonSungjoo YooSung-Min HongByeong MinKyu-Myung ChoiSoo-Kwan EoA practical approach of memory access parallelization to exploit multiple off-chip DDR memories.DAC447-4522008Conference and Workshop Papersclosedconf/dac/KwonYHMCE0810.1145/1391469.1391585https://doi.org/10.1145/1391469.1391585https://dblp.org/rec/conf/dac/KwonYHMCE08URL#5338128Ming-che LaiZhiying Wang 0003Lei GaoHongyi LuKui DaiA dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers.DAC630-6332008Conference and Workshop Papersclosedconf/dac/LaiWGLD0810.1145/1391469.1391630https://doi.org/10.1145/1391469.1391630https://dblp.org/rec/conf/dac/LaiWGLD08URL#5338129Kelly D. LarsonTranslation of an existing VMM-based SystemVerilog testbench to OVM.DAC2372008Conference and Workshop Papersclosedconf/dac/Larson0810.1145/1391469.1391529https://doi.org/10.1145/1391469.1391529https://dblp.org/rec/conf/dac/Larson08URL#5338130Joon Goo LeeDongha JungJiho ChuSeokjoong HwangJong-Kook KimJanam KuSeon Wook KimApplying passive RFID system to wireless headphones for extreme low power consumption.DAC486-4912008Conference and Workshop Papersclosedconf/dac/LeeJCHKKK0810.1145/1391469.1391594https://doi.org/10.1145/1391469.1391594https://dblp.org/rec/conf/dac/LeeJCHKKK08URL#5338131Ruei-Rung LeeJie-Hong Roland JiangWei-Lun HungBi-decomposing large Boolean functions via interpolation and satisfiability solving.DAC636-6412008Conference and Workshop Papersclosedconf/dac/LeeJH0810.1145/1391469.1391634https://doi.org/10.1145/1391469.1391634https://dblp.org/rec/conf/dac/LeeJH08URL#5338132Jing Li 0073Charles AugustineSayeef S. SalahuddinKaushik Roy 0001Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement.DAC278-2832008Conference and Workshop Papersclosedconf/dac/LiASR0810.1145/1391469.1391540https://doi.org/10.1145/1391469.1391540https://dblp.org/rec/conf/dac/LiASR08URL#5338133Min Li 0001Bruno BougardDavid NovoLiesbet Van der PerreFrancky CatthoorHow to let instruction set processor beat ASIC for low power wireless baseband implementation: a system level approach.DAC345-3462008Conference and Workshop Papersclosedconf/dac/LiBNPC0810.1145/1391469.1391559https://doi.org/10.1145/1391469.1391559https://dblp.org/rec/conf/dac/LiBNPC08URL#5338134Xin Li 0001Hongzhou LiuStatistical regression for efficient high-dimensional modeling of analog and mixed-signal performance variations.DAC38-432008Conference and Workshop Papersclosedconf/dac/LiL0810.1145/1391469.1391482https://doi.org/10.1145/1391469.1391482https://dblp.org/rec/conf/dac/LiL08URL#5338135Tao LiWenjun Zhang 0001Zhiping YuFull-chip leakage analysis in nano-scale technologies: mechanisms, variation sources, and verification.DAC594-5992008Conference and Workshop Papersclosedconf/dac/LiZY0810.1145/1391469.1391622https://doi.org/10.1145/1391469.1391622https://dblp.org/rec/conf/dac/LiZY08URL#5338136Yun Liang 0001Tulika MitraCache modeling in probabilistic execution time analysis.DAC319-3242008Conference and Workshop Papersclosedconf/dac/LiangM0810.1145/1391469.1391551https://doi.org/10.1145/1391469.1391551https://dblp.org/rec/conf/dac/LiangM08URL#5338137Mark Po-Hung LinShyh-Chang LinAnalog placement based on hierarchical module clustering.DAC50-552008Conference and Workshop Papersclosedconf/dac/LinL0810.1145/1391469.1391484https://doi.org/10.1145/1391469.1391484https://dblp.org/rec/conf/dac/LinL08URL#5338138Yu-Kun LinDe-Wei LiChia-Chun LinTzu-Yun KuoSian-Jin WuWei-Cheng TaiWei-Cheng ChangTian-Sheuan ChangA 242mW, 10mm21080p H.264/AVC high profile encoder chip.DAC78-832008Conference and Workshop Papersclosedconf/dac/LinLLKWTCC0810.1145/1391469.1391493https://doi.org/10.1145/1391469.1391493https://dblp.org/rec/conf/dac/LinLLKWTCC08URL#5338139Yi-Ting LinWen-Chi ShiueIng-Jer HuangA multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer.DAC862-8652008Conference and Workshop Papersclosedconf/dac/LinSH0810.1145/1391469.1391687https://doi.org/10.1145/1391469.1391687https://dblp.org/rec/conf/dac/LinSH08URL#5338140Shenghua LiuGuoqiang ChenTom Tong JingLei He 0001Tianpei ZhangRobi DuttaXianlong HongTopological routing to maximize routability for package substrate.DAC566-5692008Conference and Workshop Papersclosedconf/dac/LiuCJHZDH0810.1145/1391469.1391612https://doi.org/10.1145/1391469.1391612https://dblp.org/rec/conf/dac/LiuCJHZDH08URL#5338141Song LiuSeda Ogrenci MemikYu ZhangGokhan MemikA power and temperature aware DRAM architecture.DAC878-8832008Conference and Workshop Papersclosedconf/dac/LiuMZM0810.1145/1391469.1391691https://doi.org/10.1145/1391469.1391691https://dblp.org/rec/conf/dac/LiuMZM08URL#5338142Jui-Hsiang LiuMing-Feng TsaiLumdo ChenCharlie Chung-Ping ChenAccurate and analytical statistical spatial correlation modeling for VLSI DFM applications.DAC694-6972008Conference and Workshop Papersclosedconf/dac/LiuTCC0810.1145/1391469.1391648https://doi.org/10.1145/1391469.1391648https://dblp.org/rec/conf/dac/LiuTCC08URL#5338143Jieyi LongSeda Ogrenci MemikAutomated design of self-adjusting pipelines.DAC211-2162008Conference and Workshop Papersclosedconf/dac/LongM0810.1145/1391469.1391523https://doi.org/10.1145/1391469.1391523https://dblp.org/rec/conf/dac/LongM08URL#5338144Ya-Shuai LüLi Shen 0007Libo HuangZhiying Wang 0003Nong XiaoCustomizing computation accelerators for extensible multi-issue processors with effective optimization techniques.DAC197-2002008Conference and Workshop Papersclosedconf/dac/LuSHWX0810.1145/1391469.1391519https://doi.org/10.1145/1391469.1391519https://dblp.org/rec/conf/dac/LuSHWX08URL#5338145Martin LukasiewyczMichael GlaßChristian HaubeltJürgen TeichRichard ReglerBardo LangConcurrent topology and routing optimization in automotive network integration.DAC626-6292008Conference and Workshop Papersclosedconf/dac/LukasiewyczGHTRL0810.1145/1391469.1391629https://doi.org/10.1145/1391469.1391629https://dblp.org/rec/conf/dac/LukasiewyczGHTRL08URL#5338146Juan Antonio MaestroPedro ReviriegoStudy of the effects of MBUs on the reliability of a 150 nm SRAM device.DAC930-9352008Conference and Workshop Papersclosedconf/dac/MaestroR0810.1145/1391469.1391704https://doi.org/10.1145/1391469.1391704https://dblp.org/rec/conf/dac/MaestroR08URL#5338147Suman Kalyan MandalPraveen BhojwaniSaraju P. MohantyRabi N. MahapatraIntellBatt: towards smarter battery design.DAC872-8772008Conference and Workshop Papersclosedconf/dac/MandalBMM0810.1145/1391469.1391690https://doi.org/10.1145/1391469.1391690https://dblp.org/rec/conf/dac/MandalBMM08URL#5338148Tim MattsonMichael WrinnParallel programming: can we PLEASE get it right this time?DAC7-112008Conference and Workshop Papersclosedconf/dac/MattsonW0810.1145/1391469.1391474https://doi.org/10.1145/1391469.1391474https://dblp.org/rec/conf/dac/MattsonW08URL#5338149Noel MenezesChandramouli V. KashyapChirayu S. AminA "true" electrical cell model for timing, noise, and power grid verification.DAC462-4672008Conference and Workshop Papersclosedconf/dac/MenezesKA0810.1145/1391469.1391589https://doi.org/10.1145/1391469.1391589https://dblp.org/rec/conf/dac/MenezesKA08URL#5338150Peter A. MilderFranz FranchettiJames C. HoeMarkus PüschelFormal datapath representation and manipulation for implementing DSP transforms.DAC385-3902008Conference and Workshop Papersclosedconf/dac/MilderFHP0810.1145/1391469.1391572https://doi.org/10.1145/1391469.1391572https://dblp.org/rec/conf/dac/MilderFHP08URL#5338151Raj S. MitraStrategies for mainstream usage of formal verification.DAC800-8052008Conference and Workshop Papersclosedconf/dac/Mitra0810.1145/1391469.1391674https://doi.org/10.1145/1391469.1391674https://dblp.org/rec/conf/dac/Mitra08URL#5338152Michael D. MoffittDavid A. PapaZhuo Li 0001Charles J. AlpertPath smoothing via discrete optimization.DAC724-7272008Conference and Workshop Papersclosedconf/dac/MoffittPLA0810.1145/1391469.1391655https://doi.org/10.1145/1391469.1391655https://dblp.org/rec/conf/dac/MoffittPLA08URL#5338153Swarup MohalikA. C. RajeevManoj G. DixitS. Ramesh 0002P. Vijay SumanParitosh K. PandyaShengbing JiangModel checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts.DAC296-2992008Conference and Workshop Papersclosedconf/dac/MohalikRDRSPJ0810.1145/1391469.1391544https://doi.org/10.1145/1391469.1391544https://dblp.org/rec/conf/dac/MohalikRDRSPJ08URL#5338154In-Ho MoonCompositional verification of retiming and sequential optimizations.DAC131-1362008Conference and Workshop Papersclosedconf/dac/Moon0810.1145/1391469.1391506https://doi.org/10.1145/1391469.1391506https://dblp.org/rec/conf/dac/Moon08URL#5338155Tarek MoselhyLuca DanielStochastic integral equation solver for efficient variation-aware interconnect extraction.DAC415-4202008Conference and Workshop Papersclosedconf/dac/MoselhyD0810.1145/1391469.1391578https://doi.org/10.1145/1391469.1391578https://dblp.org/rec/conf/dac/MoselhyD08URL#5338156Hazem MoussaAmer BaghdadiMichel JézéquelBinary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder.DAC429-4342008Conference and Workshop Papersclosedconf/dac/MoussaBJ0810.1145/1391469.1391582https://doi.org/10.1145/1391469.1391582https://dblp.org/rec/conf/dac/MoussaBJ08URL#5338157Seetharam NarasimhanSomnath PaulSwarup BhuniaCollective computing based on swarm intelligence.DAC349-3502008Conference and Workshop Papersclosedconf/dac/NarasimhanPB0810.1145/1391469.1391561https://doi.org/10.1145/1391469.1391561https://dblp.org/rec/conf/dac/NarasimhanPB08URL#5338158Kelvin NgChallenges in using system-level models for RTL verification.DAC812-8152008Conference and Workshop Papersclosedconf/dac/Ng0810.1145/1391469.1391676https://doi.org/10.1145/1391469.1391676https://dblp.org/rec/conf/dac/Ng08URL#5338159Min NiSeda Ogrenci MemikLeakage power-aware clock skew scheduling: converting stolen time into leakage power reduction.DAC610-6132008Conference and Workshop Papersclosedconf/dac/NiM0810.1145/1391469.1391625https://doi.org/10.1145/1391469.1391625https://dblp.org/rec/conf/dac/NiM08URL#5338160Arthur NieuwoudtJamil KawaYehia MassoudAutomated design of tunable impedance matching networks for reconfigurable wireless applications.DAC498-5032008Conference and Workshop Papersclosedconf/dac/NieuwoudtKM0810.1145/1391469.1391596https://doi.org/10.1145/1391469.1391596https://dblp.org/rec/conf/dac/NieuwoudtKM08URL#5338161Hristo NikolovMark Thompson 0001Todor P. StefanovAndy D. PimentelSimon PolstraRaj BoseClaudiu ZissulescuEd F. DeprettereDaedalus: toward composable multimedia MP-SoC design.DAC574-5792008Conference and Workshop Papersclosedconf/dac/NikolovTSPPBZD0810.1145/1391469.1391615https://doi.org/10.1145/1391469.1391615https://dblp.org/rec/conf/dac/NikolovTSPPBZD08URL#5338162Matt NowakJose CorletoChristopher ChunRiko RadojcicHolistic pathfinding: virtual wireless chip design for advanced technology and design exploration.DAC5932008Conference and Workshop Papersclosedconf/dac/NowakCCR0810.1145/1391469.1391620https://doi.org/10.1145/1391469.1391620https://dblp.org/rec/conf/dac/NowakCCR08URL#5338163Ümit Y. OgrasRadu MarculescuDiana MarculescuVariation-adaptive feedback control for networks-on-chip with multiple clock domains.DAC614-6192008Conference and Workshop Papersclosedconf/dac/OgrasMM0810.1145/1391469.1391627https://doi.org/10.1145/1391469.1391627https://dblp.org/rec/conf/dac/OgrasMM08URL#5338164Berkin ÖzisikyilmazGokhan MemikAlok N. ChoudharyEfficient system design space exploration using machine learning techniques.DAC966-9692008Conference and Workshop Papersclosedconf/dac/OzisikyilmazMC0810.1145/1391469.1391712https://doi.org/10.1145/1391469.1391712https://dblp.org/rec/conf/dac/OzisikyilmazMC08URL#5338165Seungwhun PaikYoungsoo ShinMultiobjective optimization of sleep vector for zigzag power-gated circuits in standard cell elements.DAC600-6052008Conference and Workshop Papersclosedconf/dac/PaikS0810.1145/1391469.1391623https://doi.org/10.1145/1391469.1391623https://dblp.org/rec/conf/dac/PaikS08URL#5338166Yu PangKatarzyna RadeckaOptimizing imprecise fixed-point arithmetic circuits specified by Taylor Series through arithmetic transform.DAC397-4022008Conference and Workshop Papersclosedconf/dac/PangR0810.1145/1391469.1391574https://doi.org/10.1145/1391469.1391574https://dblp.org/rec/conf/dac/PangR08URL#5338167Sung-Boem ParkSubhasish MitraIFRA: instruction footprint recording and analysis for post-silicon bug localization in processors.DAC373-3782008Conference and Workshop Papersclosedconf/dac/ParkM0810.1145/1391469.1391569https://doi.org/10.1145/1391469.1391569https://dblp.org/rec/conf/dac/ParkM08URL#5338168Krutartha PatelSri ParameswaranSHIELD: a software hardware design methodology for security and reliability of MPSoCs.DAC858-8612008Conference and Workshop Papersclosedconf/dac/PatelP0810.1145/1391469.1391686https://doi.org/10.1145/1391469.1391686https://dblp.org/rec/conf/dac/PatelP08URL#5338169Somnath PaulSwarup BhuniaReconfigurable computing using content addressable memory for improved performance and resource usage.DAC786-7912008Conference and Workshop Papersclosedconf/dac/PaulB0810.1145/1391469.1391670https://doi.org/10.1145/1391469.1391670https://dblp.org/rec/conf/dac/PaulB08URL#5338170Nathaniel Ross PinckneyThomas BarrMichael DayringerMatthew McKnettNan Jiang 0009Carl NygaardDavid Money HarrisJoel StanleyBraden PhillipsA MIPS R2000 implementation.DAC102-1072008Conference and Workshop Papersclosedconf/dac/PinckneyBDMJNHSP0810.1145/1391469.1391497https://doi.org/10.1145/1391469.1391497https://dblp.org/rec/conf/dac/PinckneyBDMJNHSP08URL#5338171Piti PiyachonYan LuoDesign of high performance pattern matching engine through compact deterministic finite automata.DAC852-8572008Conference and Workshop Papersclosedconf/dac/PiyachonL0810.1145/1391469.1391685https://doi.org/10.1145/1391469.1391685https://dblp.org/rec/conf/dac/PiyachonL08URL#5338172Miodrag PotkonjakFarinaz Koushanfar(Bio)-behavioral CAD.DAC351-3522008Conference and Workshop Papersclosedconf/dac/PotkonjakK0810.1145/1391469.1391562https://doi.org/10.1145/1391469.1391562https://dblp.org/rec/conf/dac/PotkonjakK08URL#5338173Ruchir PuriWilliam H. JoynerShekhar BorkarTy GaribayJonathan LotzRobert K. MontoyeCustom is from Venus and synthesis from Mars.DAC9922008Conference and Workshop Papersclosedconf/dac/PuriJBGLM0810.1145/1391469.1391719https://doi.org/10.1145/1391469.1391719https://dblp.org/rec/conf/dac/PuriJBGLM08URL#5338174Ruchir PuriDevadas VarmaDarvin EdwardsAlan J. WegerPaul D. FranzonAndrew YangStephen V. KosonockyKeeping hot chips cool: are IC thermal problems hot air?DAC634-6352008Conference and Workshop Papersclosedconf/dac/PuriVEWFYK0810.1145/1391469.1391632https://doi.org/10.1145/1391469.1391632https://dblp.org/rec/conf/dac/PuriVEWFYK08URL#5338175Weikang QianMarc D. RiedelThe synthesis of robust polynomial arithmetic with stochastic logic.DAC648-6532008Conference and Workshop Papersclosedconf/dac/QianR0810.1145/1391469.1391636https://doi.org/10.1145/1391469.1391636https://dblp.org/rec/conf/dac/QianR08URL#5338176S. Raja 0002F. VaradiMurat R. BecerJoao GeadaTransistor level gate modeling for accurate and fast timing, noise, and power analysis.DAC456-4612008Conference and Workshop Papersclosedconf/dac/RajaVBG0810.1145/1391469.1391588https://doi.org/10.1145/1391469.1391588https://dblp.org/rec/conf/dac/RajaVBG08URL#5338177Anand RajaramDavid Z. PanRobust chip-level clock tree synthesis for SOC designs.DAC720-7232008Conference and Workshop Papersclosedconf/dac/RajaramP0810.1145/1391469.1391654https://doi.org/10.1145/1391469.1391654https://dblp.org/rec/conf/dac/RajaramP08URL#5338178Sudhakar M. ReddyIrith PomeranzChen LiuOn tests to detect via opens in digital CMOS circuits.DAC840-8452008Conference and Workshop Papersclosedconf/dac/ReddyPL0810.1145/1391469.1391682https://doi.org/10.1145/1391469.1391682https://dblp.org/rec/conf/dac/ReddyPL08URL#5338179Mehrdad ReshadiBita GorjiaraDaniel GajskiC-based design flow: a case study on G.729A for voice over internet protocol (VoIP).DAC72-752008Conference and Workshop Papersclosedconf/dac/ReshadiGG0810.1145/1391469.1391489https://doi.org/10.1145/1391469.1391489https://dblp.org/rec/conf/dac/ReshadiGG08URL#5338180Juan C. ReyAndreas KuehlmannJan M. RabaeyCormac ConroyTed VucurevichIkuya KawasakiTuna B. TarimNext generation wireless-multimedia devices: who is up for the challenge?DAC353-3542008Conference and Workshop Papersclosedconf/dac/ReyKRCVKT0810.1145/1391469.1391564https://doi.org/10.1145/1391469.1391564https://dblp.org/rec/conf/dac/ReyKRCVKT08URL#5338181Juan C. ReyN. S. NagarajAndrew B. KahngFabian KlassRob AitkenCliff HouLuigi CapodieciVivek SinghDFM in practice: hit or hype?DAC898-8992008Conference and Workshop Papersclosedconf/dac/ReyNKKAHCS0810.1145/1391469.1391696https://doi.org/10.1145/1391469.1391696https://dblp.org/rec/conf/dac/ReyNKKAHCS08URL#5338182Jarrod A. RoyFarinaz KoushanfarIgor L. MarkovProtecting bus-based hardware IP by secret sharing.DAC846-8512008Conference and Workshop Papersclosedconf/dac/RoyKM0810.1145/1391469.1391684https://doi.org/10.1145/1391469.1391684https://dblp.org/rec/conf/dac/RoyKM08URL#5338183Sachin S. SapatnekarEshel HaritanKurt KeutzerAnirudh DevganDesmond KirkpatrickStephen MeierDuaine PryorTom SpyrouReinventing EDA with manycore processors.DAC126-1272008Conference and Workshop Papersclosedconf/dac/SapatnekarHKDKMPS0810.1145/1391469.1391502https://doi.org/10.1145/1391469.1391502https://dblp.org/rec/conf/dac/SapatnekarHKDKMPS08URL#5338184Christian Sauer 0001Matthias GriesHans-Peter LöbSystemClick: a domain-specific framework for early exploration using functional performance models.DAC480-4852008Conference and Workshop Papersclosedconf/dac/SauerGL0810.1145/1391469.1391593https://doi.org/10.1145/1391469.1391593https://dblp.org/rec/conf/dac/SauerGL08URL#5338185Risto SavolainenTero RissaStandard interfaces in mobile terminals: increasing the efficiency of device design and accelerating innovation.DAC5922008Conference and Workshop Papersclosedconf/dac/SavolainenR0810.1145/1391469.1391619https://doi.org/10.1145/1391469.1391619https://dblp.org/rec/conf/dac/SavolainenR08URL#5338186Jürgen SchnerrOliver Bringmann 0001Alexander ViehlWolfgang RosenstielHigh-performance timing simulation of embedded software.DAC290-2952008Conference and Workshop Papersclosedconf/dac/SchnerrBVR0810.1145/1391469.1391543https://doi.org/10.1145/1391469.1391543https://dblp.org/rec/conf/dac/SchnerrBVR08URL#5338187Shreyas SenVishwanath NatarajanRajarajan SenguttuvanAbhijit ChatterjeePro-VIZOR: process tunable virtually zero margin low power adaptive RF for wireless systems.DAC492-4972008Conference and Workshop Papersclosedconf/dac/SenNSC0810.1145/1391469.1391595https://doi.org/10.1145/1391469.1391595https://dblp.org/rec/conf/dac/SenNSC08URL#5338188Alper Sen 0001Vinit OgaleMagdy S. AbadirPredictive runtime verification of multi-processor SoCs in SystemC.DAC948-9532008Conference and Workshop Papersclosedconf/dac/SenOA0810.1145/1391469.1391708https://doi.org/10.1145/1391469.1391708https://dblp.org/rec/conf/dac/SenOA08URL#5338189Dipanjan SenguptaResve A. SalehApplication-driven floorplan-aware voltage island design.DAC155-1602008Conference and Workshop Papersclosedconf/dac/SenguptaS0810.1145/1391469.1391511https://doi.org/10.1145/1391469.1391511https://dblp.org/rec/conf/dac/SenguptaS08URL#5338190Tiffany SparksPete WeitznerLuc BurgunRussell LefevreTodd CutlerClayton ParkerVicki HadfieldChris RowenElection year: what the electronics industry needs---and can expect---from the incoming administration.DAC76-772008Conference and Workshop Papersclosedconf/dac/SparksWBLCPHR0810.1145/1391469.1391491https://doi.org/10.1145/1391469.1391491https://dblp.org/rec/conf/dac/SparksWBLCPHR08URL#5338191Ranjani SridharanNikhil Gupta 0004Rabi N. MahapatraFeedback-controlled reliability-aware power management for real-time embedded systems.DAC185-1902008Conference and Workshop Papersclosedconf/dac/SridharanGM0810.1145/1391469.1391517https://doi.org/10.1145/1391469.1391517https://dblp.org/rec/conf/dac/SridharanGM08URL#5338192Vivy SuhendraTulika MitraExploring locking & partitioning for predictable shared caches on multi-cores.DAC300-3032008Conference and Workshop Papersclosedconf/dac/SuhendraM0810.1145/1391469.1391545https://doi.org/10.1145/1391469.1391545https://dblp.org/rec/conf/dac/SuhendraM08URL#5338193Wing Chiu TamOsei PokuR. D. (Shawn) BlantonPrecise failure localization using automated layout analysis of diagnosis candidates.DAC367-3722008Conference and Workshop Papersclosedconf/dac/TamPB0810.1145/1391469.1391568https://doi.org/10.1145/1391469.1391568https://dblp.org/rec/conf/dac/TamPB08URL#5338194David TarjanMichael BoyerKevin SkadronFederation: repurposing scalar cores for out-of-order instruction issue.DAC772-7752008Conference and Workshop Papersclosedconf/dac/TarjanBS0810.1145/1391469.1391666https://doi.org/10.1145/1391469.1391666https://dblp.org/rec/conf/dac/TarjanBS08URL#5338195Siew-Hong TehChun-Huat HengArthur TayDesign-process integration for performance-based OPC framework.DAC522-5272008Conference and Workshop Papersclosedconf/dac/TehHT0810.1145/1391469.1391601https://doi.org/10.1145/1391469.1391601https://dblp.org/rec/conf/dac/TehHT08URL#5338196Richard TrihyAddressing library creation challenges from recent Liberty extensions.DAC474-4792008Conference and Workshop Papersclosedconf/dac/Trihy0810.1145/1391469.1391591https://doi.org/10.1145/1391469.1391591https://dblp.org/rec/conf/dac/Trihy08URL#5338197Babu TurumellaMukesh SharmaAssertion-based verification of a 32 thread SPARCTM CMT microprocessor.DAC256-2612008Conference and Workshop Papersclosedconf/dac/TurumellaS0810.1145/1391469.1391535https://doi.org/10.1145/1391469.1391535https://dblp.org/rec/conf/dac/TurumellaS08URL#5338198Pascal UrardAsma MaalejRoberto GuizzettiNitin ChawlaLeveraging sequential equivalence checking to enable system-level to RTL flows.DAC816-8212008Conference and Workshop Papersclosedconf/dac/UrardMGC0810.1145/1391469.1391677https://doi.org/10.1145/1391469.1391677https://dblp.org/rec/conf/dac/UrardMGC08URL#5338199Vineeth VeetilDennis SylvesterDavid T. BlaauwEfficient Monte Carlo based incremental statistical timing analysis.DAC676-6812008Conference and Workshop Papersclosedconf/dac/VeetilSB0810.1145/1391469.1391645https://doi.org/10.1145/1391469.1391645https://dblp.org/rec/conf/dac/VeetilSB08URL#5338200Ted Vucurevich3-D semiconductor's: more from Moore.DAC6642008Conference and Workshop Papersclosedconf/dac/Vucurevich0810.1145/1391469.1391640https://doi.org/10.1145/1391469.1391640https://dblp.org/rec/conf/dac/Vucurevich08URL#5338201Yi WangWai-Shing LukXuan Zeng 0001Jun Tao 0001Changhao YanJiarong TongWei Cai 0003Jia NiTiming yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays.DAC223-2262008Conference and Workshop Papersclosedconf/dac/WangLZTYTCN0810.1145/1391469.1391525https://doi.org/10.1145/1391469.1391525https://dblp.org/rec/conf/dac/WangLZTYTCN08URL#5338202Jia Wang 0003Hai Zhou 0001An efficient incremental algorithm for min-area retiming.DAC528-5332008Conference and Workshop Papersclosedconf/dac/WangZ0810.1145/1391469.1391603https://doi.org/10.1145/1391469.1391603https://dblp.org/rec/conf/dac/WangZ08URL#5338203Tao Xu 0002Krishnendu ChakrabartyBroadcast electrode-addressing for pin-constrained multi-functional digital microfluidic biochips.DAC173-1782008Conference and Workshop Papersclosedconf/dac/XuC0810.1145/1391469.1391514https://doi.org/10.1145/1391469.1391514https://dblp.org/rec/conf/dac/XuC08URL#5338204Hiroyuki YagiWolfgang RoesnerTim KogelEshel HaritanHidekazu TangiMichael McNamaraGary Smith 0001Nikil D. DuttGiovanni ManciniESL hand-off: fact or EDA fiction?DAC310-3122008Conference and Workshop Papersclosedconf/dac/YagiRKHTMSDM0810.1145/1391469.1391548https://doi.org/10.1145/1391469.1391548https://dblp.org/rec/conf/dac/YagiRKHTMSDM08URL#5338205Jackey Z. YanChris ChuDeFer: deferred decision making enabled fixed-outline floorplanner.DAC161-1662008Conference and Workshop Papersclosedconf/dac/YanC0810.1145/1391469.1391512https://doi.org/10.1145/1391469.1391512https://dblp.org/rec/conf/dac/YanC08URL#5338206Boyuan YanLingfei ZhouSheldon X.-D. TanJie Chen 0005Bruce McGaughyDeMOR: decentralized model order reduction of linear networks with massive ports.DAC409-4142008Conference and Workshop Papersclosedconf/dac/YanZTCM0810.1145/1391469.1391577https://doi.org/10.1145/1391469.1391577https://dblp.org/rec/conf/dac/YanZTCM08URL#5338207Yun YeFrank Liu 0001Sani R. NassifYu Cao 0001Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness.DAC900-9052008Conference and Workshop Papersclosedconf/dac/YeLNC0810.1145/1391469.1391698https://doi.org/10.1145/1391469.1391698https://dblp.org/rec/conf/dac/YeLNC08URL#5338208Zuochang YeZhenhai ZhuJoel R. PhillipsGeneralized Krylov recycling methods for solution of multiple related linear equation systems in electromagnetic analysis.DAC682-6872008Conference and Workshop Papersclosedconf/dac/YeZP0810.1145/1391469.1391646https://doi.org/10.1145/1391469.1391646https://dblp.org/rec/conf/dac/YeZP08URL#5338209Inchoon YeoChih Chun LiuEun Jung Kim 0001Predictive dynamic thermal management for multicore systems.DAC734-7392008Conference and Workshop Papersclosedconf/dac/YeoLK0810.1145/1391469.1391658https://doi.org/10.1145/1391469.1391658https://dblp.org/rec/conf/dac/YeoLK08URL#5338210Xiaochun YuR. D. (Shawn) BlantonMultiple defect diagnosis using no assumptions on failing pattern characteristics.DAC361-3662008Conference and Workshop Papersclosedconf/dac/YuB0810.1145/1391469.1391567https://doi.org/10.1145/1391469.1391567https://dblp.org/rec/conf/dac/YuB08URL#5338211Chenjie YuPeter PetrovLatency and bandwidth efficient communication through system customization for embedded multiprocessors.DAC766-7712008Conference and Workshop Papersclosedconf/dac/YuP0810.1145/1391469.1391665https://doi.org/10.1145/1391469.1391665https://dblp.org/rec/conf/dac/YuP08URL#5338212Ping-Hung YuhSachin S. SapatnekarChia-Lin YangYao-Wen ChangA progressive-ILP based routing algorithm for cross-referencing biochips.DAC284-2892008Conference and Workshop Papersclosedconf/dac/YuhSYC0810.1145/1391469.1391541https://doi.org/10.1145/1391469.1391541https://dblp.org/rec/conf/dac/YuhSYC08URL#5338213Zhen ZhangAlain GreinerSami TaktakA reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip.DAC441-4462008Conference and Workshop Papersclosedconf/dac/ZhangGT0810.1145/1391469.1391584https://doi.org/10.1145/1391469.1391584https://dblp.org/rec/conf/dac/ZhangGT08URL#5338214Ling ZhangWenjian YuHaikun ZhuAlina DeutschGeorge A. KatopisDaniel M. DrepsErnest S. KuhChung-Kuan ChengLow power passive equalizer optimization using tritonic step response.DAC570-5732008Conference and Workshop Papersclosedconf/dac/ZhangYZDKDKC0810.1145/1391469.1391613https://doi.org/10.1145/1391469.1391613https://dblp.org/rec/conf/dac/ZhangYZDKDKC08URL#5338215Xiangrong ZhouChenjie YuPeter PetrovCompiler-driven register re-assignment for register file power-density and temperature reduction.DAC750-7532008Conference and Workshop Papersclosedconf/dac/ZhouYP0810.1145/1391469.1391661https://doi.org/10.1145/1391469.1391661https://dblp.org/rec/conf/dac/ZhouYP08URL#5338216Limor FixProceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008DACACM2008Editorshipconf/dac/2008http://dl.acm.org/citation.cfm?id=1391469https://dblp.org/rec/conf/dac/2008URL#5429739