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"Architektur eines programmierbaren neuronalen Signalprozessors in VLSI ..."
Jörg Beichter (1995)
- Jörg Beichter:
Architektur eines programmierbaren neuronalen Signalprozessors in VLSI CMOS-Technologie zur Simulation komplexer künstlicher neuronaler Netze. Technical University of Berlin, Germany, 1995, pp. 1-148
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