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"Verification and Synthesis of Clock-Gated Circuits."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Yu-Yun Dai (2017)

Trier

Dagstuhl

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DOI: —

access: closed

type: Book or Thesis

metadata version: 2018-02-27

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Yu-Yun Dai:
Verification and Synthesis of Clock-Gated Circuits. University of California, Berkeley, USA, 2017

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last updated on 2018-02-27 09:16 CET by the dblp team

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