"Verification and Synthesis of Clock-Gated Circuits."

Yu-Yun Dai (2017)

> Home

Details and statistics

DOI: —

access: closed

type: Book or Thesis

metadata version: 2018-02-27

- view
  - electronic edition @ escholarship.org
  authority control:
- export record
  dblp key:
  - phd/basesearch/Dai17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/phd/basesearch/Dai17
Yu-Yun Dai:
Verification and Synthesis of Clock-Gated Circuits. University of California, Berkeley, USA, 2017

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.