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"Energy Efficient All-Digital Phase Locked Loop Architecture Design on High ..."

T. M. Sathish Kumar, P. S. Periasamy (2018)

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DOI: 10.1007/S11277-018-5371-8

access: closed

type: Journal Article

metadata version: 2020-08-20

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T. M. Sathish Kumar, P. S. Periasamy:
Energy Efficient All-Digital Phase Locked Loop Architecture Design on High Resolution Fast Clocking Time to Digital Converter (TDC) Using Model Prescient Control (MPC) Technique. Wirel. Pers. Commun. 102(4): 3343-3359 (2018)

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