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"Control generation in the design of processor arrays."

Jürgen Teich, Lothar Thiele (1991)

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DOI: 10.1007/BF00927836

access: closed

type: Journal Article

metadata version: 2020-05-20

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Jürgen Teich, Lothar Thiele:
Control generation in the design of processor arrays. J. VLSI Signal Process. 3(1-2): 77-92 (1991)

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