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"An Efficient VLSI Architecture for Computation of Discrete Fractional ..."

Kailash Chandra Ray, M. V. N. V. Prasad, Anindya Sundar Dhar (2018)

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DOI: 10.1007/S11265-017-1281-3

access: closed

type: Journal Article

metadata version: 2020-03-12

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Kailash Chandra Ray, M. V. N. V. Prasad, Anindya Sundar Dhar:
An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform. J. Signal Process. Syst. 90(11): 1569-1580 (2018)

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