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"High-Speed Reconfigurable Parallel System to Design Good Error Correcting ..."

Juan Antonio Gómez Pulido, Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez (2012)

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DOI: 10.1007/S11265-011-0626-6

access: closed

type: Journal Article

metadata version: 2020-03-12

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  - journals/vlsisp/PulidoVS12
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  - https://dblp.org/rec/journals/vlsisp/PulidoVS12
Juan Antonio Gómez Pulido, Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez:
High-Speed Reconfigurable Parallel System to Design Good Error Correcting Codes in Communications. J. Signal Process. Syst. 66(2): 147-152 (2012)

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