Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix ..."

David H. K. Hoe, L. P. Deepthi Bollepalli, Chris D. Martinez (2013)

> Home

Details and statistics

DOI: 10.1155/2013/382682

access: open

type: Journal Article

metadata version: 2019-06-02

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/vlsi/HoeBM13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/vlsi/HoeBM13
David H. K. Hoe, L. P. Deepthi Bollepalli, Chris D. Martinez:
FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix Adders. VLSI Design 2013: 382682:1-382682:10 (2013)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.