"Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm ..."

Robert Polster et al. (2016)

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DOI: 10.1109/TVLSI.2016.2553673

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type: Journal Article

metadata version: 2020-03-11

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Robert Polster, Yvain Thonnart, Guillaume Waltener, Jose-Luis Gonzalez Jimenez, Eric Cassan:
Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3450-3459 (2016)

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