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"Analysis and Techniques for Mitigating Interference From Power/Signal ..."

Kiichi Niitsu et al. (2011)

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DOI: 10.1109/TVLSI.2010.2056711

access: closed

type: Journal Article

metadata version: 2023-03-21

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Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda:
Analysis and Techniques for Mitigating Interference From Power/Signal Lines and to SRAM Circuits in CMOS Inductive-Coupling Link for Low-Power 3-D System Integration. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1902-1907 (2011)

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