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"ALT: Area-Efficient and Low-Latency FPGA Design for Torus Fully ..."

Xiao Hu et al. (2024)

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DOI: 10.1109/TVLSI.2024.3353374

access: closed

type: Journal Article

metadata version: 2024-05-07

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Xiao Hu, Zhihao Li, Zhongfeng Wang, Xianhui Lu:
ALT: Area-Efficient and Low-Latency FPGA Design for Torus Fully Homomorphic Encryption. IEEE Trans. Very Large Scale Integr. Syst. 32(4): 645-657 (2024)

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