"LECTOR: a technique for leakage reduction in CMOS circuits."

Narender Hanchate, Nagarajan Ranganathan (2004)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2003.821547

access: closed

type: Journal Article

metadata version: 2022-06-10

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/HanchateR04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/HanchateR04
Narender Hanchate, Nagarajan Ranganathan:
LECTOR: a technique for leakage reduction in CMOS circuits. IEEE Trans. Very Large Scale Integr. Syst. 12(2): 196-205 (2004)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.