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"Two-level logic minimization for low power."

Jyh-Mou Tseng, Jing-Yang Jou (1999)

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DOI: 10.1145/298865.298869

access: closed

type: Journal Article

metadata version: 2018-11-06

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Jyh-Mou Tseng, Jing-Yang Jou:
Two-level logic minimization for low power. ACM Trans. Design Autom. Electr. Syst. 4(1): 52-69 (1999)

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