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"Evolution of synthetic RTL benchmark circuits with predefined testability."

Tomas Pecenka, Lukás Sekanina, Zdenek Kotásek (2008)

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DOI: 10.1145/1367045.1367063

access: closed

type: Journal Article

metadata version: 2018-11-06

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  - https://dblp.org/rec/journals/todaes/PecenkaSK08
Tomas Pecenka, Lukás Sekanina, Zdenek Kotásek:
Evolution of synthetic RTL benchmark circuits with predefined testability. ACM Trans. Design Autom. Electr. Syst. 13(3): 54:1-54:21 (2008)

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