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"A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array."

Hasita Veluri et al. (2023)

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DOI: 10.1109/TNNLS.2021.3118451

access: closed

type: Journal Article

metadata version: 2023-08-18

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  dblp key:
  - journals/tnn/VeluriCLTT23
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  - https://dblp.org/rec/journals/tnn/VeluriCLTT23
Hasita Veluri, Umesh Chand, Yida Li, Baoshan Tang, Aaron Voon-Yew Thean:
A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array. IEEE Trans. Neural Networks Learn. Syst. 34(8): 4416-4427 (2023)

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