"A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder."

Heng-Yao Lin et al. (2008)

> Home

Details and statistics

DOI: 10.1109/TMM.2007.911299

access: closed

type: Journal Article

metadata version: 2020-10-01

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tmm/LinLLY08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tmm/LinLLY08
Heng-Yao Lin, Ying-Hong Lu, Bin-Da Liu, Jar-Ferr Yang:
A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder. IEEE Trans. Multim. 10(1): 31-42 (2008)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.