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"Design and implantation of an ASIC architecture for 1.6 kbps speech synthesis."
Chu Yu, Hwai-Tsu Hu, Chen-Yen Lin (2003)
- Chu Yu, Hwai-Tsu Hu, Chen-Yen Lin:
Design and implantation of an ASIC architecture for 1.6 kbps speech synthesis. IEEE Trans. Consumer Electron. 49(3): 731-736 (2003)
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