"A 10-Gbps receiver bridge chip with deserializer for FPGA-based frame ..."

Pil-Ho Lee et al. (2017)

Details and statistics

DOI: 10.1109/TCE.2017.014908

access: closed

type: Journal Article

metadata version: 2020-07-09

a service of  Schloss Dagstuhl - Leibniz Center for Informatics