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"A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based ..."

Bingxi Pei et al. (2023)

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DOI: 10.1109/TCSII.2023.3288894

access: closed

type: Journal Article

metadata version: 2023-10-14

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  - https://dblp.org/rec/journals/tcasII/PeiXLWLH23
Bingxi Pei, Shi Xu, Zhang Luo, Qin Wang, Mingche Lai, Weifeng He:
A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3787-3791 (2023)

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