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"Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist."

Tae Woo Oh et al. (2023)

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DOI: 10.1109/TCSII.2022.3206478

access: closed

type: Journal Article

metadata version: 2023-01-15

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  - journals/tcasII/OhPKCJ23
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  - https://dblp.org/rec/journals/tcasII/OhPKCJ23
Tae Woo Oh, Juhyun Park, Tae Hyun Kim, Keonhee Cho, Seong-Ook Jung:
Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 306-310 (2023)

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