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"Power-Speed Trade-Offs in Design of Scaled FET Circuits Using ..."

Armin Tajalli (2021)

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DOI: 10.1109/TCSI.2020.3036683

access: closed

type: Journal Article

metadata version: 2021-02-11

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Armin Tajalli:
Power-Speed Trade-Offs in Design of Scaled FET Circuits Using C/I_DS Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 631-640 (2021)

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