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"Variable-Rate VLSI Architecture for 400-Gb/s Hard-Decision Product Decoder."

Vikram Jain, Christoffer Fougstedt, Per Larsson-Edefors (2021)

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DOI: 10.1109/TCSI.2020.3035419

access: closed

type: Journal Article

metadata version: 2021-01-26

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  - https://dblp.org/rec/journals/tcasI/JainFL21
Vikram Jain, Christoffer Fougstedt, Per Larsson-Edefors:
Variable-Rate VLSI Architecture for 400-Gb/s Hard-Decision Product Decoder. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 25-34 (2021)

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