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"Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different ..."

Saeideh Alinezhad Chamazcoti et al. (2023)

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DOI: 10.1109/TCSI.2022.3222573

access: closed

type: Journal Article

metadata version: 2023-07-27

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  - https://dblp.org/rec/journals/tcasI/ChamazcotiGOECKKF23
Saeideh Alinezhad Chamazcoti, Mohit Gupta, Hyungrock Oh, Timon Evenblij, Francky Catthoor, Manu Perumkunnil Komalan, Gouri Sankar Kar, Arnaud Furnémont:
Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 70(2): 733-746 (2023)

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