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"A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled ..."

Kevin J. Wang, Ian Galton (2011)

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DOI: 10.1109/TCSI.2010.2072130

access: closed

type: Journal Article

metadata version: 2020-05-22

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Kevin J. Wang, Ian Galton:
A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(2): 264-275 (2011)

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