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"A 10.7b 300MS/s Two-Step Digital-Slope ADC in 65nm CMOS."
Chun-Chieh Peng, Ta-Shun Chu (2020)
- Chun-Chieh Peng, Ta-Shun Chu:
A 10.7b 300MS/s Two-Step Digital-Slope ADC in 65nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 2948-2959 (2020)
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