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"A 576-Mbit/s 64-QAM 4 × 4 MIMO Precoding Processor With Lattice ..."

Chun-Fu Liao et al. (2014)

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DOI: 10.1109/TCSII.2013.2291074

access: closed

type: Journal Article

metadata version: 2020-05-27

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  - https://dblp.org/rec/journals/tcas/LiaoLJH14
Chun-Fu Liao, Fang-Chun Lan, Jin-Wei Jhang, Yuan-Hao Huang:
A 576-Mbit/s 64-QAM 4 × 4 MIMO Precoding Processor With Lattice Reduction. IEEE Trans. Circuits Syst. II Express Briefs 61-II(2): 95-99 (2014)

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