"Design on Power-Rail ESD Clamp Circuit for 3.3-V I/O Interface by Using ..."

Ming-Dou Ker, Wen-Yi Chen, Kuo-Chun Hsu (2006)

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DOI: 10.1109/TCSI.2006.882818

access: closed

type: Journal Article

metadata version: 2020-05-22

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Ming-Dou Ker, Wen-Yi Chen, Kuo-Chun Hsu:
Design on Power-Rail ESD Clamp Circuit for 3.3-V I/O Interface by Using Only 1-V/2.5-V Low-Voltage Devices in a 130-nm CMOS Process. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(10): 2187-2193 (2006)

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