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"Hardware-Efficient Node Processing Unit Architectures for Flexible LDPC ..."

Peter Hailes et al. (2018)

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DOI: 10.1109/TCSII.2018.2807362

access: open

type: Journal Article

metadata version: 2020-05-27

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Peter Hailes, Lei Xu, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo:
Hardware-Efficient Node Processing Unit Architectures for Flexible LDPC Decoder Implementations. IEEE Trans. Circuits Syst. II Express Briefs 65-II(12): 1919-1923 (2018)

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