


default search action
"An Efficient VLSI Architecture for Normal I/O Order Pipeline FFT Design."
Yun-Nan Chang (2008)
- Yun-Nan Chang:

An Efficient VLSI Architecture for Normal I/O Order Pipeline FFT Design. IEEE Trans. Circuits Syst. II Express Briefs 55-II(12): 1234-1238 (2008)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













